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Commit | Line | Data |
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87ecb68b PB |
1 | #ifndef HW_MIPS_H |
2 | #define HW_MIPS_H | |
3 | /* Definitions for mips board emulation. */ | |
4 | ||
5 | /* gt64xxx.c */ | |
c2dd2a23 | 6 | PCIBus *gt64120_register(qemu_irq *pic); |
87ecb68b | 7 | |
d0f7453d HC |
8 | /* bonito.c */ |
9 | PCIBus *bonito_init(qemu_irq *pic); | |
10 | ||
4ce7ff6e | 11 | /* g364fb.c */ |
c227f099 AL |
12 | int g364fb_mm_init(target_phys_addr_t vram_base, |
13 | target_phys_addr_t ctrl_base, int it_shift, | |
0add30cf | 14 | qemu_irq irq); |
4ce7ff6e | 15 | |
87ecb68b PB |
16 | /* mipsnet.c */ |
17 | void mipsnet_init(int base, qemu_irq irq, NICInfo *nd); | |
18 | ||
19 | /* jazz_led.c */ | |
64b85a8f | 20 | void jazz_led_init(target_phys_addr_t base); |
87ecb68b | 21 | |
4ce7ff6e | 22 | /* rc4030.c */ |
c6945b15 | 23 | typedef struct rc4030DMAState *rc4030_dma; |
c227f099 | 24 | void rc4030_dma_memory_rw(void *opaque, target_phys_addr_t addr, uint8_t *buf, int len, int is_write); |
68238a9e AJ |
25 | void rc4030_dma_read(void *dma, uint8_t *buf, int len); |
26 | void rc4030_dma_write(void *dma, uint8_t *buf, int len); | |
27 | ||
28 | void *rc4030_init(qemu_irq timer, qemu_irq jazz_bus, | |
29 | qemu_irq **irqs, rc4030_dma **dmas); | |
4ce7ff6e | 30 | |
a65f56ee | 31 | /* dp8393x.c */ |
c227f099 | 32 | void dp83932_init(NICInfo *nd, target_phys_addr_t base, int it_shift, |
a65f56ee | 33 | qemu_irq irq, void* mem_opaque, |
c227f099 | 34 | void (*memory_rw)(void *opaque, target_phys_addr_t addr, uint8_t *buf, int len, int is_write)); |
a65f56ee | 35 | |
87ecb68b | 36 | #endif |