[qemu.git] / hw / mips_fulong2e.c

/*
 * QEMU fulong 2e mini pc support
 *
 * Copyright (c) 2008 yajin (yajin@vm-kernel.org)
 * Copyright (c) 2009 chenming (chenming@rdc.faw.com.cn)
 * Copyright (c) 2010 Huacai Chen (zltjiangshi@gmail.com)
 * This code is licensed under the GNU GPL v2.
 *
 * Contributions after 2012-01-13 are licensed under the terms of the
 * GNU GPL, version 2 or (at your option) any later version.
 */

/*
 * Fulong 2e mini pc is based on ICT/ST Loongson 2e CPU (MIPS III like, 800MHz)
 * http://www.linux-mips.org/wiki/Fulong
 *
 * Loongson 2e user manual:
 * http://www.loongsondeveloper.com/doc/Loongson2EUserGuide.pdf
 */

#include "hw.h"
#include "pc.h"
#include "fdc.h"
#include "net.h"
#include "boards.h"
#include "smbus.h"
#include "block.h"
#include "flash.h"
#include "mips.h"
#include "mips_cpudevs.h"
#include "pci.h"
#include "qemu-char.h"
#include "sysemu.h"
#include "audio/audio.h"
#include "qemu-log.h"
#include "loader.h"
#include "mips-bios.h"
#include "ide.h"
#include "elf.h"
#include "vt82c686.h"
#include "mc146818rtc.h"
#include "i8254.h"
#include "blockdev.h"
#include "exec-memory.h"

#define DEBUG_FULONG2E_INIT

#define ENVP_ADDR       0x80002000l
#define ENVP_NB_ENTRIES	 	16
#define ENVP_ENTRY_SIZE	 	256

#define MAX_IDE_BUS 2

/*
 * PMON is not part of qemu and released with BSD license, anyone
 * who want to build a pmon binary please first git-clone the source
 * from the git repository at:
 * http://www.loongson.cn/support/git/pmon
 * Then follow the "Compile Guide" available at:
 * http://dev.lemote.com/code/pmon
 *
 * Notes:
 * 1, don't use the source at http://dev.lemote.com/http_git/pmon.git
 * 2, use "Bonito2edev" to replace "dir_corresponding_to_your_target_hardware"
 * in the "Compile Guide".
 */
#define FULONG_BIOSNAME "pmon_fulong2e.bin"

/* PCI SLOT in fulong 2e */
#define FULONG2E_VIA_SLOT        5
#define FULONG2E_ATI_SLOT        6
#define FULONG2E_RTL8139_SLOT    7

static ISADevice *pit;

static struct _loaderparams {
    int ram_size;
    const char *kernel_filename;
    const char *kernel_cmdline;
    const char *initrd_filename;
} loaderparams;

static void GCC_FMT_ATTR(3, 4) prom_set(uint32_t* prom_buf, int index,
                                        const char *string, ...)
{
    va_list ap;
    int32_t table_addr;

    if (index >= ENVP_NB_ENTRIES)
        return;

    if (string == NULL) {
        prom_buf[index] = 0;
        return;
    }

    table_addr = sizeof(int32_t) * ENVP_NB_ENTRIES + index * ENVP_ENTRY_SIZE;
    prom_buf[index] = tswap32(ENVP_ADDR + table_addr);

    va_start(ap, string);
    vsnprintf((char *)prom_buf + table_addr, ENVP_ENTRY_SIZE, string, ap);
    va_end(ap);
}

static int64_t load_kernel (CPUMIPSState *env)
{
    int64_t kernel_entry, kernel_low, kernel_high;
    int index = 0;
    long initrd_size;
    ram_addr_t initrd_offset;
    uint32_t *prom_buf;
    long prom_size;

    if (load_elf(loaderparams.kernel_filename, cpu_mips_kseg0_to_phys, NULL,
                 (uint64_t *)&kernel_entry, (uint64_t *)&kernel_low,
                 (uint64_t *)&kernel_high, 0, ELF_MACHINE, 1) < 0) {
        fprintf(stderr, "qemu: could not load kernel '%s'\n",
                loaderparams.kernel_filename);
        exit(1);
    }

    /* load initrd */
    initrd_size = 0;
    initrd_offset = 0;
    if (loaderparams.initrd_filename) {
        initrd_size = get_image_size (loaderparams.initrd_filename);
        if (initrd_size > 0) {
            initrd_offset = (kernel_high + ~TARGET_PAGE_MASK) & TARGET_PAGE_MASK;
            if (initrd_offset + initrd_size > ram_size) {
                fprintf(stderr,
                        "qemu: memory too small for initial ram disk '%s'\n",
                        loaderparams.initrd_filename);
                exit(1);
            }
            initrd_size = load_image_targphys(loaderparams.initrd_filename,
                                     initrd_offset, ram_size - initrd_offset);
        }
        if (initrd_size == (target_ulong) -1) {
            fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
                    loaderparams.initrd_filename);
            exit(1);
        }
    }

    /* Setup prom parameters. */
    prom_size = ENVP_NB_ENTRIES * (sizeof(int32_t) + ENVP_ENTRY_SIZE);
    prom_buf = g_malloc(prom_size);

    prom_set(prom_buf, index++, "%s", loaderparams.kernel_filename);
    if (initrd_size > 0) {
        prom_set(prom_buf, index++, "rd_start=0x%" PRIx64 " rd_size=%li %s",
                 cpu_mips_phys_to_kseg0(NULL, initrd_offset), initrd_size,
                 loaderparams.kernel_cmdline);
    } else {
        prom_set(prom_buf, index++, "%s", loaderparams.kernel_cmdline);
    }

    /* Setup minimum environment variables */
    prom_set(prom_buf, index++, "busclock=33000000");
    prom_set(prom_buf, index++, "cpuclock=100000000");
    prom_set(prom_buf, index++, "memsize=%i", loaderparams.ram_size/1024/1024);
    prom_set(prom_buf, index++, "modetty0=38400n8r");
    prom_set(prom_buf, index++, NULL);

    rom_add_blob_fixed("prom", prom_buf, prom_size,
                       cpu_mips_kseg0_to_phys(NULL, ENVP_ADDR));

    return kernel_entry;
}

static void write_bootloader (CPUMIPSState *env, uint8_t *base, int64_t kernel_addr)
{
    uint32_t *p;

    /* Small bootloader */
    p = (uint32_t *) base;

    stl_raw(p++, 0x0bf00010);                                      /* j 0x1fc00040 */
    stl_raw(p++, 0x00000000);                                      /* nop */

    /* Second part of the bootloader */
    p = (uint32_t *) (base + 0x040);

    stl_raw(p++, 0x3c040000);                                      /* lui a0, 0 */
    stl_raw(p++, 0x34840002);                                      /* ori a0, a0, 2 */
    stl_raw(p++, 0x3c050000 | ((ENVP_ADDR >> 16) & 0xffff));       /* lui a1, high(ENVP_ADDR) */
    stl_raw(p++, 0x34a50000 | (ENVP_ADDR & 0xffff));               /* ori a1, a0, low(ENVP_ADDR) */
    stl_raw(p++, 0x3c060000 | (((ENVP_ADDR + 8) >> 16) & 0xffff)); /* lui a2, high(ENVP_ADDR + 8) */
    stl_raw(p++, 0x34c60000 | ((ENVP_ADDR + 8) & 0xffff));         /* ori a2, a2, low(ENVP_ADDR + 8) */
    stl_raw(p++, 0x3c070000 | (loaderparams.ram_size >> 16));      /* lui a3, high(env->ram_size) */
    stl_raw(p++, 0x34e70000 | (loaderparams.ram_size & 0xffff));   /* ori a3, a3, low(env->ram_size) */
    stl_raw(p++, 0x3c1f0000 | ((kernel_addr >> 16) & 0xffff));     /* lui ra, high(kernel_addr) */;
    stl_raw(p++, 0x37ff0000 | (kernel_addr & 0xffff));             /* ori ra, ra, low(kernel_addr) */
    stl_raw(p++, 0x03e00008);                                      /* jr ra */
    stl_raw(p++, 0x00000000);                                      /* nop */
}


static void main_cpu_reset(void *opaque)
{
    MIPSCPU *cpu = opaque;
    CPUMIPSState *env = &cpu->env;

    cpu_reset(CPU(cpu));
    /* TODO: 2E reset stuff */
    if (loaderparams.kernel_filename) {
        env->CP0_Status &= ~((1 << CP0St_BEV) | (1 << CP0St_ERL));
    }
}

uint8_t eeprom_spd[0x80] = {
    0x80,0x08,0x07,0x0d,0x09,0x02,0x40,0x00,0x04,0x70,
    0x70,0x00,0x82,0x10,0x00,0x01,0x0e,0x04,0x0c,0x01,
    0x02,0x20,0x80,0x75,0x70,0x00,0x00,0x50,0x3c,0x50,
    0x2d,0x20,0xb0,0xb0,0x50,0x50,0x00,0x00,0x00,0x00,
    0x00,0x41,0x48,0x3c,0x32,0x75,0x00,0x00,0x00,0x00,
    0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
    0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
    0x00,0x00,0x00,0x9c,0x7b,0x07,0x00,0x00,0x00,0x00,
    0x00,0x00,0x00,0x00,0x48,0x42,0x35,0x34,0x41,0x32,
    0x35,0x36,0x38,0x4b,0x4e,0x2d,0x41,0x37,0x35,0x42,
    0x20,0x30,0x20
};

/* Audio support */
static void audio_init (PCIBus *pci_bus)
{
    vt82c686b_ac97_init(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 5));
    vt82c686b_mc97_init(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 6));
}

/* Network support */
static void network_init (void)
{
    int i;

    for(i = 0; i < nb_nics; i++) {
        NICInfo *nd = &nd_table[i];
        const char *default_devaddr = NULL;

        if (i == 0 && (!nd->model || strcmp(nd->model, "rtl8139") == 0)) {
            /* The fulong board has a RTL8139 card using PCI SLOT 7 */
            default_devaddr = "07";
        }

        pci_nic_init_nofail(nd, "rtl8139", default_devaddr);
    }
}

static void cpu_request_exit(void *opaque, int irq, int level)
{
    CPUMIPSState *env = cpu_single_env;

    if (env && level) {
        cpu_exit(env);
    }
}

static void mips_fulong2e_init(ram_addr_t ram_size, const char *boot_device,
                        const char *kernel_filename, const char *kernel_cmdline,
                        const char *initrd_filename, const char *cpu_model)
{
    char *filename;
    MemoryRegion *address_space_mem = get_system_memory();
    MemoryRegion *ram = g_new(MemoryRegion, 1);
    MemoryRegion *bios = g_new(MemoryRegion, 1);
    long bios_size;
    int64_t kernel_entry;
    qemu_irq *i8259;
    qemu_irq *cpu_exit_irq;
    PCIBus *pci_bus;
    ISABus *isa_bus;
    i2c_bus *smbus;
    int i;
    DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
    MIPSCPU *cpu;
    CPUMIPSState *env;

    /* init CPUs */
    if (cpu_model == NULL) {
        cpu_model = "Loongson-2E";
    }
    cpu = cpu_mips_init(cpu_model);
    if (cpu == NULL) {
        fprintf(stderr, "Unable to find CPU definition\n");
        exit(1);
    }
    env = &cpu->env;

    qemu_register_reset(main_cpu_reset, cpu);

    /* fulong 2e has 256M ram. */
    ram_size = 256 * 1024 * 1024;

    /* fulong 2e has a 1M flash.Winbond W39L040AP70Z */
    bios_size = 1024 * 1024;

    /* allocate RAM */
    memory_region_init_ram(ram, "fulong2e.ram", ram_size);
    vmstate_register_ram_global(ram);
    memory_region_init_ram(bios, "fulong2e.bios", bios_size);
    vmstate_register_ram_global(bios);
    memory_region_set_readonly(bios, true);

    memory_region_add_subregion(address_space_mem, 0, ram);
    memory_region_add_subregion(address_space_mem, 0x1fc00000LL, bios);

    /* We do not support flash operation, just loading pmon.bin as raw BIOS.
     * Please use -L to set the BIOS path and -bios to set bios name. */

    if (kernel_filename) {
        loaderparams.ram_size = ram_size;
        loaderparams.kernel_filename = kernel_filename;
        loaderparams.kernel_cmdline = kernel_cmdline;
        loaderparams.initrd_filename = initrd_filename;
        kernel_entry = load_kernel (env);
        write_bootloader(env, memory_region_get_ram_ptr(bios), kernel_entry);
    } else {
        if (bios_name == NULL) {
                bios_name = FULONG_BIOSNAME;
        }
        filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
        if (filename) {
            bios_size = load_image_targphys(filename, 0x1fc00000LL,
                                            BIOS_SIZE);
            g_free(filename);
        } else {
            bios_size = -1;
        }

        if ((bios_size < 0 || bios_size > BIOS_SIZE) && !kernel_filename) {
            fprintf(stderr, "qemu: Could not load MIPS bios '%s'\n", bios_name);
            exit(1);
        }
    }

    /* Init internal devices */
    cpu_mips_irq_init_cpu(env);
    cpu_mips_clock_init(env);

    /* North bridge, Bonito --> IP2 */
    pci_bus = bonito_init((qemu_irq *)&(env->irq[2]));

    /* South bridge */
    ide_drive_get(hd, MAX_IDE_BUS);

    isa_bus = vt82c686b_init(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 0));
    if (!isa_bus) {
        fprintf(stderr, "vt82c686b_init error\n");
        exit(1);
    }

    /* Interrupt controller */
    /* The 8259 -> IP5  */
    i8259 = i8259_init(isa_bus, env->irq[5]);
    isa_bus_irqs(isa_bus, i8259);

    vt82c686b_ide_init(pci_bus, hd, PCI_DEVFN(FULONG2E_VIA_SLOT, 1));
    pci_create_simple(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 2),
                      "vt82c686b-usb-uhci");
    pci_create_simple(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 3),
                      "vt82c686b-usb-uhci");

    smbus = vt82c686b_pm_init(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 4),
                              0xeee1, NULL);
    /* TODO: Populate SPD eeprom data.  */
    smbus_eeprom_init(smbus, 1, eeprom_spd, sizeof(eeprom_spd));

    /* init other devices */
    pit = pit_init(isa_bus, 0x40, 0, NULL);
    cpu_exit_irq = qemu_allocate_irqs(cpu_request_exit, NULL, 1);
    DMA_init(0, cpu_exit_irq);

    /* Super I/O */
    isa_create_simple(isa_bus, "i8042");

    rtc_init(isa_bus, 2000, NULL);

    for(i = 0; i < MAX_SERIAL_PORTS; i++) {
        if (serial_hds[i]) {
            serial_isa_init(isa_bus, i, serial_hds[i]);
        }
    }

    if (parallel_hds[0]) {
        parallel_init(isa_bus, 0, parallel_hds[0]);
    }

    /* Sound card */
    audio_init(pci_bus);
    /* Network card */
    network_init();
}

QEMUMachine mips_fulong2e_machine = {
    .name = "fulong2e",
    .desc = "Fulong 2e mini pc",
    .init = mips_fulong2e_init,
};

static void mips_fulong2e_machine_init(void)
{
    qemu_register_machine(&mips_fulong2e_machine);
}

machine_init(mips_fulong2e_machine_init);
Commit	Line	Data
051c190b HC	1	/*
	2	* QEMU fulong 2e mini pc support
	3	*
	4	* Copyright (c) 2008 yajin (yajin@vm-kernel.org)
	5	* Copyright (c) 2009 chenming (chenming@rdc.faw.com.cn)
	6	* Copyright (c) 2010 Huacai Chen (zltjiangshi@gmail.com)
	7	* This code is licensed under the GNU GPL v2.
6b620ca3 PB	8	*
	9	* Contributions after 2012-01-13 are licensed under the terms of the
	10	* GNU GPL, version 2 or (at your option) any later version.
051c190b HC	11	*/
	12
	13	/*
	14	* Fulong 2e mini pc is based on ICT/ST Loongson 2e CPU (MIPS III like, 800MHz)
	15	* http://www.linux-mips.org/wiki/Fulong
	16	*
	17	* Loongson 2e user manual:
	18	* http://www.loongsondeveloper.com/doc/Loongson2EUserGuide.pdf
	19	*/
	20
	21	#include "hw.h"
	22	#include "pc.h"
	23	#include "fdc.h"
	24	#include "net.h"
	25	#include "boards.h"
	26	#include "smbus.h"
	27	#include "block.h"
	28	#include "flash.h"
	29	#include "mips.h"
	30	#include "mips_cpudevs.h"
	31	#include "pci.h"
051c190b HC	32	#include "qemu-char.h"
	33	#include "sysemu.h"
	34	#include "audio/audio.h"
	35	#include "qemu-log.h"
	36	#include "loader.h"
	37	#include "mips-bios.h"
	38	#include "ide.h"
	39	#include "elf.h"
	40	#include "vt82c686.h"
	41	#include "mc146818rtc.h"
b1277b03	42	#include "i8254.h"
2446333c	43	#include "blockdev.h"
13faf2a7	44	#include "exec-memory.h"
051c190b HC	45
	46	#define DEBUG_FULONG2E_INIT
	47
	48	#define ENVP_ADDR 0x80002000l
	49	#define ENVP_NB_ENTRIES 16
	50	#define ENVP_ENTRY_SIZE 256
	51
	52	#define MAX_IDE_BUS 2
	53
	54	/*
	55	* PMON is not part of qemu and released with BSD license, anyone
	56	* who want to build a pmon binary please first git-clone the source
	57	* from the git repository at:
	58	* http://www.loongson.cn/support/git/pmon
	59	* Then follow the "Compile Guide" available at:
	60	* http://dev.lemote.com/code/pmon
	61	*
	62	* Notes:
	63	* 1, don't use the source at http://dev.lemote.com/http_git/pmon.git
	64	* 2, use "Bonito2edev" to replace "dir_corresponding_to_your_target_hardware"
	65	* in the "Compile Guide".
	66	*/
	67	#define FULONG_BIOSNAME "pmon_fulong2e.bin"
	68
	69	/* PCI SLOT in fulong 2e */
	70	#define FULONG2E_VIA_SLOT 5
	71	#define FULONG2E_ATI_SLOT 6
	72	#define FULONG2E_RTL8139_SLOT 7
	73
64d7e9a4	74	static ISADevice *pit;
051c190b HC	75
	76	static struct _loaderparams {
	77	int ram_size;
	78	const char *kernel_filename;
	79	const char *kernel_cmdline;
	80	const char *initrd_filename;
	81	} loaderparams;
	82
8b7968f7 SW	83	static void GCC_FMT_ATTR(3, 4) prom_set(uint32_t* prom_buf, int index,
8b7968f7 SW	84	const char *string, ...)
051c190b HC	85	{
	86	va_list ap;
	87	int32_t table_addr;
	88
	89	if (index >= ENVP_NB_ENTRIES)
	90	return;
	91
	92	if (string == NULL) {
	93	prom_buf[index] = 0;
	94	return;
	95	}
	96
	97	table_addr = sizeof(int32_t) * ENVP_NB_ENTRIES + index * ENVP_ENTRY_SIZE;
	98	prom_buf[index] = tswap32(ENVP_ADDR + table_addr);
	99
	100	va_start(ap, string);
	101	vsnprintf((char *)prom_buf + table_addr, ENVP_ENTRY_SIZE, string, ap);
	102	va_end(ap);
	103	}
	104
61c56c8c	105	static int64_t load_kernel (CPUMIPSState *env)
051c190b HC	106	{
	107	int64_t kernel_entry, kernel_low, kernel_high;
	108	int index = 0;
	109	long initrd_size;
	110	ram_addr_t initrd_offset;
	111	uint32_t *prom_buf;
	112	long prom_size;
	113
	114	if (load_elf(loaderparams.kernel_filename, cpu_mips_kseg0_to_phys, NULL,
	115	(uint64_t )&kernel_entry, (uint64_t )&kernel_low,
	116	(uint64_t *)&kernel_high, 0, ELF_MACHINE, 1) < 0) {
	117	fprintf(stderr, "qemu: could not load kernel '%s'\n",
	118	loaderparams.kernel_filename);
	119	exit(1);
	120	}
	121
	122	/* load initrd */
	123	initrd_size = 0;
	124	initrd_offset = 0;
	125	if (loaderparams.initrd_filename) {
	126	initrd_size = get_image_size (loaderparams.initrd_filename);
	127	if (initrd_size > 0) {
	128	initrd_offset = (kernel_high + ~TARGET_PAGE_MASK) & TARGET_PAGE_MASK;
	129	if (initrd_offset + initrd_size > ram_size) {
	130	fprintf(stderr,
	131	"qemu: memory too small for initial ram disk '%s'\n",
	132	loaderparams.initrd_filename);
	133	exit(1);
	134	}
	135	initrd_size = load_image_targphys(loaderparams.initrd_filename,
	136	initrd_offset, ram_size - initrd_offset);
	137	}
	138	if (initrd_size == (target_ulong) -1) {
	139	fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
	140	loaderparams.initrd_filename);
	141	exit(1);
	142	}
	143	}
	144
	145	/* Setup prom parameters. */
	146	prom_size = ENVP_NB_ENTRIES * (sizeof(int32_t) + ENVP_ENTRY_SIZE);
7267c094	147	prom_buf = g_malloc(prom_size);
051c190b	148
1ed1139d	149	prom_set(prom_buf, index++, "%s", loaderparams.kernel_filename);
051c190b	150	if (initrd_size > 0) {
1ed1139d	151	prom_set(prom_buf, index++, "rd_start=0x%" PRIx64 " rd_size=%li %s",
051c190b HC	152	cpu_mips_phys_to_kseg0(NULL, initrd_offset), initrd_size,
	153	loaderparams.kernel_cmdline);
	154	} else {
1ed1139d	155	prom_set(prom_buf, index++, "%s", loaderparams.kernel_cmdline);
051c190b HC	156	}
	157
	158	/* Setup minimum environment variables */
	159	prom_set(prom_buf, index++, "busclock=33000000");
	160	prom_set(prom_buf, index++, "cpuclock=100000000");
	161	prom_set(prom_buf, index++, "memsize=%i", loaderparams.ram_size/1024/1024);
	162	prom_set(prom_buf, index++, "modetty0=38400n8r");
	163	prom_set(prom_buf, index++, NULL);
	164
	165	rom_add_blob_fixed("prom", prom_buf, prom_size,
	166	cpu_mips_kseg0_to_phys(NULL, ENVP_ADDR));
	167
	168	return kernel_entry;
	169	}
	170
61c56c8c	171	static void write_bootloader (CPUMIPSState env, uint8_t base, int64_t kernel_addr)
051c190b HC	172	{
	173	uint32_t *p;
	174
	175	/* Small bootloader */
	176	p = (uint32_t *) base;
	177
	178	stl_raw(p++, 0x0bf00010); /* j 0x1fc00040 */
	179	stl_raw(p++, 0x00000000); /* nop */
	180
	181	/* Second part of the bootloader */
	182	p = (uint32_t *) (base + 0x040);
	183
	184	stl_raw(p++, 0x3c040000); /* lui a0, 0 */
	185	stl_raw(p++, 0x34840002); /* ori a0, a0, 2 */
	186	stl_raw(p++, 0x3c050000 \| ((ENVP_ADDR >> 16) & 0xffff)); /* lui a1, high(ENVP_ADDR) */
	187	stl_raw(p++, 0x34a50000 \| (ENVP_ADDR & 0xffff)); /* ori a1, a0, low(ENVP_ADDR) */
	188	stl_raw(p++, 0x3c060000 \| (((ENVP_ADDR + 8) >> 16) & 0xffff)); /* lui a2, high(ENVP_ADDR + 8) */
	189	stl_raw(p++, 0x34c60000 \| ((ENVP_ADDR + 8) & 0xffff)); /* ori a2, a2, low(ENVP_ADDR + 8) */
	190	stl_raw(p++, 0x3c070000 \| (loaderparams.ram_size >> 16)); /* lui a3, high(env->ram_size) */
	191	stl_raw(p++, 0x34e70000 \| (loaderparams.ram_size & 0xffff)); /* ori a3, a3, low(env->ram_size) */
	192	stl_raw(p++, 0x3c1f0000 \| ((kernel_addr >> 16) & 0xffff)); /* lui ra, high(kernel_addr) */;
	193	stl_raw(p++, 0x37ff0000 \| (kernel_addr & 0xffff)); /* ori ra, ra, low(kernel_addr) */
	194	stl_raw(p++, 0x03e00008); /* jr ra */
	195	stl_raw(p++, 0x00000000); /* nop */
	196	}
	197
	198
	199	static void main_cpu_reset(void *opaque)
	200	{
800cf598 AF	201	MIPSCPU *cpu = opaque;
800cf598 AF	202	CPUMIPSState *env = &cpu->env;
051c190b	203
800cf598	204	cpu_reset(CPU(cpu));
051c190b HC	205	/* TODO: 2E reset stuff */
	206	if (loaderparams.kernel_filename) {
	207	env->CP0_Status &= ~((1 << CP0St_BEV) \| (1 << CP0St_ERL));
	208	}
	209	}
	210
	211	uint8_t eeprom_spd[0x80] = {
	212	0x80,0x08,0x07,0x0d,0x09,0x02,0x40,0x00,0x04,0x70,
	213	0x70,0x00,0x82,0x10,0x00,0x01,0x0e,0x04,0x0c,0x01,
	214	0x02,0x20,0x80,0x75,0x70,0x00,0x00,0x50,0x3c,0x50,
	215	0x2d,0x20,0xb0,0xb0,0x50,0x50,0x00,0x00,0x00,0x00,
	216	0x00,0x41,0x48,0x3c,0x32,0x75,0x00,0x00,0x00,0x00,
	217	0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
	218	0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
	219	0x00,0x00,0x00,0x9c,0x7b,0x07,0x00,0x00,0x00,0x00,
	220	0x00,0x00,0x00,0x00,0x48,0x42,0x35,0x34,0x41,0x32,
	221	0x35,0x36,0x38,0x4b,0x4e,0x2d,0x41,0x37,0x35,0x42,
	222	0x20,0x30,0x20
	223	};
	224
	225	/* Audio support */
051c190b HC	226	static void audio_init (PCIBus *pci_bus)
051c190b HC	227	{
7899f799 IY	228	vt82c686b_ac97_init(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 5));
7899f799 IY	229	vt82c686b_mc97_init(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 6));
051c190b	230	}
051c190b HC	231
	232	/* Network support */
	233	static void network_init (void)
	234	{
	235	int i;
	236
	237	for(i = 0; i < nb_nics; i++) {
	238	NICInfo *nd = &nd_table[i];
	239	const char *default_devaddr = NULL;
	240
	241	if (i == 0 && (!nd->model \|\| strcmp(nd->model, "rtl8139") == 0)) {
	242	/* The fulong board has a RTL8139 card using PCI SLOT 7 */
	243	default_devaddr = "07";
	244	}
	245
	246	pci_nic_init_nofail(nd, "rtl8139", default_devaddr);
	247	}
	248	}
	249
	250	static void cpu_request_exit(void *opaque, int irq, int level)
	251	{
61c56c8c	252	CPUMIPSState *env = cpu_single_env;
051c190b HC	253
	254	if (env && level) {
	255	cpu_exit(env);
	256	}
	257	}
	258
	259	static void mips_fulong2e_init(ram_addr_t ram_size, const char *boot_device,
	260	const char kernel_filename, const char kernel_cmdline,
	261	const char initrd_filename, const char cpu_model)
	262	{
	263	char *filename;
13faf2a7 AK	264	MemoryRegion *address_space_mem = get_system_memory();
	265	MemoryRegion *ram = g_new(MemoryRegion, 1);
	266	MemoryRegion *bios = g_new(MemoryRegion, 1);
093209cd	267	long bios_size;
051c190b HC	268	int64_t kernel_entry;
	269	qemu_irq *i8259;
	270	qemu_irq *cpu_exit_irq;
051c190b	271	PCIBus *pci_bus;
48a18b3c	272	ISABus *isa_bus;
051c190b HC	273	i2c_bus *smbus;
	274	int i;
	275	DriveInfo hd[MAX_IDE_BUS MAX_IDE_DEVS];
f0f80366	276	MIPSCPU *cpu;
61c56c8c	277	CPUMIPSState *env;
051c190b HC	278
	279	/* init CPUs */
	280	if (cpu_model == NULL) {
	281	cpu_model = "Loongson-2E";
	282	}
f0f80366 AF	283	cpu = cpu_mips_init(cpu_model);
f0f80366 AF	284	if (cpu == NULL) {
051c190b HC	285	fprintf(stderr, "Unable to find CPU definition\n");
	286	exit(1);
	287	}
f0f80366	288	env = &cpu->env;
051c190b	289
800cf598	290	qemu_register_reset(main_cpu_reset, cpu);
051c190b HC	291
	292	/* fulong 2e has 256M ram. */
	293	ram_size = 256 * 1024 * 1024;
	294
	295	/* fulong 2e has a 1M flash.Winbond W39L040AP70Z */
	296	bios_size = 1024 * 1024;
	297
	298	/* allocate RAM */
c5705a77 AK	299	memory_region_init_ram(ram, "fulong2e.ram", ram_size);
	300	vmstate_register_ram_global(ram);
	301	memory_region_init_ram(bios, "fulong2e.bios", bios_size);
	302	vmstate_register_ram_global(bios);
13faf2a7	303	memory_region_set_readonly(bios, true);
051c190b	304
13faf2a7 AK	305	memory_region_add_subregion(address_space_mem, 0, ram);
13faf2a7 AK	306	memory_region_add_subregion(address_space_mem, 0x1fc00000LL, bios);
051c190b HC	307
	308	/* We do not support flash operation, just loading pmon.bin as raw BIOS.
	309	* Please use -L to set the BIOS path and -bios to set bios name. */
	310
	311	if (kernel_filename) {
	312	loaderparams.ram_size = ram_size;
	313	loaderparams.kernel_filename = kernel_filename;
	314	loaderparams.kernel_cmdline = kernel_cmdline;
	315	loaderparams.initrd_filename = initrd_filename;
	316	kernel_entry = load_kernel (env);
13faf2a7	317	write_bootloader(env, memory_region_get_ram_ptr(bios), kernel_entry);
051c190b	318	} else {
33dd2983 AJ	319	if (bios_name == NULL) {
33dd2983 AJ	320	bios_name = FULONG_BIOSNAME;
051c190b HC	321	}
	322	filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
	323	if (filename) {
	324	bios_size = load_image_targphys(filename, 0x1fc00000LL,
	325	BIOS_SIZE);
7267c094	326	g_free(filename);
051c190b HC	327	} else {
	328	bios_size = -1;
	329	}
	330
33dd2983 AJ	331	if ((bios_size < 0 \|\| bios_size > BIOS_SIZE) && !kernel_filename) {
33dd2983 AJ	332	fprintf(stderr, "qemu: Could not load MIPS bios '%s'\n", bios_name);
051c190b	333	exit(1);
33dd2983	334	}
051c190b HC	335	}
	336
	337	/* Init internal devices */
	338	cpu_mips_irq_init_cpu(env);
	339	cpu_mips_clock_init(env);
	340
051c190b HC	341	/* North bridge, Bonito --> IP2 */
	342	pci_bus = bonito_init((qemu_irq *)&(env->irq[2]));
	343
	344	/* South bridge */
75717903	345	ide_drive_get(hd, MAX_IDE_BUS);
051c190b	346
c9940edb HP	347	isa_bus = vt82c686b_init(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 0));
c9940edb HP	348	if (!isa_bus) {
b2bedb21	349	fprintf(stderr, "vt82c686b_init error\n");
051c190b HC	350	exit(1);
	351	}
	352
7e17a217 JK	353	/* Interrupt controller */
7e17a217 JK	354	/* The 8259 -> IP5 */
48a18b3c HP	355	i8259 = i8259_init(isa_bus, env->irq[5]);
48a18b3c HP	356	isa_bus_irqs(isa_bus, i8259);
7e17a217	357
7899f799	358	vt82c686b_ide_init(pci_bus, hd, PCI_DEVFN(FULONG2E_VIA_SLOT, 1));
afb9a60e GH	359	pci_create_simple(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 2),
	360	"vt82c686b-usb-uhci");
	361	pci_create_simple(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 3),
	362	"vt82c686b-usb-uhci");
051c190b	363
7899f799	364	smbus = vt82c686b_pm_init(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 4),
051c190b	365	0xeee1, NULL);
051c190b	366	/* TODO: Populate SPD eeprom data. */
a88df0b9	367	smbus_eeprom_init(smbus, 1, eeprom_spd, sizeof(eeprom_spd));
051c190b HC	368
051c190b HC	369	/* init other devices */
319ba9f5	370	pit = pit_init(isa_bus, 0x40, 0, NULL);
051c190b HC	371	cpu_exit_irq = qemu_allocate_irqs(cpu_request_exit, NULL, 1);
	372	DMA_init(0, cpu_exit_irq);
	373
	374	/* Super I/O */
48a18b3c	375	isa_create_simple(isa_bus, "i8042");
051c190b	376
48a18b3c	377	rtc_init(isa_bus, 2000, NULL);
051c190b HC	378
	379	for(i = 0; i < MAX_SERIAL_PORTS; i++) {
	380	if (serial_hds[i]) {
48a18b3c	381	serial_isa_init(isa_bus, i, serial_hds[i]);
051c190b HC	382	}
	383	}
	384
	385	if (parallel_hds[0]) {
48a18b3c	386	parallel_init(isa_bus, 0, parallel_hds[0]);
051c190b HC	387	}
	388
	389	/* Sound card */
051c190b	390	audio_init(pci_bus);
051c190b HC	391	/* Network card */
	392	network_init();
	393	}
	394
	395	QEMUMachine mips_fulong2e_machine = {
	396	.name = "fulong2e",
	397	.desc = "Fulong 2e mini pc",
	398	.init = mips_fulong2e_init,
	399	};
	400
	401	static void mips_fulong2e_machine_init(void)
	402	{
	403	qemu_register_machine(&mips_fulong2e_machine);
	404	}
	405
	406	machine_init(mips_fulong2e_machine_init);