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1/*
2 * QEMU MIPS Jazz support
3 *
4 * Copyright (c) 2007-2008 Hervé Poussineau
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24
25#include "hw.h"
26#include "mips.h"
b970ea8f 27#include "mips_cpudevs.h"
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28#include "pc.h"
29#include "isa.h"
30#include "fdc.h"
31#include "sysemu.h"
0dfa5ef9 32#include "arch_init.h"
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33#include "boards.h"
34#include "net.h"
1cd3af54 35#include "esp.h"
bba831e8 36#include "mips-bios.h"
ca20cf32 37#include "loader.h"
1d914fa0 38#include "mc146818rtc.h"
2446333c 39#include "blockdev.h"
cd3e2409 40#include "sysbus.h"
be20f9e9 41#include "exec-memory.h"
4ce7ff6e 42
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43enum jazz_model_e
44{
45 JAZZ_MAGNUM,
c171148c 46 JAZZ_PICA61,
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47};
48
49static void main_cpu_reset(void *opaque)
50{
51 CPUState *env = opaque;
52 cpu_reset(env);
53}
54
60581b37 55static uint64_t rtc_read(void *opaque, target_phys_addr_t addr, unsigned size)
4ce7ff6e 56{
afcea8cb 57 return cpu_inw(0x71);
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58}
59
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60static void rtc_write(void *opaque, target_phys_addr_t addr,
61 uint64_t val, unsigned size)
4ce7ff6e 62{
afcea8cb 63 cpu_outw(0x71, val & 0xff);
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64}
65
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66static const MemoryRegionOps rtc_ops = {
67 .read = rtc_read,
68 .write = rtc_write,
69 .endianness = DEVICE_NATIVE_ENDIAN,
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70};
71
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72static uint64_t dma_dummy_read(void *opaque, target_phys_addr_t addr,
73 unsigned size)
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74{
75 /* Nothing to do. That is only to ensure that
76 * the current DMA acknowledge cycle is completed. */
60581b37 77 return 0xff;
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78}
79
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80static void dma_dummy_write(void *opaque, target_phys_addr_t addr,
81 uint64_t val, unsigned size)
82{
83 /* Nothing to do. That is only to ensure that
84 * the current DMA acknowledge cycle is completed. */
85}
c6945b15 86
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87static const MemoryRegionOps dma_dummy_ops = {
88 .read = dma_dummy_read,
89 .write = dma_dummy_write,
90 .endianness = DEVICE_NATIVE_ENDIAN,
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91};
92
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93#define MAGNUM_BIOS_SIZE_MAX 0x7e000
94#define MAGNUM_BIOS_SIZE (BIOS_SIZE < MAGNUM_BIOS_SIZE_MAX ? BIOS_SIZE : MAGNUM_BIOS_SIZE_MAX)
95
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96static void cpu_request_exit(void *opaque, int irq, int level)
97{
98 CPUState *env = cpu_single_env;
99
100 if (env && level) {
101 cpu_exit(env);
102 }
103}
104
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105static void mips_jazz_init(MemoryRegion *address_space,
106 MemoryRegion *address_space_io,
107 ram_addr_t ram_size,
108 const char *cpu_model,
109 enum jazz_model_e jazz_model)
4ce7ff6e 110{
5cea8590 111 char *filename;
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112 int bios_size, n;
113 CPUState *env;
114 qemu_irq *rc4030, *i8259;
c6945b15 115 rc4030_dma *dmas;
68238a9e 116 void* rc4030_opaque;
60581b37 117 MemoryRegion *rtc = g_new(MemoryRegion, 1);
dbff76ac 118 MemoryRegion *i8042 = g_new(MemoryRegion, 1);
60581b37 119 MemoryRegion *dma_dummy = g_new(MemoryRegion, 1);
a65f56ee 120 NICInfo *nd;
cd3e2409
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121 DeviceState *dev;
122 SysBusDevice *sysbus;
48a18b3c 123 ISABus *isa_bus;
64d7e9a4 124 ISADevice *pit;
fd8014e1 125 DriveInfo *fds[MAX_FD];
73d74342 126 qemu_irq esp_reset, dma_enable;
4556bd8b 127 qemu_irq *cpu_exit_irq;
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128 MemoryRegion *ram = g_new(MemoryRegion, 1);
129 MemoryRegion *bios = g_new(MemoryRegion, 1);
130 MemoryRegion *bios2 = g_new(MemoryRegion, 1);
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131
132 /* init CPUs */
133 if (cpu_model == NULL) {
134#ifdef TARGET_MIPS64
135 cpu_model = "R4000";
136#else
137 /* FIXME: All wrong, this maybe should be R3000 for the older JAZZs. */
138 cpu_model = "24Kf";
139#endif
140 }
141 env = cpu_init(cpu_model);
142 if (!env) {
143 fprintf(stderr, "Unable to find CPU definition\n");
144 exit(1);
145 }
a08d4367 146 qemu_register_reset(main_cpu_reset, env);
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147
148 /* allocate RAM */
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149 memory_region_init_ram(ram, NULL, "mips_jazz.ram", ram_size);
150 memory_region_add_subregion(address_space, 0, ram);
dcac9679 151
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152 memory_region_init_ram(bios, NULL, "mips_jazz.bios", MAGNUM_BIOS_SIZE);
153 memory_region_set_readonly(bios, true);
154 memory_region_init_alias(bios2, "mips_jazz.bios", bios,
155 0, MAGNUM_BIOS_SIZE);
156 memory_region_add_subregion(address_space, 0x1fc00000LL, bios);
157 memory_region_add_subregion(address_space, 0xfff00000LL, bios2);
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158
159 /* load the BIOS image. */
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160 if (bios_name == NULL)
161 bios_name = BIOS_FILENAME;
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162 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
163 if (filename) {
164 bios_size = load_image_targphys(filename, 0xfff00000LL,
165 MAGNUM_BIOS_SIZE);
7267c094 166 g_free(filename);
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167 } else {
168 bios_size = -1;
169 }
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170 if (bios_size < 0 || bios_size > MAGNUM_BIOS_SIZE) {
171 fprintf(stderr, "qemu: Could not load MIPS bios '%s'\n",
5cea8590 172 bios_name);
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173 exit(1);
174 }
175
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176 /* Init CPU internal devices */
177 cpu_mips_irq_init_cpu(env);
178 cpu_mips_clock_init(env);
179
180 /* Chipset */
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181 rc4030_opaque = rc4030_init(env->irq[6], env->irq[3], &rc4030, &dmas,
182 address_space);
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183 memory_region_init_io(dma_dummy, &dma_dummy_ops, NULL, "dummy_dma", 0x1000);
184 memory_region_add_subregion(address_space, 0x8000d000, dma_dummy);
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185
186 /* ISA devices */
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HP
187 isa_bus = isa_bus_new(NULL, address_space_io);
188 i8259 = i8259_init(isa_bus, env->irq[4]);
189 isa_bus_irqs(isa_bus, i8259);
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BS
190 cpu_exit_irq = qemu_allocate_irqs(cpu_request_exit, NULL, 1);
191 DMA_init(0, cpu_exit_irq);
48a18b3c 192 pit = pit_init(isa_bus, 0x40, 0);
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193 pcspk_init(pit);
194
195 /* ISA IO space at 0x90000000 */
968d683c 196 isa_mmio_init(0x90000000, 0x01000000);
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197 isa_mem_base = 0x11000000;
198
199 /* Video card */
200 switch (jazz_model) {
201 case JAZZ_MAGNUM:
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HP
202 dev = qdev_create(NULL, "sysbus-g364");
203 qdev_init_nofail(dev);
204 sysbus = sysbus_from_qdev(dev);
205 sysbus_mmio_map(sysbus, 0, 0x60080000);
206 sysbus_mmio_map(sysbus, 1, 0x40000000);
207 sysbus_connect_irq(sysbus, 0, rc4030[3]);
208 {
209 /* Simple ROM, so user doesn't have to provide one */
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210 MemoryRegion *rom_mr = g_new(MemoryRegion, 1);
211 memory_region_init_ram(rom_mr, NULL, "g364fb.rom", 0x80000);
212 memory_region_set_readonly(rom_mr, true);
213 uint8_t *rom = memory_region_get_ram_ptr(rom_mr);
214 memory_region_add_subregion(address_space, 0x60000000, rom_mr);
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215 rom[0] = 0x10; /* Mips G364 */
216 }
4ce7ff6e 217 break;
c171148c 218 case JAZZ_PICA61:
be20f9e9 219 isa_vga_mm_init(0x40000000, 0x60000000, 0, get_system_memory());
c171148c 220 break;
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221 default:
222 break;
223 }
224
225 /* Network controller */
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226 for (n = 0; n < nb_nics; n++) {
227 nd = &nd_table[n];
228 if (!nd->model)
7267c094 229 nd->model = g_strdup("dp83932");
a65f56ee 230 if (strcmp(nd->model, "dp83932") == 0) {
024e5bb6 231 dp83932_init(nd, 0x80001000, 2, get_system_memory(), rc4030[4],
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232 rc4030_opaque, rc4030_dma_memory_rw);
233 break;
234 } else if (strcmp(nd->model, "?") == 0) {
235 fprintf(stderr, "qemu: Supported NICs: dp83932\n");
236 exit(1);
237 } else {
238 fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd->model);
239 exit(1);
240 }
241 }
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242
243 /* SCSI adapter */
cfb9de9c
PB
244 esp_init(0x80002000, 0,
245 rc4030_dma_read, rc4030_dma_write, dmas[0],
73d74342 246 rc4030[5], &esp_reset, &dma_enable);
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247
248 /* Floppy */
249 if (drive_get_max_bus(IF_FLOPPY) >= MAX_FD) {
250 fprintf(stderr, "qemu: too many floppy drives\n");
251 exit(1);
252 }
253 for (n = 0; n < MAX_FD; n++) {
fd8014e1 254 fds[n] = drive_get(IF_FLOPPY, 0, n);
4ce7ff6e 255 }
2091ba23 256 fdctrl_init_sysbus(rc4030[1], 0, 0x80003000, fds);
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257
258 /* Real time clock */
48a18b3c 259 rtc_init(isa_bus, 1980, NULL);
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260 memory_region_init_io(rtc, &rtc_ops, NULL, "rtc", 0x1000);
261 memory_region_add_subregion(address_space, 0x80004000, rtc);
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262
263 /* Keyboard (i8042) */
dbff76ac
RH
264 i8042_mm_init(rc4030[6], rc4030[7], i8042, 0x1000, 0x1);
265 memory_region_add_subregion(address_space, 0x80005000, i8042);
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266
267 /* Serial ports */
2d48377a 268 if (serial_hds[0]) {
39186d8a
RH
269 serial_mm_init(address_space, 0x80006000, 0, rc4030[8], 8000000/16,
270 serial_hds[0], DEVICE_NATIVE_ENDIAN);
2d48377a
BS
271 }
272 if (serial_hds[1]) {
39186d8a
RH
273 serial_mm_init(address_space, 0x80007000, 0, rc4030[9], 8000000/16,
274 serial_hds[1], DEVICE_NATIVE_ENDIAN);
2d48377a 275 }
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276
277 /* Parallel port */
278 if (parallel_hds[0])
63858cd9
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279 parallel_mm_init(address_space, 0x80008000, 0, rc4030[0],
280 parallel_hds[0]);
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281
282 /* Sound card */
283 /* FIXME: missing Jazz sound at 0x8000c000, rc4030[2] */
4a0f031d 284 audio_init(isa_bus, NULL);
4ce7ff6e 285
cd3e2409
HP
286 /* NVRAM */
287 dev = qdev_create(NULL, "ds1225y");
288 qdev_init_nofail(dev);
289 sysbus = sysbus_from_qdev(dev);
290 sysbus_mmio_map(sysbus, 0, 0x80009000);
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291
292 /* LED indicator */
c6017850 293 jazz_led_init(address_space, 0x8000f000);
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294}
295
296static
c227f099 297void mips_magnum_init (ram_addr_t ram_size,
3023f332 298 const char *boot_device,
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299 const char *kernel_filename, const char *kernel_cmdline,
300 const char *initrd_filename, const char *cpu_model)
301{
c2d0d012
RH
302 mips_jazz_init(get_system_memory(), get_system_io(),
303 ram_size, cpu_model, JAZZ_MAGNUM);
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304}
305
c171148c 306static
c227f099 307void mips_pica61_init (ram_addr_t ram_size,
3023f332 308 const char *boot_device,
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309 const char *kernel_filename, const char *kernel_cmdline,
310 const char *initrd_filename, const char *cpu_model)
311{
c2d0d012
RH
312 mips_jazz_init(get_system_memory(), get_system_io(),
313 ram_size, cpu_model, JAZZ_PICA61);
c171148c
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314}
315
f80f9ec9 316static QEMUMachine mips_magnum_machine = {
eec2743e
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317 .name = "magnum",
318 .desc = "MIPS Magnum",
319 .init = mips_magnum_init,
c6945b15 320 .use_scsi = 1,
4ce7ff6e 321};
c171148c 322
f80f9ec9 323static QEMUMachine mips_pica61_machine = {
eec2743e
TS
324 .name = "pica61",
325 .desc = "Acer Pica 61",
326 .init = mips_pica61_init,
c6945b15 327 .use_scsi = 1,
c171148c 328};
f80f9ec9
AL
329
330static void mips_jazz_machine_init(void)
331{
332 qemu_register_machine(&mips_magnum_machine);
333 qemu_register_machine(&mips_pica61_machine);
334}
335
336machine_init(mips_jazz_machine_init);