]> git.proxmox.com Git - qemu.git/blame - hw/openrisc/pic_cpu.c
pc: disable pci-info
[qemu.git] / hw / openrisc / pic_cpu.c
CommitLineData
dd29c7fb
JL
1/*
2 * OpenRISC Programmable Interrupt Controller support.
3 *
4 * Copyright (c) 2011-2012 Jia Liu <proljc@gmail.com>
5 * Feng Gao <gf91597@gmail.com>
6 *
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2 of the License, or (at your option) any later version.
11 *
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
16 *
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
19 */
20
83c9f4ca 21#include "hw/hw.h"
dd29c7fb
JL
22#include "cpu.h"
23
24/* OpenRISC pic handler */
25static void openrisc_pic_cpu_handler(void *opaque, int irq, int level)
26{
27 OpenRISCCPU *cpu = (OpenRISCCPU *)opaque;
d8ed887b 28 CPUState *cs = CPU(cpu);
7717f248 29 uint32_t irq_bit;
dd29c7fb
JL
30
31 if (irq > 31 || irq < 0) {
32 return;
33 }
34
7717f248
JL
35 irq_bit = 1U << irq;
36
dd29c7fb
JL
37 if (level) {
38 cpu->env.picsr |= irq_bit;
39 } else {
40 cpu->env.picsr &= ~irq_bit;
41 }
42
ed396e2b
JL
43 if (cpu->env.picsr & cpu->env.picmr) {
44 cpu_interrupt(cs, CPU_INTERRUPT_HARD);
45 } else {
46 cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD);
47 cpu->env.picsr = 0;
dd29c7fb
JL
48 }
49}
50
51void cpu_openrisc_pic_init(OpenRISCCPU *cpu)
52{
53 int i;
54 qemu_irq *qi;
55 qi = qemu_allocate_irqs(openrisc_pic_cpu_handler, cpu, NR_IRQS);
56
57 for (i = 0; i < NR_IRQS; i++) {
58 cpu->env.irq[i] = qi[i];
59 }
60}