[qemu.git] / hw / palm.c

/*
 * PalmOne's (TM) PDAs.
 *
 * Copyright (C) 2006-2007 Andrzej Zaborowski  <balrog@zabor.org>
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */
#include "vl.h"

static uint32_t static_readb(void *opaque, target_phys_addr_t offset)
{
    uint32_t *val = (uint32_t *) opaque;
    return *val >> ((offset & 3) << 3);
}

static uint32_t static_readh(void *opaque, target_phys_addr_t offset) {
    uint32_t *val = (uint32_t *) opaque;
    return *val >> ((offset & 1) << 3);
}

static uint32_t static_readw(void *opaque, target_phys_addr_t offset) {
    uint32_t *val = (uint32_t *) opaque;
    return *val >> ((offset & 0) << 3);
}

static void static_write(void *opaque, target_phys_addr_t offset,
                uint32_t value) {
#ifdef SPY
    printf("%s: value %08lx written at " PA_FMT "\n",
                    __FUNCTION__, value, offset);
#endif
}

static CPUReadMemoryFunc *static_readfn[] = {
    static_readb,
    static_readh,
    static_readw,
};

static CPUWriteMemoryFunc *static_writefn[] = {
    static_write,
    static_write,
    static_write,
};

/* Palm Tunsgten|E support */

/* Shared GPIOs */
#define PALMTE_USBDETECT_GPIO	0
#define PALMTE_USB_OR_DC_GPIO	1
#define PALMTE_TSC_GPIO		4
#define PALMTE_PINTDAV_GPIO	6
#define PALMTE_MMC_WP_GPIO	8
#define PALMTE_MMC_POWER_GPIO	9
#define PALMTE_HDQ_GPIO		11
#define PALMTE_HEADPHONES_GPIO	14
#define PALMTE_SPEAKER_GPIO	15
/* MPU private GPIOs */
#define PALMTE_DC_GPIO		2
#define PALMTE_MMC_SWITCH_GPIO	4
#define PALMTE_MMC1_GPIO	6
#define PALMTE_MMC2_GPIO	7
#define PALMTE_MMC3_GPIO	11

static void palmte_microwire_setup(struct omap_mpu_state_s *cpu)
{
}

static struct {
    int row;
    int column;
} palmte_keymap[0x80] = {
    [0 ... 0x7f] = { -1, -1 },
    [0x3b] = { 0, 0 },	/* F1	-> Calendar */
    [0x3c] = { 1, 0 },	/* F2	-> Contacts */
    [0x3d] = { 2, 0 },	/* F3	-> Tasks List */
    [0x3e] = { 3, 0 },	/* F4	-> Note Pad */
    [0x01] = { 4, 0 },	/* Esc	-> Power */
    [0x4b] = { 0, 1 },	/* 	   Left */
    [0x50] = { 1, 1 },	/* 	   Down */
    [0x48] = { 2, 1 },	/*	   Up */
    [0x4d] = { 3, 1 },	/*	   Right */
    [0x4c] = { 4, 1 },	/* 	   Centre */
    [0x39] = { 4, 1 },	/* Spc	-> Centre */
};

static void palmte_button_event(void *opaque, int keycode)
{
    struct omap_mpu_state_s *cpu = (struct omap_mpu_state_s *) opaque;

    if (palmte_keymap[keycode & 0x7f].row != -1)
        omap_mpuio_key(cpu->mpuio,
                        palmte_keymap[keycode & 0x7f].row,
                        palmte_keymap[keycode & 0x7f].column,
                        !(keycode & 0x80));
}

static void palmte_mmc_cover(void *opaque, int line, int level)
{
    struct omap_mpu_state_s *cpu = (struct omap_mpu_state_s *) opaque;

    qemu_set_irq(omap_mpuio_in_get(cpu->mpuio)[PALMTE_MMC_SWITCH_GPIO],
                    !level);
}

static void palmte_init(int ram_size, int vga_ram_size, int boot_device,
                DisplayState *ds, const char **fd_filename, int snapshot,
                const char *kernel_filename, const char *kernel_cmdline,
                const char *initrd_filename, const char *cpu_model)
{
    struct omap_mpu_state_s *cpu;
    int flash_size = 0x00800000;
    int sdram_size = 0x02000000;
    int io;
    static uint32_t cs0val = 0xffffffff;
    static uint32_t cs1val = 0x0000e1a0;
    static uint32_t cs2val = 0x0000e1a0;
    static uint32_t cs3val = 0xe1a0e1a0;
    ram_addr_t phys_flash;
    int rom_size, rom_loaded = 0;

    if (ram_size < flash_size + sdram_size + OMAP15XX_SRAM_SIZE) {
        fprintf(stderr, "This architecture uses %i bytes of memory\n",
                        flash_size + sdram_size + OMAP15XX_SRAM_SIZE);
        exit(1);
    }

    cpu = omap310_mpu_init(sdram_size, ds, cpu_model);

    /* External Flash (EMIFS) */
    cpu_register_physical_memory(OMAP_CS0_BASE, flash_size,
                    (phys_flash = qemu_ram_alloc(flash_size)) | IO_MEM_ROM);

    io = cpu_register_io_memory(0, static_readfn, static_writefn, &cs0val);
    cpu_register_physical_memory(OMAP_CS0_BASE + flash_size,
                    OMAP_CS0_SIZE - flash_size, io);
    io = cpu_register_io_memory(0, static_readfn, static_writefn, &cs1val);
    cpu_register_physical_memory(OMAP_CS1_BASE, OMAP_CS1_SIZE, io);
    io = cpu_register_io_memory(0, static_readfn, static_writefn, &cs2val);
    cpu_register_physical_memory(OMAP_CS2_BASE, OMAP_CS2_SIZE, io);
    io = cpu_register_io_memory(0, static_readfn, static_writefn, &cs3val);
    cpu_register_physical_memory(OMAP_CS3_BASE, OMAP_CS3_SIZE, io);

    palmte_microwire_setup(cpu);

    qemu_add_kbd_event_handler(palmte_button_event, cpu);

    omap_mmc_handlers(cpu->mmc,
                    omap_gpio_in_get(cpu->gpio)[PALMTE_MMC_WP_GPIO],
                    qemu_allocate_irqs(palmte_mmc_cover, cpu, 1)[0]);

    /* Setup initial (reset) machine state */
    if (nb_option_roms) {
        rom_size = get_image_size(option_rom[0]);
        if (rom_size > flash_size)
            fprintf(stderr, "%s: ROM image too big (%x > %x)\n",
                            __FUNCTION__, rom_size, flash_size);
        else if (rom_size > 0 && load_image(option_rom[0],
                                phys_ram_base + phys_flash) > 0) {
            rom_loaded = 1;
            cpu->env->regs[15] = 0x00000000;
        } else
            fprintf(stderr, "%s: error loading '%s'\n",
                            __FUNCTION__, option_rom[0]);
    }

    if (!rom_loaded && !kernel_filename) {
        fprintf(stderr, "Kernel or ROM image must be specified\n");
        exit(1);
    }

    /* Load the kernel.  */
    if (kernel_filename) {
        /* Start at bootloader.  */
        cpu->env->regs[15] = OMAP_EMIFF_BASE;

        arm_load_kernel(cpu->env, sdram_size, kernel_filename, kernel_cmdline,
                        initrd_filename, 0x331, OMAP_EMIFF_BASE);
    }

    dpy_resize(ds, 320, 320);
}

QEMUMachine palmte_machine = {
    "cheetah",
    "Palm Tungsten|E aka. Cheetah PDA (OMAP310)",
    palmte_init,
};
Commit	Line	Data
c3d2689d AZ	1	/*
	2	* PalmOne's (TM) PDAs.
	3	*
	4	* Copyright (C) 2006-2007 Andrzej Zaborowski <balrog@zabor.org>
	5	*
	6	* This program is free software; you can redistribute it and/or
	7	* modify it under the terms of the GNU General Public License as
	8	* published by the Free Software Foundation; either version 2 of
	9	* the License, or (at your option) any later version.
	10	*
	11	* This program is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	* GNU General Public License for more details.
	15	*
	16	* You should have received a copy of the GNU General Public License
	17	* along with this program; if not, write to the Free Software
	18	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	19	* MA 02111-1307 USA
	20	*/
	21	#include "vl.h"
	22
	23	static uint32_t static_readb(void *opaque, target_phys_addr_t offset)
	24	{
	25	uint32_t val = (uint32_t ) opaque;
	26	return *val >> ((offset & 3) << 3);
	27	}
	28
	29	static uint32_t static_readh(void *opaque, target_phys_addr_t offset) {
	30	uint32_t val = (uint32_t ) opaque;
	31	return *val >> ((offset & 1) << 3);
	32	}
	33
	34	static uint32_t static_readw(void *opaque, target_phys_addr_t offset) {
	35	uint32_t val = (uint32_t ) opaque;
	36	return *val >> ((offset & 0) << 3);
	37	}
	38
	39	static void static_write(void *opaque, target_phys_addr_t offset,
	40	uint32_t value) {
	41	#ifdef SPY
	42	printf("%s: value %08lx written at " PA_FMT "\n",
	43	__FUNCTION__, value, offset);
	44	#endif
	45	}
	46
	47	static CPUReadMemoryFunc *static_readfn[] = {
	48	static_readb,
	49	static_readh,
	50	static_readw,
	51	};
	52
	53	static CPUWriteMemoryFunc *static_writefn[] = {
	54	static_write,
	55	static_write,
	56	static_write,
	57	};
	58
	59	/* Palm Tunsgten\|E support */
8e129e07 AZ	60
	61	/* Shared GPIOs */
	62	#define PALMTE_USBDETECT_GPIO 0
	63	#define PALMTE_USB_OR_DC_GPIO 1
	64	#define PALMTE_TSC_GPIO 4
	65	#define PALMTE_PINTDAV_GPIO 6
	66	#define PALMTE_MMC_WP_GPIO 8
	67	#define PALMTE_MMC_POWER_GPIO 9
	68	#define PALMTE_HDQ_GPIO 11
	69	#define PALMTE_HEADPHONES_GPIO 14
	70	#define PALMTE_SPEAKER_GPIO 15
	71	/* MPU private GPIOs */
	72	#define PALMTE_DC_GPIO 2
	73	#define PALMTE_MMC_SWITCH_GPIO 4
	74	#define PALMTE_MMC1_GPIO 6
	75	#define PALMTE_MMC2_GPIO 7
	76	#define PALMTE_MMC3_GPIO 11
	77
c3d2689d AZ	78	static void palmte_microwire_setup(struct omap_mpu_state_s *cpu)
	79	{
	80	}
	81
38a34e1d AZ	82	static struct {
	83	int row;
	84	int column;
	85	} palmte_keymap[0x80] = {
	86	[0 ... 0x7f] = { -1, -1 },
	87	[0x3b] = { 0, 0 }, /* F1 -> Calendar */
	88	[0x3c] = { 1, 0 }, /* F2 -> Contacts */
	89	[0x3d] = { 2, 0 }, /* F3 -> Tasks List */
	90	[0x3e] = { 3, 0 }, /* F4 -> Note Pad */
	91	[0x01] = { 4, 0 }, /* Esc -> Power */
	92	[0x4b] = { 0, 1 }, /* Left */
	93	[0x50] = { 1, 1 }, /* Down */
	94	[0x48] = { 2, 1 }, /* Up */
	95	[0x4d] = { 3, 1 }, /* Right */
	96	[0x4c] = { 4, 1 }, /* Centre */
	97	[0x39] = { 4, 1 }, /* Spc -> Centre */
	98	};
	99
	100	static void palmte_button_event(void *opaque, int keycode)
	101	{
	102	struct omap_mpu_state_s cpu = (struct omap_mpu_state_s ) opaque;
	103
	104	if (palmte_keymap[keycode & 0x7f].row != -1)
	105	omap_mpuio_key(cpu->mpuio,
	106	palmte_keymap[keycode & 0x7f].row,
	107	palmte_keymap[keycode & 0x7f].column,
	108	!(keycode & 0x80));
	109	}
	110
8e129e07 AZ	111	static void palmte_mmc_cover(void *opaque, int line, int level)
	112	{
	113	struct omap_mpu_state_s cpu = (struct omap_mpu_state_s ) opaque;
	114
	115	qemu_set_irq(omap_mpuio_in_get(cpu->mpuio)[PALMTE_MMC_SWITCH_GPIO],
	116	!level);
	117	}
	118
c3d2689d AZ	119	static void palmte_init(int ram_size, int vga_ram_size, int boot_device,
	120	DisplayState ds, const char *fd_filename, int snapshot,
	121	const char kernel_filename, const char kernel_cmdline,
	122	const char initrd_filename, const char cpu_model)
	123	{
	124	struct omap_mpu_state_s *cpu;
	125	int flash_size = 0x00800000;
	126	int sdram_size = 0x02000000;
	127	int io;
	128	static uint32_t cs0val = 0xffffffff;
	129	static uint32_t cs1val = 0x0000e1a0;
	130	static uint32_t cs2val = 0x0000e1a0;
	131	static uint32_t cs3val = 0xe1a0e1a0;
	132	ram_addr_t phys_flash;
	133	int rom_size, rom_loaded = 0;
	134
	135	if (ram_size < flash_size + sdram_size + OMAP15XX_SRAM_SIZE) {
	136	fprintf(stderr, "This architecture uses %i bytes of memory\n",
	137	flash_size + sdram_size + OMAP15XX_SRAM_SIZE);
	138	exit(1);
	139	}
	140
	141	cpu = omap310_mpu_init(sdram_size, ds, cpu_model);
	142
	143	/* External Flash (EMIFS) */
	144	cpu_register_physical_memory(OMAP_CS0_BASE, flash_size,
	145	(phys_flash = qemu_ram_alloc(flash_size)) \| IO_MEM_ROM);
	146
	147	io = cpu_register_io_memory(0, static_readfn, static_writefn, &cs0val);
	148	cpu_register_physical_memory(OMAP_CS0_BASE + flash_size,
	149	OMAP_CS0_SIZE - flash_size, io);
	150	io = cpu_register_io_memory(0, static_readfn, static_writefn, &cs1val);
	151	cpu_register_physical_memory(OMAP_CS1_BASE, OMAP_CS1_SIZE, io);
	152	io = cpu_register_io_memory(0, static_readfn, static_writefn, &cs2val);
	153	cpu_register_physical_memory(OMAP_CS2_BASE, OMAP_CS2_SIZE, io);
	154	io = cpu_register_io_memory(0, static_readfn, static_writefn, &cs3val);
	155	cpu_register_physical_memory(OMAP_CS3_BASE, OMAP_CS3_SIZE, io);
	156
	157	palmte_microwire_setup(cpu);
	158
38a34e1d AZ	159	qemu_add_kbd_event_handler(palmte_button_event, cpu);
38a34e1d AZ	160
64330148 AZ	161	omap_mmc_handlers(cpu->mmc,
64330148 AZ	162	omap_gpio_in_get(cpu->gpio)[PALMTE_MMC_WP_GPIO],
8e129e07 AZ	163	qemu_allocate_irqs(palmte_mmc_cover, cpu, 1)[0]);
8e129e07 AZ	164
c3d2689d AZ	165	/* Setup initial (reset) machine state */
	166	if (nb_option_roms) {
	167	rom_size = get_image_size(option_rom[0]);
	168	if (rom_size > flash_size)
	169	fprintf(stderr, "%s: ROM image too big (%x > %x)\n",
	170	__FUNCTION__, rom_size, flash_size);
	171	else if (rom_size > 0 && load_image(option_rom[0],
	172	phys_ram_base + phys_flash) > 0) {
	173	rom_loaded = 1;
	174	cpu->env->regs[15] = 0x00000000;
	175	} else
	176	fprintf(stderr, "%s: error loading '%s'\n",
	177	__FUNCTION__, option_rom[0]);
	178	}
	179
	180	if (!rom_loaded && !kernel_filename) {
	181	fprintf(stderr, "Kernel or ROM image must be specified\n");
	182	exit(1);
	183	}
	184
	185	/* Load the kernel. */
	186	if (kernel_filename) {
	187	/* Start at bootloader. */
	188	cpu->env->regs[15] = OMAP_EMIFF_BASE;
	189
	190	arm_load_kernel(cpu->env, sdram_size, kernel_filename, kernel_cmdline,
	191	initrd_filename, 0x331, OMAP_EMIFF_BASE);
	192	}
	193
	194	dpy_resize(ds, 320, 320);
	195	}
	196
	197	QEMUMachine palmte_machine = {
	198	"cheetah",
	199	"Palm Tungsten\|E aka. Cheetah PDA (OMAP310)",
	200	palmte_init,
	201	};