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80cabfad
FB
1/*
2 * QEMU PC System Emulator
5fafdf24 3 *
80cabfad 4 * Copyright (c) 2003-2004 Fabrice Bellard
5fafdf24 5 *
80cabfad
FB
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
80cabfad
FB
24#include "vl.h"
25
b41a2cd1
FB
26/* output Bochs bios info messages */
27//#define DEBUG_BIOS
28
80cabfad
FB
29#define BIOS_FILENAME "bios.bin"
30#define VGABIOS_FILENAME "vgabios.bin"
de9258a8 31#define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin"
80cabfad 32
a80274c3
PB
33/* Leave a chunk of memory at the top of RAM for the BIOS ACPI tables. */
34#define ACPI_DATA_SIZE 0x10000
80cabfad 35
baca51fa 36static fdctrl_t *floppy_controller;
b0a21b53 37static RTCState *rtc_state;
ec844b96 38static PITState *pit;
d592d303 39static IOAPICState *ioapic;
a5954d5c 40static PCIDevice *i440fx_state;
80cabfad 41
b41a2cd1 42static void ioport80_write(void *opaque, uint32_t addr, uint32_t data)
80cabfad
FB
43{
44}
45
f929aad6 46/* MSDOS compatibility mode FPU exception support */
d537cf6c 47static qemu_irq ferr_irq;
f929aad6
FB
48/* XXX: add IGNNE support */
49void cpu_set_ferr(CPUX86State *s)
50{
d537cf6c 51 qemu_irq_raise(ferr_irq);
f929aad6
FB
52}
53
54static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data)
55{
d537cf6c 56 qemu_irq_lower(ferr_irq);
f929aad6
FB
57}
58
28ab0e2e 59/* TSC handling */
28ab0e2e
FB
60uint64_t cpu_get_tsc(CPUX86State *env)
61{
1dce7c3c
FB
62 /* Note: when using kqemu, it is more logical to return the host TSC
63 because kqemu does not trap the RDTSC instruction for
64 performance reasons */
65#if USE_KQEMU
66 if (env->kqemu_enabled) {
67 return cpu_get_real_ticks();
5fafdf24 68 } else
1dce7c3c
FB
69#endif
70 {
71 return cpu_get_ticks();
72 }
28ab0e2e
FB
73}
74
a5954d5c
FB
75/* SMM support */
76void cpu_smm_update(CPUState *env)
77{
78 if (i440fx_state && env == first_cpu)
79 i440fx_set_smm(i440fx_state, (env->hflags >> HF_SMM_SHIFT) & 1);
80}
81
82
3de388f6
FB
83/* IRQ handling */
84int cpu_get_pic_interrupt(CPUState *env)
85{
86 int intno;
87
3de388f6
FB
88 intno = apic_get_interrupt(env);
89 if (intno >= 0) {
90 /* set irq request if a PIC irq is still pending */
91 /* XXX: improve that */
5fafdf24 92 pic_update_irq(isa_pic);
3de388f6
FB
93 return intno;
94 }
3de388f6 95 /* read the irq from the PIC */
0e21e12b
TS
96 if (!apic_accept_pic_intr(env))
97 return -1;
98
3de388f6
FB
99 intno = pic_read_irq(isa_pic);
100 return intno;
101}
102
d537cf6c 103static void pic_irq_request(void *opaque, int irq, int level)
3de388f6 104{
59b8ad81 105 CPUState *env = opaque;
0e21e12b 106 if (level && apic_accept_pic_intr(env))
59b8ad81 107 cpu_interrupt(env, CPU_INTERRUPT_HARD);
3de388f6
FB
108}
109
b0a21b53
FB
110/* PC cmos mappings */
111
80cabfad
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112#define REG_EQUIPMENT_BYTE 0x14
113
777428f2
FB
114static int cmos_get_fd_drive_type(int fd0)
115{
116 int val;
117
118 switch (fd0) {
119 case 0:
120 /* 1.44 Mb 3"5 drive */
121 val = 4;
122 break;
123 case 1:
124 /* 2.88 Mb 3"5 drive */
125 val = 5;
126 break;
127 case 2:
128 /* 1.2 Mb 5"5 drive */
129 val = 2;
130 break;
131 default:
132 val = 0;
133 break;
134 }
135 return val;
136}
137
5fafdf24 138static void cmos_init_hd(int type_ofs, int info_ofs, BlockDriverState *hd)
ba6c2377
FB
139{
140 RTCState *s = rtc_state;
141 int cylinders, heads, sectors;
142 bdrv_get_geometry_hint(hd, &cylinders, &heads, &sectors);
143 rtc_set_memory(s, type_ofs, 47);
144 rtc_set_memory(s, info_ofs, cylinders);
145 rtc_set_memory(s, info_ofs + 1, cylinders >> 8);
146 rtc_set_memory(s, info_ofs + 2, heads);
147 rtc_set_memory(s, info_ofs + 3, 0xff);
148 rtc_set_memory(s, info_ofs + 4, 0xff);
149 rtc_set_memory(s, info_ofs + 5, 0xc0 | ((heads > 8) << 3));
150 rtc_set_memory(s, info_ofs + 6, cylinders);
151 rtc_set_memory(s, info_ofs + 7, cylinders >> 8);
152 rtc_set_memory(s, info_ofs + 8, sectors);
153}
154
6ac0e82d
AZ
155/* convert boot_device letter to something recognizable by the bios */
156static int boot_device2nibble(char boot_device)
157{
158 switch(boot_device) {
159 case 'a':
160 case 'b':
161 return 0x01; /* floppy boot */
162 case 'c':
163 return 0x02; /* hard drive boot */
164 case 'd':
165 return 0x03; /* CD-ROM boot */
166 case 'n':
167 return 0x04; /* Network boot */
168 }
169 return 0;
170}
171
ba6c2377 172/* hd_table must contain 4 block drivers */
6ac0e82d 173static void cmos_init(int ram_size, const char *boot_device, BlockDriverState **hd_table)
80cabfad 174{
b0a21b53 175 RTCState *s = rtc_state;
28c5af54 176 int nbds, bds[3] = { 0, };
80cabfad 177 int val;
b41a2cd1 178 int fd0, fd1, nb;
ba6c2377 179 int i;
b0a21b53 180
b0a21b53 181 /* various important CMOS locations needed by PC/Bochs bios */
80cabfad
FB
182
183 /* memory size */
333190eb
FB
184 val = 640; /* base memory in K */
185 rtc_set_memory(s, 0x15, val);
186 rtc_set_memory(s, 0x16, val >> 8);
187
80cabfad
FB
188 val = (ram_size / 1024) - 1024;
189 if (val > 65535)
190 val = 65535;
b0a21b53
FB
191 rtc_set_memory(s, 0x17, val);
192 rtc_set_memory(s, 0x18, val >> 8);
193 rtc_set_memory(s, 0x30, val);
194 rtc_set_memory(s, 0x31, val >> 8);
80cabfad 195
9da98861
FB
196 if (ram_size > (16 * 1024 * 1024))
197 val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536);
198 else
199 val = 0;
80cabfad
FB
200 if (val > 65535)
201 val = 65535;
b0a21b53
FB
202 rtc_set_memory(s, 0x34, val);
203 rtc_set_memory(s, 0x35, val >> 8);
3b46e624 204
6ac0e82d 205 /* set boot devices, and disable floppy signature check if requested */
28c5af54
JM
206#define PC_MAX_BOOT_DEVICES 3
207 nbds = strlen(boot_device);
208 if (nbds > PC_MAX_BOOT_DEVICES) {
209 fprintf(stderr, "Too many boot devices for PC\n");
210 exit(1);
211 }
212 for (i = 0; i < nbds; i++) {
213 bds[i] = boot_device2nibble(boot_device[i]);
214 if (bds[i] == 0) {
215 fprintf(stderr, "Invalid boot device for PC: '%c'\n",
216 boot_device[i]);
217 exit(1);
218 }
219 }
220 rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]);
221 rtc_set_memory(s, 0x38, (bds[2] << 4) | (fd_bootchk ? 0x0 : 0x1));
80cabfad 222
b41a2cd1
FB
223 /* floppy type */
224
baca51fa
FB
225 fd0 = fdctrl_get_drive_type(floppy_controller, 0);
226 fd1 = fdctrl_get_drive_type(floppy_controller, 1);
80cabfad 227
777428f2 228 val = (cmos_get_fd_drive_type(fd0) << 4) | cmos_get_fd_drive_type(fd1);
b0a21b53 229 rtc_set_memory(s, 0x10, val);
3b46e624 230
b0a21b53 231 val = 0;
b41a2cd1 232 nb = 0;
80cabfad
FB
233 if (fd0 < 3)
234 nb++;
235 if (fd1 < 3)
236 nb++;
237 switch (nb) {
238 case 0:
239 break;
240 case 1:
b0a21b53 241 val |= 0x01; /* 1 drive, ready for boot */
80cabfad
FB
242 break;
243 case 2:
b0a21b53 244 val |= 0x41; /* 2 drives, ready for boot */
80cabfad
FB
245 break;
246 }
b0a21b53
FB
247 val |= 0x02; /* FPU is there */
248 val |= 0x04; /* PS/2 mouse installed */
249 rtc_set_memory(s, REG_EQUIPMENT_BYTE, val);
250
ba6c2377
FB
251 /* hard drives */
252
253 rtc_set_memory(s, 0x12, (hd_table[0] ? 0xf0 : 0) | (hd_table[1] ? 0x0f : 0));
254 if (hd_table[0])
255 cmos_init_hd(0x19, 0x1b, hd_table[0]);
5fafdf24 256 if (hd_table[1])
ba6c2377
FB
257 cmos_init_hd(0x1a, 0x24, hd_table[1]);
258
259 val = 0;
40b6ecc6 260 for (i = 0; i < 4; i++) {
ba6c2377 261 if (hd_table[i]) {
46d4767d
FB
262 int cylinders, heads, sectors, translation;
263 /* NOTE: bdrv_get_geometry_hint() returns the physical
264 geometry. It is always such that: 1 <= sects <= 63, 1
265 <= heads <= 16, 1 <= cylinders <= 16383. The BIOS
266 geometry can be different if a translation is done. */
267 translation = bdrv_get_translation_hint(hd_table[i]);
268 if (translation == BIOS_ATA_TRANSLATION_AUTO) {
269 bdrv_get_geometry_hint(hd_table[i], &cylinders, &heads, &sectors);
270 if (cylinders <= 1024 && heads <= 16 && sectors <= 63) {
271 /* No translation. */
272 translation = 0;
273 } else {
274 /* LBA translation. */
275 translation = 1;
276 }
40b6ecc6 277 } else {
46d4767d 278 translation--;
ba6c2377 279 }
ba6c2377
FB
280 val |= translation << (i * 2);
281 }
40b6ecc6 282 }
ba6c2377 283 rtc_set_memory(s, 0x39, val);
80cabfad
FB
284}
285
59b8ad81
FB
286void ioport_set_a20(int enable)
287{
288 /* XXX: send to all CPUs ? */
289 cpu_x86_set_a20(first_cpu, enable);
290}
291
292int ioport_get_a20(void)
293{
294 return ((first_cpu->a20_mask >> 20) & 1);
295}
296
e1a23744
FB
297static void ioport92_write(void *opaque, uint32_t addr, uint32_t val)
298{
59b8ad81 299 ioport_set_a20((val >> 1) & 1);
e1a23744
FB
300 /* XXX: bit 0 is fast reset */
301}
302
303static uint32_t ioport92_read(void *opaque, uint32_t addr)
304{
59b8ad81 305 return ioport_get_a20() << 1;
e1a23744
FB
306}
307
80cabfad
FB
308/***********************************************************/
309/* Bochs BIOS debug ports */
310
b41a2cd1 311void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val)
80cabfad 312{
a2f659ee
FB
313 static const char shutdown_str[8] = "Shutdown";
314 static int shutdown_index = 0;
3b46e624 315
80cabfad
FB
316 switch(addr) {
317 /* Bochs BIOS messages */
318 case 0x400:
319 case 0x401:
320 fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
321 exit(1);
322 case 0x402:
323 case 0x403:
324#ifdef DEBUG_BIOS
325 fprintf(stderr, "%c", val);
326#endif
327 break;
a2f659ee
FB
328 case 0x8900:
329 /* same as Bochs power off */
330 if (val == shutdown_str[shutdown_index]) {
331 shutdown_index++;
332 if (shutdown_index == 8) {
333 shutdown_index = 0;
334 qemu_system_shutdown_request();
335 }
336 } else {
337 shutdown_index = 0;
338 }
339 break;
80cabfad
FB
340
341 /* LGPL'ed VGA BIOS messages */
342 case 0x501:
343 case 0x502:
344 fprintf(stderr, "VGA BIOS panic, line %d\n", val);
345 exit(1);
346 case 0x500:
347 case 0x503:
348#ifdef DEBUG_BIOS
349 fprintf(stderr, "%c", val);
350#endif
351 break;
352 }
353}
354
355void bochs_bios_init(void)
356{
b41a2cd1
FB
357 register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL);
358 register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL);
359 register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL);
360 register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL);
a2f659ee 361 register_ioport_write(0x8900, 1, 1, bochs_bios_write, NULL);
b41a2cd1
FB
362
363 register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL);
364 register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL);
365 register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL);
366 register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL);
80cabfad
FB
367}
368
642a4f96
TS
369/* Generate an initial boot sector which sets state and jump to
370 a specified vector */
3f6c925f 371static void generate_bootsect(uint32_t gpr[8], uint16_t segs[6], uint16_t ip)
642a4f96
TS
372{
373 uint8_t bootsect[512], *p;
374 int i;
375
376 if (bs_table[0] == NULL) {
377 fprintf(stderr, "A disk image must be given for 'hda' when booting "
378 "a Linux kernel\n");
379 exit(1);
380 }
381
382 memset(bootsect, 0, sizeof(bootsect));
383
384 /* Copy the MSDOS partition table if possible */
385 bdrv_read(bs_table[0], 0, bootsect, 1);
386
387 /* Make sure we have a partition signature */
388 bootsect[510] = 0x55;
389 bootsect[511] = 0xaa;
390
391 /* Actual code */
392 p = bootsect;
393 *p++ = 0xfa; /* CLI */
394 *p++ = 0xfc; /* CLD */
395
396 for (i = 0; i < 6; i++) {
397 if (i == 1) /* Skip CS */
398 continue;
399
400 *p++ = 0xb8; /* MOV AX,imm16 */
401 *p++ = segs[i];
402 *p++ = segs[i] >> 8;
403 *p++ = 0x8e; /* MOV <seg>,AX */
404 *p++ = 0xc0 + (i << 3);
405 }
406
407 for (i = 0; i < 8; i++) {
408 *p++ = 0x66; /* 32-bit operand size */
409 *p++ = 0xb8 + i; /* MOV <reg>,imm32 */
410 *p++ = gpr[i];
411 *p++ = gpr[i] >> 8;
412 *p++ = gpr[i] >> 16;
413 *p++ = gpr[i] >> 24;
414 }
415
416 *p++ = 0xea; /* JMP FAR */
417 *p++ = ip; /* IP */
418 *p++ = ip >> 8;
419 *p++ = segs[1]; /* CS */
420 *p++ = segs[1] >> 8;
421
422 bdrv_set_boot_sector(bs_table[0], bootsect, sizeof(bootsect));
423}
80cabfad 424
5fafdf24 425int load_kernel(const char *filename, uint8_t *addr,
80cabfad
FB
426 uint8_t *real_addr)
427{
428 int fd, size;
429 int setup_sects;
430
096b7ea4 431 fd = open(filename, O_RDONLY | O_BINARY);
80cabfad
FB
432 if (fd < 0)
433 return -1;
434
435 /* load 16 bit code */
436 if (read(fd, real_addr, 512) != 512)
437 goto fail;
438 setup_sects = real_addr[0x1F1];
439 if (!setup_sects)
440 setup_sects = 4;
5fafdf24 441 if (read(fd, real_addr + 512, setup_sects * 512) !=
80cabfad
FB
442 setup_sects * 512)
443 goto fail;
642a4f96 444
80cabfad
FB
445 /* load 32 bit code */
446 size = read(fd, addr, 16 * 1024 * 1024);
447 if (size < 0)
448 goto fail;
449 close(fd);
450 return size;
451 fail:
452 close(fd);
453 return -1;
454}
455
642a4f96
TS
456static long get_file_size(FILE *f)
457{
458 long where, size;
459
460 /* XXX: on Unix systems, using fstat() probably makes more sense */
461
462 where = ftell(f);
463 fseek(f, 0, SEEK_END);
464 size = ftell(f);
465 fseek(f, where, SEEK_SET);
466
467 return size;
468}
469
470static void load_linux(const char *kernel_filename,
471 const char *initrd_filename,
472 const char *kernel_cmdline)
473{
474 uint16_t protocol;
475 uint32_t gpr[8];
476 uint16_t seg[6];
477 uint16_t real_seg;
478 int setup_size, kernel_size, initrd_size, cmdline_size;
479 uint32_t initrd_max;
480 uint8_t header[1024];
481 uint8_t *real_addr, *prot_addr, *cmdline_addr, *initrd_addr;
482 FILE *f, *fi;
483
484 /* Align to 16 bytes as a paranoia measure */
485 cmdline_size = (strlen(kernel_cmdline)+16) & ~15;
486
487 /* load the kernel header */
488 f = fopen(kernel_filename, "rb");
489 if (!f || !(kernel_size = get_file_size(f)) ||
490 fread(header, 1, 1024, f) != 1024) {
491 fprintf(stderr, "qemu: could not load kernel '%s'\n",
492 kernel_filename);
493 exit(1);
494 }
495
496 /* kernel protocol version */
bc4edd79 497#if 0
642a4f96 498 fprintf(stderr, "header magic: %#x\n", ldl_p(header+0x202));
bc4edd79 499#endif
642a4f96
TS
500 if (ldl_p(header+0x202) == 0x53726448)
501 protocol = lduw_p(header+0x206);
502 else
503 protocol = 0;
504
505 if (protocol < 0x200 || !(header[0x211] & 0x01)) {
506 /* Low kernel */
507 real_addr = phys_ram_base + 0x90000;
508 cmdline_addr = phys_ram_base + 0x9a000 - cmdline_size;
509 prot_addr = phys_ram_base + 0x10000;
510 } else if (protocol < 0x202) {
511 /* High but ancient kernel */
512 real_addr = phys_ram_base + 0x90000;
513 cmdline_addr = phys_ram_base + 0x9a000 - cmdline_size;
514 prot_addr = phys_ram_base + 0x100000;
515 } else {
516 /* High and recent kernel */
517 real_addr = phys_ram_base + 0x10000;
518 cmdline_addr = phys_ram_base + 0x20000;
519 prot_addr = phys_ram_base + 0x100000;
520 }
521
bc4edd79 522#if 0
642a4f96
TS
523 fprintf(stderr,
524 "qemu: real_addr = %#zx\n"
525 "qemu: cmdline_addr = %#zx\n"
526 "qemu: prot_addr = %#zx\n",
527 real_addr-phys_ram_base,
528 cmdline_addr-phys_ram_base,
529 prot_addr-phys_ram_base);
bc4edd79 530#endif
642a4f96
TS
531
532 /* highest address for loading the initrd */
533 if (protocol >= 0x203)
534 initrd_max = ldl_p(header+0x22c);
535 else
536 initrd_max = 0x37ffffff;
537
538 if (initrd_max >= ram_size-ACPI_DATA_SIZE)
539 initrd_max = ram_size-ACPI_DATA_SIZE-1;
540
541 /* kernel command line */
542 pstrcpy(cmdline_addr, 4096, kernel_cmdline);
543
544 if (protocol >= 0x202) {
545 stl_p(header+0x228, cmdline_addr-phys_ram_base);
546 } else {
547 stw_p(header+0x20, 0xA33F);
548 stw_p(header+0x22, cmdline_addr-real_addr);
549 }
550
551 /* loader type */
552 /* High nybble = B reserved for Qemu; low nybble is revision number.
553 If this code is substantially changed, you may want to consider
554 incrementing the revision. */
555 if (protocol >= 0x200)
556 header[0x210] = 0xB0;
557
558 /* heap */
559 if (protocol >= 0x201) {
560 header[0x211] |= 0x80; /* CAN_USE_HEAP */
561 stw_p(header+0x224, cmdline_addr-real_addr-0x200);
562 }
563
564 /* load initrd */
565 if (initrd_filename) {
566 if (protocol < 0x200) {
567 fprintf(stderr, "qemu: linux kernel too old to load a ram disk\n");
568 exit(1);
569 }
570
571 fi = fopen(initrd_filename, "rb");
572 if (!fi) {
573 fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
574 initrd_filename);
575 exit(1);
576 }
577
578 initrd_size = get_file_size(fi);
579 initrd_addr = phys_ram_base + ((initrd_max-initrd_size) & ~4095);
580
581 fprintf(stderr, "qemu: loading initrd (%#x bytes) at %#zx\n",
582 initrd_size, initrd_addr-phys_ram_base);
583
584 if (fread(initrd_addr, 1, initrd_size, fi) != initrd_size) {
585 fprintf(stderr, "qemu: read error on initial ram disk '%s'\n",
586 initrd_filename);
587 exit(1);
588 }
589 fclose(fi);
590
591 stl_p(header+0x218, initrd_addr-phys_ram_base);
592 stl_p(header+0x21c, initrd_size);
593 }
594
595 /* store the finalized header and load the rest of the kernel */
596 memcpy(real_addr, header, 1024);
597
598 setup_size = header[0x1f1];
599 if (setup_size == 0)
600 setup_size = 4;
601
602 setup_size = (setup_size+1)*512;
603 kernel_size -= setup_size; /* Size of protected-mode code */
604
605 if (fread(real_addr+1024, 1, setup_size-1024, f) != setup_size-1024 ||
606 fread(prot_addr, 1, kernel_size, f) != kernel_size) {
607 fprintf(stderr, "qemu: read error on kernel '%s'\n",
608 kernel_filename);
609 exit(1);
610 }
611 fclose(f);
612
613 /* generate bootsector to set up the initial register state */
614 real_seg = (real_addr-phys_ram_base) >> 4;
615 seg[0] = seg[2] = seg[3] = seg[4] = seg[4] = real_seg;
616 seg[1] = real_seg+0x20; /* CS */
617 memset(gpr, 0, sizeof gpr);
618 gpr[4] = cmdline_addr-real_addr-16; /* SP (-16 is paranoia) */
619
620 generate_bootsect(gpr, seg, 0);
621}
622
59b8ad81
FB
623static void main_cpu_reset(void *opaque)
624{
625 CPUState *env = opaque;
626 cpu_reset(env);
627}
628
b41a2cd1
FB
629static const int ide_iobase[2] = { 0x1f0, 0x170 };
630static const int ide_iobase2[2] = { 0x3f6, 0x376 };
631static const int ide_irq[2] = { 14, 15 };
632
633#define NE2000_NB_MAX 6
634
8d11df9e 635static int ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, 0x280, 0x380 };
b41a2cd1
FB
636static int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 };
637
8d11df9e
FB
638static int serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
639static int serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 };
640
6508fe59
FB
641static int parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc };
642static int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 };
643
6a36d84e 644#ifdef HAS_AUDIO
d537cf6c 645static void audio_init (PCIBus *pci_bus, qemu_irq *pic)
6a36d84e
FB
646{
647 struct soundhw *c;
648 int audio_enabled = 0;
649
650 for (c = soundhw; !audio_enabled && c->name; ++c) {
651 audio_enabled = c->enabled;
652 }
653
654 if (audio_enabled) {
655 AudioState *s;
656
657 s = AUD_init ();
658 if (s) {
659 for (c = soundhw; c->name; ++c) {
660 if (c->enabled) {
661 if (c->isa) {
d537cf6c 662 c->init.init_isa (s, pic);
6a36d84e
FB
663 }
664 else {
665 if (pci_bus) {
666 c->init.init_pci (pci_bus, s);
667 }
668 }
669 }
670 }
671 }
672 }
673}
674#endif
675
d537cf6c 676static void pc_init_ne2k_isa(NICInfo *nd, qemu_irq *pic)
a41b2ff2
PB
677{
678 static int nb_ne2k = 0;
679
680 if (nb_ne2k == NE2000_NB_MAX)
681 return;
d537cf6c 682 isa_ne2000_init(ne2000_io[nb_ne2k], pic[ne2000_irq[nb_ne2k]], nd);
a41b2ff2
PB
683 nb_ne2k++;
684}
685
80cabfad 686/* PC hardware initialisation */
6ac0e82d 687static void pc_init1(int ram_size, int vga_ram_size, const char *boot_device,
b5ff2d6e
FB
688 DisplayState *ds, const char **fd_filename, int snapshot,
689 const char *kernel_filename, const char *kernel_cmdline,
3dbbdc25 690 const char *initrd_filename,
a049de61 691 int pci_enabled, const char *cpu_model)
80cabfad
FB
692{
693 char buf[1024];
642a4f96 694 int ret, linux_boot, i;
970ac5a3
FB
695 ram_addr_t ram_addr, vga_ram_addr, bios_offset, vga_bios_offset;
696 int bios_size, isa_bios_size, vga_bios_size;
46e50e9d 697 PCIBus *pci_bus;
5c3ff3a7 698 int piix3_devfn = -1;
59b8ad81 699 CPUState *env;
a41b2ff2 700 NICInfo *nd;
d537cf6c
PB
701 qemu_irq *cpu_irq;
702 qemu_irq *i8259;
d592d303 703
80cabfad
FB
704 linux_boot = (kernel_filename != NULL);
705
59b8ad81 706 /* init CPUs */
a049de61
FB
707 if (cpu_model == NULL) {
708#ifdef TARGET_X86_64
709 cpu_model = "qemu64";
710#else
711 cpu_model = "qemu32";
712#endif
713 }
714
59b8ad81 715 for(i = 0; i < smp_cpus; i++) {
aaed909a
FB
716 env = cpu_init(cpu_model);
717 if (!env) {
718 fprintf(stderr, "Unable to find x86 CPU definition\n");
719 exit(1);
720 }
59b8ad81 721 if (i != 0)
ad49ff9d 722 env->hflags |= HF_HALTED_MASK;
59b8ad81
FB
723 if (smp_cpus > 1) {
724 /* XXX: enable it in all cases */
725 env->cpuid_features |= CPUID_APIC;
726 }
a5954d5c 727 register_savevm("cpu", i, 4, cpu_save, cpu_load, env);
59b8ad81
FB
728 qemu_register_reset(main_cpu_reset, env);
729 if (pci_enabled) {
730 apic_init(env);
731 }
93342807 732 vmport_init(env);
59b8ad81
FB
733 }
734
80cabfad 735 /* allocate RAM */
970ac5a3
FB
736 ram_addr = qemu_ram_alloc(ram_size);
737 cpu_register_physical_memory(0, ram_size, ram_addr);
80cabfad 738
970ac5a3
FB
739 /* allocate VGA RAM */
740 vga_ram_addr = qemu_ram_alloc(vga_ram_size);
7587cf44 741
970ac5a3 742 /* BIOS load */
1192dad8
JM
743 if (bios_name == NULL)
744 bios_name = BIOS_FILENAME;
745 snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name);
7587cf44 746 bios_size = get_image_size(buf);
5fafdf24 747 if (bios_size <= 0 ||
970ac5a3 748 (bios_size % 65536) != 0) {
7587cf44
FB
749 goto bios_error;
750 }
970ac5a3 751 bios_offset = qemu_ram_alloc(bios_size);
7587cf44
FB
752 ret = load_image(buf, phys_ram_base + bios_offset);
753 if (ret != bios_size) {
754 bios_error:
970ac5a3 755 fprintf(stderr, "qemu: could not load PC BIOS '%s'\n", buf);
80cabfad
FB
756 exit(1);
757 }
7587cf44 758
80cabfad 759 /* VGA BIOS load */
de9258a8
FB
760 if (cirrus_vga_enabled) {
761 snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_CIRRUS_FILENAME);
762 } else {
763 snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
764 }
970ac5a3 765 vga_bios_size = get_image_size(buf);
5fafdf24 766 if (vga_bios_size <= 0 || vga_bios_size > 65536)
970ac5a3
FB
767 goto vga_bios_error;
768 vga_bios_offset = qemu_ram_alloc(65536);
769
7587cf44 770 ret = load_image(buf, phys_ram_base + vga_bios_offset);
970ac5a3
FB
771 if (ret != vga_bios_size) {
772 vga_bios_error:
773 fprintf(stderr, "qemu: could not load VGA BIOS '%s'\n", buf);
774 exit(1);
775 }
776
80cabfad 777 /* setup basic memory access */
5fafdf24 778 cpu_register_physical_memory(0xc0000, 0x10000,
7587cf44
FB
779 vga_bios_offset | IO_MEM_ROM);
780
781 /* map the last 128KB of the BIOS in ISA space */
782 isa_bios_size = bios_size;
783 if (isa_bios_size > (128 * 1024))
784 isa_bios_size = 128 * 1024;
5fafdf24 785 cpu_register_physical_memory(0xd0000, (192 * 1024) - isa_bios_size,
7587cf44 786 IO_MEM_UNASSIGNED);
5fafdf24
TS
787 cpu_register_physical_memory(0x100000 - isa_bios_size,
788 isa_bios_size,
7587cf44 789 (bios_offset + bios_size - isa_bios_size) | IO_MEM_ROM);
9ae02555 790
970ac5a3
FB
791 {
792 ram_addr_t option_rom_offset;
793 int size, offset;
794
795 offset = 0;
796 for (i = 0; i < nb_option_roms; i++) {
797 size = get_image_size(option_rom[i]);
798 if (size < 0) {
5fafdf24 799 fprintf(stderr, "Could not load option rom '%s'\n",
970ac5a3
FB
800 option_rom[i]);
801 exit(1);
802 }
803 if (size > (0x10000 - offset))
804 goto option_rom_error;
805 option_rom_offset = qemu_ram_alloc(size);
806 ret = load_image(option_rom[i], phys_ram_base + option_rom_offset);
807 if (ret != size) {
808 option_rom_error:
809 fprintf(stderr, "Too many option ROMS\n");
810 exit(1);
811 }
812 size = (size + 4095) & ~4095;
813 cpu_register_physical_memory(0xd0000 + offset,
814 size, option_rom_offset | IO_MEM_ROM);
815 offset += size;
816 }
9ae02555
TS
817 }
818
7587cf44 819 /* map all the bios at the top of memory */
5fafdf24 820 cpu_register_physical_memory((uint32_t)(-bios_size),
7587cf44 821 bios_size, bios_offset | IO_MEM_ROM);
3b46e624 822
80cabfad
FB
823 bochs_bios_init();
824
642a4f96
TS
825 if (linux_boot)
826 load_linux(kernel_filename, initrd_filename, kernel_cmdline);
80cabfad 827
d537cf6c
PB
828 cpu_irq = qemu_allocate_irqs(pic_irq_request, first_cpu, 1);
829 i8259 = i8259_init(cpu_irq[0]);
830 ferr_irq = i8259[13];
831
69b91039 832 if (pci_enabled) {
d537cf6c 833 pci_bus = i440fx_init(&i440fx_state, i8259);
8f1c91d8 834 piix3_devfn = piix3_init(pci_bus, -1);
46e50e9d
FB
835 } else {
836 pci_bus = NULL;
69b91039
FB
837 }
838
80cabfad 839 /* init basic PC hardware */
b41a2cd1 840 register_ioport_write(0x80, 1, 1, ioport80_write, NULL);
80cabfad 841
f929aad6
FB
842 register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL);
843
1f04275e
FB
844 if (cirrus_vga_enabled) {
845 if (pci_enabled) {
5fafdf24
TS
846 pci_cirrus_vga_init(pci_bus,
847 ds, phys_ram_base + vga_ram_addr,
970ac5a3 848 vga_ram_addr, vga_ram_size);
1f04275e 849 } else {
5fafdf24 850 isa_cirrus_vga_init(ds, phys_ram_base + vga_ram_addr,
970ac5a3 851 vga_ram_addr, vga_ram_size);
1f04275e 852 }
d34cab9f
TS
853 } else if (vmsvga_enabled) {
854 if (pci_enabled)
855 pci_vmsvga_init(pci_bus, ds, phys_ram_base + ram_size,
856 ram_size, vga_ram_size);
857 else
858 fprintf(stderr, "%s: vmware_vga: no PCI bus\n", __FUNCTION__);
1f04275e 859 } else {
89b6b508 860 if (pci_enabled) {
5fafdf24 861 pci_vga_init(pci_bus, ds, phys_ram_base + vga_ram_addr,
970ac5a3 862 vga_ram_addr, vga_ram_size, 0, 0);
89b6b508 863 } else {
5fafdf24 864 isa_vga_init(ds, phys_ram_base + vga_ram_addr,
970ac5a3 865 vga_ram_addr, vga_ram_size);
89b6b508 866 }
1f04275e 867 }
80cabfad 868
d537cf6c 869 rtc_state = rtc_init(0x70, i8259[8]);
80cabfad 870
e1a23744
FB
871 register_ioport_read(0x92, 1, 1, ioport92_read, NULL);
872 register_ioport_write(0x92, 1, 1, ioport92_write, NULL);
873
d592d303 874 if (pci_enabled) {
d592d303
FB
875 ioapic = ioapic_init();
876 }
d537cf6c 877 pit = pit_init(0x40, i8259[0]);
fd06c375 878 pcspk_init(pit);
d592d303
FB
879 if (pci_enabled) {
880 pic_set_alt_irq_func(isa_pic, ioapic_set_irq, ioapic);
881 }
b41a2cd1 882
8d11df9e
FB
883 for(i = 0; i < MAX_SERIAL_PORTS; i++) {
884 if (serial_hds[i]) {
d537cf6c 885 serial_init(serial_io[i], i8259[serial_irq[i]], serial_hds[i]);
8d11df9e
FB
886 }
887 }
b41a2cd1 888
6508fe59
FB
889 for(i = 0; i < MAX_PARALLEL_PORTS; i++) {
890 if (parallel_hds[i]) {
d537cf6c
PB
891 parallel_init(parallel_io[i], i8259[parallel_irq[i]],
892 parallel_hds[i]);
6508fe59
FB
893 }
894 }
895
a41b2ff2
PB
896 for(i = 0; i < nb_nics; i++) {
897 nd = &nd_table[i];
898 if (!nd->model) {
899 if (pci_enabled) {
900 nd->model = "ne2k_pci";
901 } else {
902 nd->model = "ne2k_isa";
903 }
69b91039 904 }
a41b2ff2 905 if (strcmp(nd->model, "ne2k_isa") == 0) {
d537cf6c 906 pc_init_ne2k_isa(nd, i8259);
a41b2ff2 907 } else if (pci_enabled) {
c4a7060c
BS
908 if (strcmp(nd->model, "?") == 0)
909 fprintf(stderr, "qemu: Supported ISA NICs: ne2k_isa\n");
abcebc7e 910 pci_nic_init(pci_bus, nd, -1);
c4a7060c
BS
911 } else if (strcmp(nd->model, "?") == 0) {
912 fprintf(stderr, "qemu: Supported ISA NICs: ne2k_isa\n");
913 exit(1);
a41b2ff2
PB
914 } else {
915 fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd->model);
916 exit(1);
69b91039 917 }
a41b2ff2 918 }
b41a2cd1 919
a41b2ff2 920 if (pci_enabled) {
d537cf6c 921 pci_piix3_ide_init(pci_bus, bs_table, piix3_devfn + 1, i8259);
a41b2ff2 922 } else {
69b91039 923 for(i = 0; i < 2; i++) {
d537cf6c 924 isa_ide_init(ide_iobase[i], ide_iobase2[i], i8259[ide_irq[i]],
69b91039
FB
925 bs_table[2 * i], bs_table[2 * i + 1]);
926 }
b41a2cd1 927 }
69b91039 928
d537cf6c 929 i8042_init(i8259[1], i8259[12], 0x60);
7c29d0c0 930 DMA_init(0);
6a36d84e 931#ifdef HAS_AUDIO
d537cf6c 932 audio_init(pci_enabled ? pci_bus : NULL, i8259);
fb065187 933#endif
80cabfad 934
d537cf6c 935 floppy_controller = fdctrl_init(i8259[6], 2, 0, 0x3f0, fd_table);
b41a2cd1 936
ba6c2377 937 cmos_init(ram_size, boot_device, bs_table);
69b91039 938
bb36d470 939 if (pci_enabled && usb_enabled) {
afcc3cdf 940 usb_uhci_piix3_init(pci_bus, piix3_devfn + 2);
bb36d470
FB
941 }
942
6515b203 943 if (pci_enabled && acpi_enabled) {
3fffc223 944 uint8_t *eeprom_buf = qemu_mallocz(8 * 256); /* XXX: make this persistent */
0ff596d0
PB
945 i2c_bus *smbus;
946
947 /* TODO: Populate SPD eeprom data. */
7b717336 948 smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100);
3fffc223 949 for (i = 0; i < 8; i++) {
0ff596d0 950 smbus_eeprom_device_init(smbus, 0x50 + i, eeprom_buf + (i * 256));
3fffc223 951 }
6515b203 952 }
3b46e624 953
a5954d5c
FB
954 if (i440fx_state) {
955 i440fx_init_memory_mappings(i440fx_state);
956 }
96d30e48
TS
957#if 0
958 /* ??? Need to figure out some way for the user to
959 specify SCSI devices. */
7d8406be
PB
960 if (pci_enabled) {
961 void *scsi;
96d30e48
TS
962 BlockDriverState *bdrv;
963
964 scsi = lsi_scsi_init(pci_bus, -1);
965 bdrv = bdrv_new("scsidisk");
966 bdrv_open(bdrv, "scsi_disk.img", 0);
967 lsi_scsi_attach(scsi, bdrv, -1);
968 bdrv = bdrv_new("scsicd");
969 bdrv_open(bdrv, "scsi_cd.iso", 0);
970 bdrv_set_type_hint(bdrv, BDRV_TYPE_CDROM);
971 lsi_scsi_attach(scsi, bdrv, -1);
7d8406be 972 }
96d30e48 973#endif
80cabfad 974}
b5ff2d6e 975
6ac0e82d 976static void pc_init_pci(int ram_size, int vga_ram_size, const char *boot_device,
5fafdf24
TS
977 DisplayState *ds, const char **fd_filename,
978 int snapshot,
979 const char *kernel_filename,
3dbbdc25 980 const char *kernel_cmdline,
94fc95cd
JM
981 const char *initrd_filename,
982 const char *cpu_model)
3dbbdc25
FB
983{
984 pc_init1(ram_size, vga_ram_size, boot_device,
985 ds, fd_filename, snapshot,
986 kernel_filename, kernel_cmdline,
a049de61 987 initrd_filename, 1, cpu_model);
3dbbdc25
FB
988}
989
6ac0e82d 990static void pc_init_isa(int ram_size, int vga_ram_size, const char *boot_device,
5fafdf24
TS
991 DisplayState *ds, const char **fd_filename,
992 int snapshot,
993 const char *kernel_filename,
3dbbdc25 994 const char *kernel_cmdline,
94fc95cd
JM
995 const char *initrd_filename,
996 const char *cpu_model)
3dbbdc25
FB
997{
998 pc_init1(ram_size, vga_ram_size, boot_device,
999 ds, fd_filename, snapshot,
1000 kernel_filename, kernel_cmdline,
a049de61 1001 initrd_filename, 0, cpu_model);
3dbbdc25
FB
1002}
1003
b5ff2d6e
FB
1004QEMUMachine pc_machine = {
1005 "pc",
1006 "Standard PC",
3dbbdc25
FB
1007 pc_init_pci,
1008};
1009
1010QEMUMachine isapc_machine = {
1011 "isapc",
1012 "ISA-only PC",
1013 pc_init_isa,
b5ff2d6e 1014};