[qemu.git] / hw / pc.c

/*
 * QEMU PC System Emulator
 * 
 * Copyright (c) 2003-2004 Fabrice Bellard
 * 
 * Permission is hereby granted, free of charge, to any person obtaining a copy
 * of this software and associated documentation files (the "Software"), to deal
 * in the Software without restriction, including without limitation the rights
 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
 * copies of the Software, and to permit persons to whom the Software is
 * furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
 * THE SOFTWARE.
 */
#include "vl.h"

/* output Bochs bios info messages */
//#define DEBUG_BIOS

#define BIOS_FILENAME "bios.bin"
#define VGABIOS_FILENAME "vgabios.bin"
#define LINUX_BOOT_FILENAME "linux_boot.bin"

#define KERNEL_LOAD_ADDR     0x00100000
#define INITRD_LOAD_ADDR     0x00400000
#define KERNEL_PARAMS_ADDR   0x00090000
#define KERNEL_CMDLINE_ADDR  0x00099000

int speaker_data_on;
int dummy_refresh_clock;
static fdctrl_t *floppy_controller;
static RTCState *rtc_state;
static PITState *pit;

static void ioport80_write(void *opaque, uint32_t addr, uint32_t data)
{
}

/* MSDOS compatibility mode FPU exception support */
/* XXX: add IGNNE support */
void cpu_set_ferr(CPUX86State *s)
{
    pic_set_irq(13, 1);
}

static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data)
{
    pic_set_irq(13, 0);
}

/* TSC handling */

uint64_t cpu_get_tsc(CPUX86State *env)
{
    return qemu_get_clock(vm_clock);
}

/* PC cmos mappings */

#define REG_EQUIPMENT_BYTE          0x14
#define REG_IBM_CENTURY_BYTE        0x32
#define REG_IBM_PS2_CENTURY_BYTE    0x37


static inline int to_bcd(RTCState *s, int a)
{
    return ((a / 10) << 4) | (a % 10);
}

static int cmos_get_fd_drive_type(int fd0)
{
    int val;

    switch (fd0) {
    case 0:
        /* 1.44 Mb 3"5 drive */
        val = 4;
        break;
    case 1:
        /* 2.88 Mb 3"5 drive */
        val = 5;
        break;
    case 2:
        /* 1.2 Mb 5"5 drive */
        val = 2;
        break;
    default:
        val = 0;
        break;
    }
    return val;
}

static void cmos_init(int ram_size, int boot_device)
{
    RTCState *s = rtc_state;
    int val;
    int fd0, fd1, nb;
    time_t ti;
    struct tm *tm;

    /* set the CMOS date */
    time(&ti);
    if (rtc_utc)
        tm = gmtime(&ti);
    else
        tm = localtime(&ti);
    rtc_set_date(s, tm);

    val = to_bcd(s, (tm->tm_year / 100) + 19);
    rtc_set_memory(s, REG_IBM_CENTURY_BYTE, val);
    rtc_set_memory(s, REG_IBM_PS2_CENTURY_BYTE, val);

    /* various important CMOS locations needed by PC/Bochs bios */

    /* memory size */
    val = 640; /* base memory in K */
    rtc_set_memory(s, 0x15, val);
    rtc_set_memory(s, 0x16, val >> 8);

    val = (ram_size / 1024) - 1024;
    if (val > 65535)
        val = 65535;
    rtc_set_memory(s, 0x17, val);
    rtc_set_memory(s, 0x18, val >> 8);
    rtc_set_memory(s, 0x30, val);
    rtc_set_memory(s, 0x31, val >> 8);

    val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536);
    if (val > 65535)
        val = 65535;
    rtc_set_memory(s, 0x34, val);
    rtc_set_memory(s, 0x35, val >> 8);
    
    switch(boot_device) {
    case 'a':
    case 'b':
        rtc_set_memory(s, 0x3d, 0x01); /* floppy boot */
        break;
    default:
    case 'c':
        rtc_set_memory(s, 0x3d, 0x02); /* hard drive boot */
        break;
    case 'd':
        rtc_set_memory(s, 0x3d, 0x03); /* CD-ROM boot */
        break;
    }

    /* floppy type */

    fd0 = fdctrl_get_drive_type(floppy_controller, 0);
    fd1 = fdctrl_get_drive_type(floppy_controller, 1);

    val = (cmos_get_fd_drive_type(fd0) << 4) | cmos_get_fd_drive_type(fd1);
    rtc_set_memory(s, 0x10, val);
    
    val = 0;
    nb = 0;
    if (fd0 < 3)
        nb++;
    if (fd1 < 3)
        nb++;
    switch (nb) {
    case 0:
        break;
    case 1:
        val |= 0x01; /* 1 drive, ready for boot */
        break;
    case 2:
        val |= 0x41; /* 2 drives, ready for boot */
        break;
    }
    val |= 0x02; /* FPU is there */
    val |= 0x04; /* PS/2 mouse installed */
    rtc_set_memory(s, REG_EQUIPMENT_BYTE, val);

}

static void speaker_ioport_write(void *opaque, uint32_t addr, uint32_t val)
{
    speaker_data_on = (val >> 1) & 1;
    pit_set_gate(pit, 2, val & 1);
}

static uint32_t speaker_ioport_read(void *opaque, uint32_t addr)
{
    int out;
    out = pit_get_out(pit, 2, qemu_get_clock(vm_clock));
    dummy_refresh_clock ^= 1;
    return (speaker_data_on << 1) | pit_get_gate(pit, 2) | (out << 5) |
      (dummy_refresh_clock << 4);
}

static void ioport92_write(void *opaque, uint32_t addr, uint32_t val)
{
    cpu_x86_set_a20(cpu_single_env, (val >> 1) & 1);
    /* XXX: bit 0 is fast reset */
}

static uint32_t ioport92_read(void *opaque, uint32_t addr)
{
    return ((cpu_single_env->a20_mask >> 20) & 1) << 1;
}

/***********************************************************/
/* Bochs BIOS debug ports */

void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val)
{
    switch(addr) {
        /* Bochs BIOS messages */
    case 0x400:
    case 0x401:
        fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
        exit(1);
    case 0x402:
    case 0x403:
#ifdef DEBUG_BIOS
        fprintf(stderr, "%c", val);
#endif
        break;

        /* LGPL'ed VGA BIOS messages */
    case 0x501:
    case 0x502:
        fprintf(stderr, "VGA BIOS panic, line %d\n", val);
        exit(1);
    case 0x500:
    case 0x503:
#ifdef DEBUG_BIOS
        fprintf(stderr, "%c", val);
#endif
        break;
    }
}

void bochs_bios_init(void)
{
    register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL);
    register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL);
    register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL);
    register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL);

    register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL);
    register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL);
    register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL);
    register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL);
}


int load_kernel(const char *filename, uint8_t *addr, 
                uint8_t *real_addr)
{
    int fd, size;
    int setup_sects;

    fd = open(filename, O_RDONLY);
    if (fd < 0)
        return -1;

    /* load 16 bit code */
    if (read(fd, real_addr, 512) != 512)
        goto fail;
    setup_sects = real_addr[0x1F1];
    if (!setup_sects)
        setup_sects = 4;
    if (read(fd, real_addr + 512, setup_sects * 512) != 
        setup_sects * 512)
        goto fail;
    
    /* load 32 bit code */
    size = read(fd, addr, 16 * 1024 * 1024);
    if (size < 0)
        goto fail;
    close(fd);
    return size;
 fail:
    close(fd);
    return -1;
}

static const int ide_iobase[2] = { 0x1f0, 0x170 };
static const int ide_iobase2[2] = { 0x3f6, 0x376 };
static const int ide_irq[2] = { 14, 15 };

#define NE2000_NB_MAX 6

static uint32_t ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, 0x280, 0x380 };
static int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 };

/* PC hardware initialisation */
void pc_init(int ram_size, int vga_ram_size, int boot_device,
             DisplayState *ds, const char **fd_filename, int snapshot,
             const char *kernel_filename, const char *kernel_cmdline,
             const char *initrd_filename)
{
    char buf[1024];
    int ret, linux_boot, initrd_size, i, nb_nics1, fd;

    linux_boot = (kernel_filename != NULL);

    /* allocate RAM */
    cpu_register_physical_memory(0, ram_size, 0);

    /* BIOS load */
    snprintf(buf, sizeof(buf), "%s/%s", bios_dir, BIOS_FILENAME);
    ret = load_image(buf, phys_ram_base + 0x000f0000);
    if (ret != 0x10000) {
        fprintf(stderr, "qemu: could not load PC bios '%s'\n", buf);
        exit(1);
    }
    
    /* VGA BIOS load */
    snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
    ret = load_image(buf, phys_ram_base + 0x000c0000);
    
    /* setup basic memory access */
    cpu_register_physical_memory(0xc0000, 0x10000, 0xc0000 | IO_MEM_ROM);
    cpu_register_physical_memory(0xd0000, 0x20000, IO_MEM_UNASSIGNED);
    cpu_register_physical_memory(0xf0000, 0x10000, 0xf0000 | IO_MEM_ROM);
    
    bochs_bios_init();

    if (linux_boot) {
        uint8_t bootsect[512];
        uint8_t old_bootsect[512];

        if (bs_table[0] == NULL) {
            fprintf(stderr, "A disk image must be given for 'hda' when booting a Linux kernel\n");
            exit(1);
        }
        snprintf(buf, sizeof(buf), "%s/%s", bios_dir, LINUX_BOOT_FILENAME);
        ret = load_image(buf, bootsect);
        if (ret != sizeof(bootsect)) {
            fprintf(stderr, "qemu: could not load linux boot sector '%s'\n",
                    buf);
            exit(1);
        }

        if (bdrv_read(bs_table[0], 0, old_bootsect, 1) >= 0) {
            /* copy the MSDOS partition table */
            memcpy(bootsect + 0x1be, old_bootsect + 0x1be, 0x40);
        }

        bdrv_set_boot_sector(bs_table[0], bootsect, sizeof(bootsect));

        /* now we can load the kernel */
        ret = load_kernel(kernel_filename, 
                          phys_ram_base + KERNEL_LOAD_ADDR,
                          phys_ram_base + KERNEL_PARAMS_ADDR);
        if (ret < 0) {
            fprintf(stderr, "qemu: could not load kernel '%s'\n", 
                    kernel_filename);
            exit(1);
        }
        
        /* load initrd */
        initrd_size = 0;
        if (initrd_filename) {
            initrd_size = load_image(initrd_filename, phys_ram_base + INITRD_LOAD_ADDR);
            if (initrd_size < 0) {
                fprintf(stderr, "qemu: could not load initial ram disk '%s'\n", 
                        initrd_filename);
                exit(1);
            }
        }
        if (initrd_size > 0) {
            stl_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x218, INITRD_LOAD_ADDR);
            stl_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x21c, initrd_size);
        }
        pstrcpy(phys_ram_base + KERNEL_CMDLINE_ADDR, 4096,
                kernel_cmdline);
        stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x20, 0xA33F);
        stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x22,
                KERNEL_CMDLINE_ADDR - KERNEL_PARAMS_ADDR);
        /* loader type */
        stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x210, 0x01);
    }

    if (pci_enabled) {
        i440fx_init();
        piix3_init();
    }

    /* init basic PC hardware */
    register_ioport_write(0x80, 1, 1, ioport80_write, NULL);

    register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL);

    if (cirrus_vga_enabled) {
        if (pci_enabled) {
            pci_cirrus_vga_init(ds, phys_ram_base + ram_size, ram_size, 
                                vga_ram_size);
        } else {
            isa_cirrus_vga_init(ds, phys_ram_base + ram_size, ram_size, 
                                vga_ram_size);
        }
    } else {
        vga_initialize(ds, phys_ram_base + ram_size, ram_size, 
                       vga_ram_size, pci_enabled);
    }

    rtc_state = rtc_init(0x70, 8);
    register_ioport_read(0x61, 1, 1, speaker_ioport_read, NULL);
    register_ioport_write(0x61, 1, 1, speaker_ioport_write, NULL);

    register_ioport_read(0x92, 1, 1, ioport92_read, NULL);
    register_ioport_write(0x92, 1, 1, ioport92_write, NULL);

    pic_init();
    pit = pit_init(0x40, 0);

    fd = serial_open_device();
    serial_init(0x3f8, 4, fd);

    if (pci_enabled) {
        for(i = 0; i < nb_nics; i++) {
            pci_ne2000_init(&nd_table[i]);
        }
        pci_piix3_ide_init(bs_table);
    } else {
        nb_nics1 = nb_nics;
        if (nb_nics1 > NE2000_NB_MAX)
            nb_nics1 = NE2000_NB_MAX;
        for(i = 0; i < nb_nics1; i++) {
            isa_ne2000_init(ne2000_io[i], ne2000_irq[i], &nd_table[i]);
        }

        for(i = 0; i < 2; i++) {
            isa_ide_init(ide_iobase[i], ide_iobase2[i], ide_irq[i],
                         bs_table[2 * i], bs_table[2 * i + 1]);
        }
    }

    kbd_init();
    DMA_init();

#ifndef _WIN32
    if (audio_enabled) {
        /* no audio supported yet for win32 */
        AUD_init();
        SB16_init();
    }
#endif

    floppy_controller = fdctrl_init(6, 2, 0, 0x3f0, fd_table);

    cmos_init(ram_size, boot_device);

    /* must be done after all PCI devices are instanciated */
    /* XXX: should be done in the Bochs BIOS */
    if (pci_enabled) {
        pci_bios_init();
    }
}
Commit	Line	Data
80cabfad FB	1	/*
	2	* QEMU PC System Emulator
	3	*
	4	* Copyright (c) 2003-2004 Fabrice Bellard
	5	*
	6	* Permission is hereby granted, free of charge, to any person obtaining a copy
	7	* of this software and associated documentation files (the "Software"), to deal
	8	* in the Software without restriction, including without limitation the rights
	9	* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
	10	* copies of the Software, and to permit persons to whom the Software is
	11	* furnished to do so, subject to the following conditions:
	12	*
	13	* The above copyright notice and this permission notice shall be included in
	14	* all copies or substantial portions of the Software.
	15	*
	16	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	17	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	18	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	19	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
	20	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
	21	* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
	22	* THE SOFTWARE.
	23	*/
80cabfad FB	24	#include "vl.h"
80cabfad FB	25
b41a2cd1 FB	26	/* output Bochs bios info messages */
	27	//#define DEBUG_BIOS
	28
80cabfad FB	29	#define BIOS_FILENAME "bios.bin"
	30	#define VGABIOS_FILENAME "vgabios.bin"
	31	#define LINUX_BOOT_FILENAME "linux_boot.bin"
	32
	33	#define KERNEL_LOAD_ADDR 0x00100000
	34	#define INITRD_LOAD_ADDR 0x00400000
	35	#define KERNEL_PARAMS_ADDR 0x00090000
	36	#define KERNEL_CMDLINE_ADDR 0x00099000
	37
	38	int speaker_data_on;
	39	int dummy_refresh_clock;
baca51fa	40	static fdctrl_t *floppy_controller;
b0a21b53	41	static RTCState *rtc_state;
ec844b96	42	static PITState *pit;
80cabfad	43
b41a2cd1	44	static void ioport80_write(void *opaque, uint32_t addr, uint32_t data)
80cabfad FB	45	{
	46	}
	47
f929aad6 FB	48	/* MSDOS compatibility mode FPU exception support */
	49	/* XXX: add IGNNE support */
	50	void cpu_set_ferr(CPUX86State *s)
	51	{
	52	pic_set_irq(13, 1);
	53	}
	54
	55	static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data)
	56	{
	57	pic_set_irq(13, 0);
	58	}
	59
28ab0e2e FB	60	/* TSC handling */
	61
	62	uint64_t cpu_get_tsc(CPUX86State *env)
	63	{
	64	return qemu_get_clock(vm_clock);
	65	}
	66
b0a21b53 FB	67	/* PC cmos mappings */
b0a21b53 FB	68
80cabfad	69	#define REG_EQUIPMENT_BYTE 0x14
b0a21b53 FB	70	#define REG_IBM_CENTURY_BYTE 0x32
	71	#define REG_IBM_PS2_CENTURY_BYTE 0x37
	72
	73
	74	static inline int to_bcd(RTCState *s, int a)
	75	{
	76	return ((a / 10) << 4) \| (a % 10);
	77	}
80cabfad	78
777428f2 FB	79	static int cmos_get_fd_drive_type(int fd0)
	80	{
	81	int val;
	82
	83	switch (fd0) {
	84	case 0:
	85	/* 1.44 Mb 3"5 drive */
	86	val = 4;
	87	break;
	88	case 1:
	89	/* 2.88 Mb 3"5 drive */
	90	val = 5;
	91	break;
	92	case 2:
	93	/* 1.2 Mb 5"5 drive */
	94	val = 2;
	95	break;
	96	default:
	97	val = 0;
	98	break;
	99	}
	100	return val;
	101	}
	102
80cabfad FB	103	static void cmos_init(int ram_size, int boot_device)
80cabfad FB	104	{
b0a21b53	105	RTCState *s = rtc_state;
80cabfad	106	int val;
b41a2cd1	107	int fd0, fd1, nb;
b0a21b53 FB	108	time_t ti;
	109	struct tm *tm;
	110
	111	/* set the CMOS date */
	112	time(&ti);
ee22c2f7 FB	113	if (rtc_utc)
	114	tm = gmtime(&ti);
	115	else
	116	tm = localtime(&ti);
b0a21b53 FB	117	rtc_set_date(s, tm);
	118
	119	val = to_bcd(s, (tm->tm_year / 100) + 19);
	120	rtc_set_memory(s, REG_IBM_CENTURY_BYTE, val);
	121	rtc_set_memory(s, REG_IBM_PS2_CENTURY_BYTE, val);
80cabfad	122
b0a21b53	123	/* various important CMOS locations needed by PC/Bochs bios */
80cabfad FB	124
80cabfad FB	125	/* memory size */
333190eb FB	126	val = 640; /* base memory in K */
	127	rtc_set_memory(s, 0x15, val);
	128	rtc_set_memory(s, 0x16, val >> 8);
	129
80cabfad FB	130	val = (ram_size / 1024) - 1024;
	131	if (val > 65535)
	132	val = 65535;
b0a21b53 FB	133	rtc_set_memory(s, 0x17, val);
	134	rtc_set_memory(s, 0x18, val >> 8);
	135	rtc_set_memory(s, 0x30, val);
	136	rtc_set_memory(s, 0x31, val >> 8);
80cabfad FB	137
	138	val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536);
	139	if (val > 65535)
	140	val = 65535;
b0a21b53 FB	141	rtc_set_memory(s, 0x34, val);
b0a21b53 FB	142	rtc_set_memory(s, 0x35, val >> 8);
80cabfad FB	143
	144	switch(boot_device) {
	145	case 'a':
	146	case 'b':
b0a21b53	147	rtc_set_memory(s, 0x3d, 0x01); /* floppy boot */
80cabfad FB	148	break;
	149	default:
	150	case 'c':
b0a21b53	151	rtc_set_memory(s, 0x3d, 0x02); /* hard drive boot */
80cabfad FB	152	break;
80cabfad FB	153	case 'd':
b0a21b53	154	rtc_set_memory(s, 0x3d, 0x03); /* CD-ROM boot */
80cabfad FB	155	break;
80cabfad FB	156	}
80cabfad	157
b41a2cd1 FB	158	/* floppy type */
b41a2cd1 FB	159
baca51fa FB	160	fd0 = fdctrl_get_drive_type(floppy_controller, 0);
baca51fa FB	161	fd1 = fdctrl_get_drive_type(floppy_controller, 1);
80cabfad	162
777428f2	163	val = (cmos_get_fd_drive_type(fd0) << 4) \| cmos_get_fd_drive_type(fd1);
b0a21b53 FB	164	rtc_set_memory(s, 0x10, val);
	165
	166	val = 0;
b41a2cd1	167	nb = 0;
80cabfad FB	168	if (fd0 < 3)
	169	nb++;
	170	if (fd1 < 3)
	171	nb++;
	172	switch (nb) {
	173	case 0:
	174	break;
	175	case 1:
b0a21b53	176	val \|= 0x01; /* 1 drive, ready for boot */
80cabfad FB	177	break;
80cabfad FB	178	case 2:
b0a21b53	179	val \|= 0x41; /* 2 drives, ready for boot */
80cabfad FB	180	break;
80cabfad FB	181	}
b0a21b53 FB	182	val \|= 0x02; /* FPU is there */
	183	val \|= 0x04; /* PS/2 mouse installed */
	184	rtc_set_memory(s, REG_EQUIPMENT_BYTE, val);
	185
80cabfad FB	186	}
80cabfad FB	187
b41a2cd1	188	static void speaker_ioport_write(void *opaque, uint32_t addr, uint32_t val)
80cabfad FB	189	{
80cabfad FB	190	speaker_data_on = (val >> 1) & 1;
ec844b96	191	pit_set_gate(pit, 2, val & 1);
80cabfad FB	192	}
80cabfad FB	193
b41a2cd1	194	static uint32_t speaker_ioport_read(void *opaque, uint32_t addr)
80cabfad FB	195	{
80cabfad FB	196	int out;
ec844b96	197	out = pit_get_out(pit, 2, qemu_get_clock(vm_clock));
80cabfad	198	dummy_refresh_clock ^= 1;
ec844b96	199	return (speaker_data_on << 1) \| pit_get_gate(pit, 2) \| (out << 5) \|
80cabfad FB	200	(dummy_refresh_clock << 4);
	201	}
	202
e1a23744 FB	203	static void ioport92_write(void *opaque, uint32_t addr, uint32_t val)
	204	{
	205	cpu_x86_set_a20(cpu_single_env, (val >> 1) & 1);
	206	/* XXX: bit 0 is fast reset */
	207	}
	208
	209	static uint32_t ioport92_read(void *opaque, uint32_t addr)
	210	{
	211	return ((cpu_single_env->a20_mask >> 20) & 1) << 1;
	212	}
	213
80cabfad FB	214	/***********************************************************/
	215	/* Bochs BIOS debug ports */
	216
b41a2cd1	217	void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val)
80cabfad FB	218	{
	219	switch(addr) {
	220	/* Bochs BIOS messages */
	221	case 0x400:
	222	case 0x401:
	223	fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
	224	exit(1);
	225	case 0x402:
	226	case 0x403:
	227	#ifdef DEBUG_BIOS
	228	fprintf(stderr, "%c", val);
	229	#endif
	230	break;
	231
	232	/* LGPL'ed VGA BIOS messages */
	233	case 0x501:
	234	case 0x502:
	235	fprintf(stderr, "VGA BIOS panic, line %d\n", val);
	236	exit(1);
	237	case 0x500:
	238	case 0x503:
	239	#ifdef DEBUG_BIOS
	240	fprintf(stderr, "%c", val);
	241	#endif
	242	break;
	243	}
	244	}
	245
	246	void bochs_bios_init(void)
	247	{
b41a2cd1 FB	248	register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL);
	249	register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL);
	250	register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL);
	251	register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL);
	252
	253	register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL);
	254	register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL);
	255	register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL);
	256	register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL);
80cabfad FB	257	}
	258
	259
	260	int load_kernel(const char filename, uint8_t addr,
	261	uint8_t *real_addr)
	262	{
	263	int fd, size;
	264	int setup_sects;
	265
	266	fd = open(filename, O_RDONLY);
	267	if (fd < 0)
	268	return -1;
	269
	270	/* load 16 bit code */
	271	if (read(fd, real_addr, 512) != 512)
	272	goto fail;
	273	setup_sects = real_addr[0x1F1];
	274	if (!setup_sects)
	275	setup_sects = 4;
	276	if (read(fd, real_addr + 512, setup_sects * 512) !=
	277	setup_sects * 512)
	278	goto fail;
	279
	280	/* load 32 bit code */
	281	size = read(fd, addr, 16 * 1024 * 1024);
	282	if (size < 0)
	283	goto fail;
	284	close(fd);
	285	return size;
	286	fail:
	287	close(fd);
	288	return -1;
	289	}
	290
b41a2cd1 FB	291	static const int ide_iobase[2] = { 0x1f0, 0x170 };
	292	static const int ide_iobase2[2] = { 0x3f6, 0x376 };
	293	static const int ide_irq[2] = { 14, 15 };
	294
	295	#define NE2000_NB_MAX 6
	296
	297	static uint32_t ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, 0x280, 0x380 };
	298	static int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 };
	299
80cabfad FB	300	/* PC hardware initialisation */
	301	void pc_init(int ram_size, int vga_ram_size, int boot_device,
	302	DisplayState ds, const char *fd_filename, int snapshot,
	303	const char kernel_filename, const char kernel_cmdline,
	304	const char *initrd_filename)
	305	{
	306	char buf[1024];
b41a2cd1	307	int ret, linux_boot, initrd_size, i, nb_nics1, fd;
80cabfad FB	308
	309	linux_boot = (kernel_filename != NULL);
	310
	311	/* allocate RAM */
	312	cpu_register_physical_memory(0, ram_size, 0);
	313
	314	/* BIOS load */
	315	snprintf(buf, sizeof(buf), "%s/%s", bios_dir, BIOS_FILENAME);
	316	ret = load_image(buf, phys_ram_base + 0x000f0000);
	317	if (ret != 0x10000) {
	318	fprintf(stderr, "qemu: could not load PC bios '%s'\n", buf);
	319	exit(1);
	320	}
	321
	322	/* VGA BIOS load */
	323	snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
	324	ret = load_image(buf, phys_ram_base + 0x000c0000);
	325
	326	/* setup basic memory access */
	327	cpu_register_physical_memory(0xc0000, 0x10000, 0xc0000 \| IO_MEM_ROM);
bb058620	328	cpu_register_physical_memory(0xd0000, 0x20000, IO_MEM_UNASSIGNED);
80cabfad FB	329	cpu_register_physical_memory(0xf0000, 0x10000, 0xf0000 \| IO_MEM_ROM);
	330
	331	bochs_bios_init();
	332
	333	if (linux_boot) {
	334	uint8_t bootsect[512];
41b9be47	335	uint8_t old_bootsect[512];
80cabfad FB	336
	337	if (bs_table[0] == NULL) {
	338	fprintf(stderr, "A disk image must be given for 'hda' when booting a Linux kernel\n");
	339	exit(1);
	340	}
	341	snprintf(buf, sizeof(buf), "%s/%s", bios_dir, LINUX_BOOT_FILENAME);
	342	ret = load_image(buf, bootsect);
	343	if (ret != sizeof(bootsect)) {
	344	fprintf(stderr, "qemu: could not load linux boot sector '%s'\n",
	345	buf);
	346	exit(1);
	347	}
	348
41b9be47 FB	349	if (bdrv_read(bs_table[0], 0, old_bootsect, 1) >= 0) {
	350	/* copy the MSDOS partition table */
	351	memcpy(bootsect + 0x1be, old_bootsect + 0x1be, 0x40);
	352	}
	353
80cabfad FB	354	bdrv_set_boot_sector(bs_table[0], bootsect, sizeof(bootsect));
	355
	356	/* now we can load the kernel */
	357	ret = load_kernel(kernel_filename,
	358	phys_ram_base + KERNEL_LOAD_ADDR,
	359	phys_ram_base + KERNEL_PARAMS_ADDR);
	360	if (ret < 0) {
	361	fprintf(stderr, "qemu: could not load kernel '%s'\n",
	362	kernel_filename);
	363	exit(1);
	364	}
	365
	366	/* load initrd */
	367	initrd_size = 0;
	368	if (initrd_filename) {
	369	initrd_size = load_image(initrd_filename, phys_ram_base + INITRD_LOAD_ADDR);
	370	if (initrd_size < 0) {
	371	fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
	372	initrd_filename);
	373	exit(1);
	374	}
	375	}
	376	if (initrd_size > 0) {
	377	stl_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x218, INITRD_LOAD_ADDR);
	378	stl_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x21c, initrd_size);
	379	}
	380	pstrcpy(phys_ram_base + KERNEL_CMDLINE_ADDR, 4096,
	381	kernel_cmdline);
	382	stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x20, 0xA33F);
	383	stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x22,
	384	KERNEL_CMDLINE_ADDR - KERNEL_PARAMS_ADDR);
	385	/* loader type */
	386	stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x210, 0x01);
	387	}
	388
69b91039 FB	389	if (pci_enabled) {
	390	i440fx_init();
	391	piix3_init();
	392	}
	393
80cabfad	394	/* init basic PC hardware */
b41a2cd1	395	register_ioport_write(0x80, 1, 1, ioport80_write, NULL);
80cabfad	396
f929aad6 FB	397	register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL);
f929aad6 FB	398
1f04275e FB	399	if (cirrus_vga_enabled) {
	400	if (pci_enabled) {
	401	pci_cirrus_vga_init(ds, phys_ram_base + ram_size, ram_size,
	402	vga_ram_size);
	403	} else {
	404	isa_cirrus_vga_init(ds, phys_ram_base + ram_size, ram_size,
	405	vga_ram_size);
	406	}
	407	} else {
	408	vga_initialize(ds, phys_ram_base + ram_size, ram_size,
	409	vga_ram_size, pci_enabled);
	410	}
80cabfad	411
b0a21b53	412	rtc_state = rtc_init(0x70, 8);
b41a2cd1 FB	413	register_ioport_read(0x61, 1, 1, speaker_ioport_read, NULL);
b41a2cd1 FB	414	register_ioport_write(0x61, 1, 1, speaker_ioport_write, NULL);
80cabfad	415
e1a23744 FB	416	register_ioport_read(0x92, 1, 1, ioport92_read, NULL);
	417	register_ioport_write(0x92, 1, 1, ioport92_write, NULL);
	418
80cabfad	419	pic_init();
ec844b96	420	pit = pit_init(0x40, 0);
b41a2cd1 FB	421
	422	fd = serial_open_device();
	423	serial_init(0x3f8, 4, fd);
	424
69b91039 FB	425	if (pci_enabled) {
	426	for(i = 0; i < nb_nics; i++) {
	427	pci_ne2000_init(&nd_table[i]);
	428	}
e1c485be	429	pci_piix3_ide_init(bs_table);
69b91039 FB	430	} else {
	431	nb_nics1 = nb_nics;
	432	if (nb_nics1 > NE2000_NB_MAX)
	433	nb_nics1 = NE2000_NB_MAX;
	434	for(i = 0; i < nb_nics1; i++) {
	435	isa_ne2000_init(ne2000_io[i], ne2000_irq[i], &nd_table[i]);
	436	}
b41a2cd1	437
69b91039 FB	438	for(i = 0; i < 2; i++) {
	439	isa_ide_init(ide_iobase[i], ide_iobase2[i], ide_irq[i],
	440	bs_table[2 * i], bs_table[2 * i + 1]);
	441	}
b41a2cd1	442	}
69b91039	443
80cabfad	444	kbd_init();
80cabfad	445	DMA_init();
67b915a5 FB	446
67b915a5 FB	447	#ifndef _WIN32
aaaa7df6 FB	448	if (audio_enabled) {
	449	/* no audio supported yet for win32 */
	450	AUD_init();
	451	SB16_init();
	452	}
67b915a5	453	#endif
80cabfad	454
baca51fa	455	floppy_controller = fdctrl_init(6, 2, 0, 0x3f0, fd_table);
b41a2cd1 FB	456
b41a2cd1 FB	457	cmos_init(ram_size, boot_device);
69b91039 FB	458
	459	/* must be done after all PCI devices are instanciated */
	460	/* XXX: should be done in the Bochs BIOS */
	461	if (pci_enabled) {
	462	pci_bios_init();
	463	}
80cabfad	464	}