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PowerPC 64 fixes
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80cabfad
FB
1/*
2 * QEMU PC System Emulator
3 *
4 * Copyright (c) 2003-2004 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
80cabfad
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24#include "vl.h"
25
b41a2cd1
FB
26/* output Bochs bios info messages */
27//#define DEBUG_BIOS
28
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29#define BIOS_FILENAME "bios.bin"
30#define VGABIOS_FILENAME "vgabios.bin"
de9258a8 31#define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin"
80cabfad
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32#define LINUX_BOOT_FILENAME "linux_boot.bin"
33
34#define KERNEL_LOAD_ADDR 0x00100000
a80274c3 35#define MAX_INITRD_LOAD_ADDR 0x38000000
80cabfad
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36#define KERNEL_PARAMS_ADDR 0x00090000
37#define KERNEL_CMDLINE_ADDR 0x00099000
a80274c3
PB
38/* Leave a chunk of memory at the top of RAM for the BIOS ACPI tables. */
39#define ACPI_DATA_SIZE 0x10000
80cabfad 40
baca51fa 41static fdctrl_t *floppy_controller;
b0a21b53 42static RTCState *rtc_state;
ec844b96 43static PITState *pit;
d592d303 44static IOAPICState *ioapic;
a5954d5c 45static PCIDevice *i440fx_state;
80cabfad 46
b41a2cd1 47static void ioport80_write(void *opaque, uint32_t addr, uint32_t data)
80cabfad
FB
48{
49}
50
f929aad6
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51/* MSDOS compatibility mode FPU exception support */
52/* XXX: add IGNNE support */
53void cpu_set_ferr(CPUX86State *s)
54{
55 pic_set_irq(13, 1);
56}
57
58static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data)
59{
60 pic_set_irq(13, 0);
61}
62
28ab0e2e 63/* TSC handling */
28ab0e2e
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64uint64_t cpu_get_tsc(CPUX86State *env)
65{
1dce7c3c
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66 /* Note: when using kqemu, it is more logical to return the host TSC
67 because kqemu does not trap the RDTSC instruction for
68 performance reasons */
69#if USE_KQEMU
70 if (env->kqemu_enabled) {
71 return cpu_get_real_ticks();
72 } else
73#endif
74 {
75 return cpu_get_ticks();
76 }
28ab0e2e
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77}
78
a5954d5c
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79/* SMM support */
80void cpu_smm_update(CPUState *env)
81{
82 if (i440fx_state && env == first_cpu)
83 i440fx_set_smm(i440fx_state, (env->hflags >> HF_SMM_SHIFT) & 1);
84}
85
86
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87/* IRQ handling */
88int cpu_get_pic_interrupt(CPUState *env)
89{
90 int intno;
91
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92 intno = apic_get_interrupt(env);
93 if (intno >= 0) {
94 /* set irq request if a PIC irq is still pending */
95 /* XXX: improve that */
96 pic_update_irq(isa_pic);
97 return intno;
98 }
3de388f6
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99 /* read the irq from the PIC */
100 intno = pic_read_irq(isa_pic);
101 return intno;
102}
103
104static void pic_irq_request(void *opaque, int level)
105{
59b8ad81 106 CPUState *env = opaque;
3de388f6 107 if (level)
59b8ad81 108 cpu_interrupt(env, CPU_INTERRUPT_HARD);
3de388f6 109 else
59b8ad81 110 cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
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111}
112
b0a21b53
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113/* PC cmos mappings */
114
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115#define REG_EQUIPMENT_BYTE 0x14
116
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117static int cmos_get_fd_drive_type(int fd0)
118{
119 int val;
120
121 switch (fd0) {
122 case 0:
123 /* 1.44 Mb 3"5 drive */
124 val = 4;
125 break;
126 case 1:
127 /* 2.88 Mb 3"5 drive */
128 val = 5;
129 break;
130 case 2:
131 /* 1.2 Mb 5"5 drive */
132 val = 2;
133 break;
134 default:
135 val = 0;
136 break;
137 }
138 return val;
139}
140
ba6c2377
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141static void cmos_init_hd(int type_ofs, int info_ofs, BlockDriverState *hd)
142{
143 RTCState *s = rtc_state;
144 int cylinders, heads, sectors;
145 bdrv_get_geometry_hint(hd, &cylinders, &heads, &sectors);
146 rtc_set_memory(s, type_ofs, 47);
147 rtc_set_memory(s, info_ofs, cylinders);
148 rtc_set_memory(s, info_ofs + 1, cylinders >> 8);
149 rtc_set_memory(s, info_ofs + 2, heads);
150 rtc_set_memory(s, info_ofs + 3, 0xff);
151 rtc_set_memory(s, info_ofs + 4, 0xff);
152 rtc_set_memory(s, info_ofs + 5, 0xc0 | ((heads > 8) << 3));
153 rtc_set_memory(s, info_ofs + 6, cylinders);
154 rtc_set_memory(s, info_ofs + 7, cylinders >> 8);
155 rtc_set_memory(s, info_ofs + 8, sectors);
156}
157
158/* hd_table must contain 4 block drivers */
159static void cmos_init(int ram_size, int boot_device, BlockDriverState **hd_table)
80cabfad 160{
b0a21b53 161 RTCState *s = rtc_state;
80cabfad 162 int val;
b41a2cd1 163 int fd0, fd1, nb;
ba6c2377 164 int i;
b0a21b53 165
b0a21b53 166 /* various important CMOS locations needed by PC/Bochs bios */
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167
168 /* memory size */
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169 val = 640; /* base memory in K */
170 rtc_set_memory(s, 0x15, val);
171 rtc_set_memory(s, 0x16, val >> 8);
172
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173 val = (ram_size / 1024) - 1024;
174 if (val > 65535)
175 val = 65535;
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176 rtc_set_memory(s, 0x17, val);
177 rtc_set_memory(s, 0x18, val >> 8);
178 rtc_set_memory(s, 0x30, val);
179 rtc_set_memory(s, 0x31, val >> 8);
80cabfad 180
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181 if (ram_size > (16 * 1024 * 1024))
182 val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536);
183 else
184 val = 0;
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185 if (val > 65535)
186 val = 65535;
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187 rtc_set_memory(s, 0x34, val);
188 rtc_set_memory(s, 0x35, val >> 8);
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189
190 switch(boot_device) {
191 case 'a':
192 case 'b':
b0a21b53 193 rtc_set_memory(s, 0x3d, 0x01); /* floppy boot */
52ca8d6a
FB
194 if (!fd_bootchk)
195 rtc_set_memory(s, 0x38, 0x01); /* disable signature check */
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196 break;
197 default:
198 case 'c':
b0a21b53 199 rtc_set_memory(s, 0x3d, 0x02); /* hard drive boot */
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200 break;
201 case 'd':
b0a21b53 202 rtc_set_memory(s, 0x3d, 0x03); /* CD-ROM boot */
80cabfad
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203 break;
204 }
80cabfad 205
b41a2cd1
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206 /* floppy type */
207
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208 fd0 = fdctrl_get_drive_type(floppy_controller, 0);
209 fd1 = fdctrl_get_drive_type(floppy_controller, 1);
80cabfad 210
777428f2 211 val = (cmos_get_fd_drive_type(fd0) << 4) | cmos_get_fd_drive_type(fd1);
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212 rtc_set_memory(s, 0x10, val);
213
214 val = 0;
b41a2cd1 215 nb = 0;
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216 if (fd0 < 3)
217 nb++;
218 if (fd1 < 3)
219 nb++;
220 switch (nb) {
221 case 0:
222 break;
223 case 1:
b0a21b53 224 val |= 0x01; /* 1 drive, ready for boot */
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225 break;
226 case 2:
b0a21b53 227 val |= 0x41; /* 2 drives, ready for boot */
80cabfad
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228 break;
229 }
b0a21b53
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230 val |= 0x02; /* FPU is there */
231 val |= 0x04; /* PS/2 mouse installed */
232 rtc_set_memory(s, REG_EQUIPMENT_BYTE, val);
233
ba6c2377
FB
234 /* hard drives */
235
236 rtc_set_memory(s, 0x12, (hd_table[0] ? 0xf0 : 0) | (hd_table[1] ? 0x0f : 0));
237 if (hd_table[0])
238 cmos_init_hd(0x19, 0x1b, hd_table[0]);
239 if (hd_table[1])
240 cmos_init_hd(0x1a, 0x24, hd_table[1]);
241
242 val = 0;
40b6ecc6 243 for (i = 0; i < 4; i++) {
ba6c2377 244 if (hd_table[i]) {
46d4767d
FB
245 int cylinders, heads, sectors, translation;
246 /* NOTE: bdrv_get_geometry_hint() returns the physical
247 geometry. It is always such that: 1 <= sects <= 63, 1
248 <= heads <= 16, 1 <= cylinders <= 16383. The BIOS
249 geometry can be different if a translation is done. */
250 translation = bdrv_get_translation_hint(hd_table[i]);
251 if (translation == BIOS_ATA_TRANSLATION_AUTO) {
252 bdrv_get_geometry_hint(hd_table[i], &cylinders, &heads, &sectors);
253 if (cylinders <= 1024 && heads <= 16 && sectors <= 63) {
254 /* No translation. */
255 translation = 0;
256 } else {
257 /* LBA translation. */
258 translation = 1;
259 }
40b6ecc6 260 } else {
46d4767d 261 translation--;
ba6c2377 262 }
ba6c2377
FB
263 val |= translation << (i * 2);
264 }
40b6ecc6 265 }
ba6c2377 266 rtc_set_memory(s, 0x39, val);
80cabfad
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267}
268
59b8ad81
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269void ioport_set_a20(int enable)
270{
271 /* XXX: send to all CPUs ? */
272 cpu_x86_set_a20(first_cpu, enable);
273}
274
275int ioport_get_a20(void)
276{
277 return ((first_cpu->a20_mask >> 20) & 1);
278}
279
e1a23744
FB
280static void ioport92_write(void *opaque, uint32_t addr, uint32_t val)
281{
59b8ad81 282 ioport_set_a20((val >> 1) & 1);
e1a23744
FB
283 /* XXX: bit 0 is fast reset */
284}
285
286static uint32_t ioport92_read(void *opaque, uint32_t addr)
287{
59b8ad81 288 return ioport_get_a20() << 1;
e1a23744
FB
289}
290
80cabfad
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291/***********************************************************/
292/* Bochs BIOS debug ports */
293
b41a2cd1 294void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val)
80cabfad 295{
a2f659ee
FB
296 static const char shutdown_str[8] = "Shutdown";
297 static int shutdown_index = 0;
298
80cabfad
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299 switch(addr) {
300 /* Bochs BIOS messages */
301 case 0x400:
302 case 0x401:
303 fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
304 exit(1);
305 case 0x402:
306 case 0x403:
307#ifdef DEBUG_BIOS
308 fprintf(stderr, "%c", val);
309#endif
310 break;
a2f659ee
FB
311 case 0x8900:
312 /* same as Bochs power off */
313 if (val == shutdown_str[shutdown_index]) {
314 shutdown_index++;
315 if (shutdown_index == 8) {
316 shutdown_index = 0;
317 qemu_system_shutdown_request();
318 }
319 } else {
320 shutdown_index = 0;
321 }
322 break;
80cabfad
FB
323
324 /* LGPL'ed VGA BIOS messages */
325 case 0x501:
326 case 0x502:
327 fprintf(stderr, "VGA BIOS panic, line %d\n", val);
328 exit(1);
329 case 0x500:
330 case 0x503:
331#ifdef DEBUG_BIOS
332 fprintf(stderr, "%c", val);
333#endif
334 break;
335 }
336}
337
338void bochs_bios_init(void)
339{
b41a2cd1
FB
340 register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL);
341 register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL);
342 register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL);
343 register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL);
a2f659ee 344 register_ioport_write(0x8900, 1, 1, bochs_bios_write, NULL);
b41a2cd1
FB
345
346 register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL);
347 register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL);
348 register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL);
349 register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL);
80cabfad
FB
350}
351
352
353int load_kernel(const char *filename, uint8_t *addr,
354 uint8_t *real_addr)
355{
356 int fd, size;
357 int setup_sects;
358
096b7ea4 359 fd = open(filename, O_RDONLY | O_BINARY);
80cabfad
FB
360 if (fd < 0)
361 return -1;
362
363 /* load 16 bit code */
364 if (read(fd, real_addr, 512) != 512)
365 goto fail;
366 setup_sects = real_addr[0x1F1];
367 if (!setup_sects)
368 setup_sects = 4;
369 if (read(fd, real_addr + 512, setup_sects * 512) !=
370 setup_sects * 512)
371 goto fail;
372
373 /* load 32 bit code */
374 size = read(fd, addr, 16 * 1024 * 1024);
375 if (size < 0)
376 goto fail;
377 close(fd);
378 return size;
379 fail:
380 close(fd);
381 return -1;
382}
383
59b8ad81
FB
384static void main_cpu_reset(void *opaque)
385{
386 CPUState *env = opaque;
387 cpu_reset(env);
388}
389
b41a2cd1
FB
390static const int ide_iobase[2] = { 0x1f0, 0x170 };
391static const int ide_iobase2[2] = { 0x3f6, 0x376 };
392static const int ide_irq[2] = { 14, 15 };
393
394#define NE2000_NB_MAX 6
395
8d11df9e 396static int ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, 0x280, 0x380 };
b41a2cd1
FB
397static int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 };
398
8d11df9e
FB
399static int serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
400static int serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 };
401
6508fe59
FB
402static int parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc };
403static int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 };
404
6a36d84e
FB
405#ifdef HAS_AUDIO
406static void audio_init (PCIBus *pci_bus)
407{
408 struct soundhw *c;
409 int audio_enabled = 0;
410
411 for (c = soundhw; !audio_enabled && c->name; ++c) {
412 audio_enabled = c->enabled;
413 }
414
415 if (audio_enabled) {
416 AudioState *s;
417
418 s = AUD_init ();
419 if (s) {
420 for (c = soundhw; c->name; ++c) {
421 if (c->enabled) {
422 if (c->isa) {
423 c->init.init_isa (s);
424 }
425 else {
426 if (pci_bus) {
427 c->init.init_pci (pci_bus, s);
428 }
429 }
430 }
431 }
432 }
433 }
434}
435#endif
436
a41b2ff2
PB
437static void pc_init_ne2k_isa(NICInfo *nd)
438{
439 static int nb_ne2k = 0;
440
441 if (nb_ne2k == NE2000_NB_MAX)
442 return;
443 isa_ne2000_init(ne2000_io[nb_ne2k], ne2000_irq[nb_ne2k], nd);
444 nb_ne2k++;
445}
446
80cabfad 447/* PC hardware initialisation */
b5ff2d6e
FB
448static void pc_init1(int ram_size, int vga_ram_size, int boot_device,
449 DisplayState *ds, const char **fd_filename, int snapshot,
450 const char *kernel_filename, const char *kernel_cmdline,
3dbbdc25
FB
451 const char *initrd_filename,
452 int pci_enabled)
80cabfad
FB
453{
454 char buf[1024];
a41b2ff2 455 int ret, linux_boot, initrd_size, i;
970ac5a3 456 ram_addr_t ram_addr, vga_ram_addr, bios_offset, vga_bios_offset;
a80274c3 457 ram_addr_t initrd_offset;
970ac5a3 458 int bios_size, isa_bios_size, vga_bios_size;
46e50e9d 459 PCIBus *pci_bus;
5c3ff3a7 460 int piix3_devfn = -1;
59b8ad81 461 CPUState *env;
a41b2ff2 462 NICInfo *nd;
d592d303 463
80cabfad
FB
464 linux_boot = (kernel_filename != NULL);
465
59b8ad81
FB
466 /* init CPUs */
467 for(i = 0; i < smp_cpus; i++) {
468 env = cpu_init();
469 if (i != 0)
ad49ff9d 470 env->hflags |= HF_HALTED_MASK;
59b8ad81
FB
471 if (smp_cpus > 1) {
472 /* XXX: enable it in all cases */
473 env->cpuid_features |= CPUID_APIC;
474 }
a5954d5c 475 register_savevm("cpu", i, 4, cpu_save, cpu_load, env);
59b8ad81
FB
476 qemu_register_reset(main_cpu_reset, env);
477 if (pci_enabled) {
478 apic_init(env);
479 }
480 }
481
80cabfad 482 /* allocate RAM */
970ac5a3
FB
483 ram_addr = qemu_ram_alloc(ram_size);
484 cpu_register_physical_memory(0, ram_size, ram_addr);
80cabfad 485
970ac5a3
FB
486 /* allocate VGA RAM */
487 vga_ram_addr = qemu_ram_alloc(vga_ram_size);
7587cf44 488
970ac5a3 489 /* BIOS load */
80cabfad 490 snprintf(buf, sizeof(buf), "%s/%s", bios_dir, BIOS_FILENAME);
7587cf44
FB
491 bios_size = get_image_size(buf);
492 if (bios_size <= 0 ||
970ac5a3 493 (bios_size % 65536) != 0) {
7587cf44
FB
494 goto bios_error;
495 }
970ac5a3 496 bios_offset = qemu_ram_alloc(bios_size);
7587cf44
FB
497 ret = load_image(buf, phys_ram_base + bios_offset);
498 if (ret != bios_size) {
499 bios_error:
970ac5a3 500 fprintf(stderr, "qemu: could not load PC BIOS '%s'\n", buf);
80cabfad
FB
501 exit(1);
502 }
7587cf44 503
80cabfad 504 /* VGA BIOS load */
de9258a8
FB
505 if (cirrus_vga_enabled) {
506 snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_CIRRUS_FILENAME);
507 } else {
508 snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
509 }
970ac5a3
FB
510 vga_bios_size = get_image_size(buf);
511 if (vga_bios_size <= 0 || vga_bios_size > 65536)
512 goto vga_bios_error;
513 vga_bios_offset = qemu_ram_alloc(65536);
514
7587cf44 515 ret = load_image(buf, phys_ram_base + vga_bios_offset);
970ac5a3
FB
516 if (ret != vga_bios_size) {
517 vga_bios_error:
518 fprintf(stderr, "qemu: could not load VGA BIOS '%s'\n", buf);
519 exit(1);
520 }
521
80cabfad 522 /* setup basic memory access */
7587cf44
FB
523 cpu_register_physical_memory(0xc0000, 0x10000,
524 vga_bios_offset | IO_MEM_ROM);
525
526 /* map the last 128KB of the BIOS in ISA space */
527 isa_bios_size = bios_size;
528 if (isa_bios_size > (128 * 1024))
529 isa_bios_size = 128 * 1024;
530 cpu_register_physical_memory(0xd0000, (192 * 1024) - isa_bios_size,
531 IO_MEM_UNASSIGNED);
532 cpu_register_physical_memory(0x100000 - isa_bios_size,
533 isa_bios_size,
534 (bios_offset + bios_size - isa_bios_size) | IO_MEM_ROM);
9ae02555 535
970ac5a3
FB
536 {
537 ram_addr_t option_rom_offset;
538 int size, offset;
539
540 offset = 0;
541 for (i = 0; i < nb_option_roms; i++) {
542 size = get_image_size(option_rom[i]);
543 if (size < 0) {
544 fprintf(stderr, "Could not load option rom '%s'\n",
545 option_rom[i]);
546 exit(1);
547 }
548 if (size > (0x10000 - offset))
549 goto option_rom_error;
550 option_rom_offset = qemu_ram_alloc(size);
551 ret = load_image(option_rom[i], phys_ram_base + option_rom_offset);
552 if (ret != size) {
553 option_rom_error:
554 fprintf(stderr, "Too many option ROMS\n");
555 exit(1);
556 }
557 size = (size + 4095) & ~4095;
558 cpu_register_physical_memory(0xd0000 + offset,
559 size, option_rom_offset | IO_MEM_ROM);
560 offset += size;
561 }
9ae02555
TS
562 }
563
7587cf44
FB
564 /* map all the bios at the top of memory */
565 cpu_register_physical_memory((uint32_t)(-bios_size),
566 bios_size, bios_offset | IO_MEM_ROM);
80cabfad
FB
567
568 bochs_bios_init();
569
570 if (linux_boot) {
571 uint8_t bootsect[512];
41b9be47 572 uint8_t old_bootsect[512];
80cabfad
FB
573
574 if (bs_table[0] == NULL) {
575 fprintf(stderr, "A disk image must be given for 'hda' when booting a Linux kernel\n");
576 exit(1);
577 }
578 snprintf(buf, sizeof(buf), "%s/%s", bios_dir, LINUX_BOOT_FILENAME);
579 ret = load_image(buf, bootsect);
580 if (ret != sizeof(bootsect)) {
581 fprintf(stderr, "qemu: could not load linux boot sector '%s'\n",
582 buf);
583 exit(1);
584 }
585
41b9be47
FB
586 if (bdrv_read(bs_table[0], 0, old_bootsect, 1) >= 0) {
587 /* copy the MSDOS partition table */
588 memcpy(bootsect + 0x1be, old_bootsect + 0x1be, 0x40);
589 }
590
80cabfad
FB
591 bdrv_set_boot_sector(bs_table[0], bootsect, sizeof(bootsect));
592
593 /* now we can load the kernel */
594 ret = load_kernel(kernel_filename,
595 phys_ram_base + KERNEL_LOAD_ADDR,
596 phys_ram_base + KERNEL_PARAMS_ADDR);
597 if (ret < 0) {
598 fprintf(stderr, "qemu: could not load kernel '%s'\n",
599 kernel_filename);
600 exit(1);
601 }
602
603 /* load initrd */
604 initrd_size = 0;
a80274c3 605 initrd_offset = 0;
80cabfad 606 if (initrd_filename) {
a80274c3
PB
607 initrd_size = get_image_size (initrd_filename);
608 if (initrd_size > 0) {
609 initrd_offset = (ram_size - initrd_size) & TARGET_PAGE_MASK;
610 /* Leave space for BIOS ACPI tables. */
611 initrd_offset -= ACPI_DATA_SIZE;
612 /* Avoid the last 64k to avoid 2.2.x kernel bugs. */
613 initrd_offset -= 0x10000;
614 if (initrd_offset > MAX_INITRD_LOAD_ADDR)
615 initrd_offset = MAX_INITRD_LOAD_ADDR;
616
617 if (initrd_size > ram_size
618 || initrd_offset < KERNEL_LOAD_ADDR + ret) {
619 fprintf(stderr,
620 "qemu: memory too small for initial ram disk '%s'\n",
621 initrd_filename);
622 exit(1);
623 }
624 initrd_size = load_image(initrd_filename,
625 phys_ram_base + initrd_offset);
626 }
80cabfad
FB
627 if (initrd_size < 0) {
628 fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
629 initrd_filename);
630 exit(1);
631 }
632 }
633 if (initrd_size > 0) {
a80274c3 634 stl_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x218, initrd_offset);
80cabfad
FB
635 stl_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x21c, initrd_size);
636 }
637 pstrcpy(phys_ram_base + KERNEL_CMDLINE_ADDR, 4096,
638 kernel_cmdline);
639 stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x20, 0xA33F);
640 stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x22,
641 KERNEL_CMDLINE_ADDR - KERNEL_PARAMS_ADDR);
642 /* loader type */
643 stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x210, 0x01);
644 }
645
69b91039 646 if (pci_enabled) {
a5954d5c 647 pci_bus = i440fx_init(&i440fx_state);
8f1c91d8 648 piix3_devfn = piix3_init(pci_bus, -1);
46e50e9d
FB
649 } else {
650 pci_bus = NULL;
69b91039
FB
651 }
652
80cabfad 653 /* init basic PC hardware */
b41a2cd1 654 register_ioport_write(0x80, 1, 1, ioport80_write, NULL);
80cabfad 655
f929aad6
FB
656 register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL);
657
1f04275e
FB
658 if (cirrus_vga_enabled) {
659 if (pci_enabled) {
46e50e9d 660 pci_cirrus_vga_init(pci_bus,
970ac5a3
FB
661 ds, phys_ram_base + vga_ram_addr,
662 vga_ram_addr, vga_ram_size);
1f04275e 663 } else {
970ac5a3
FB
664 isa_cirrus_vga_init(ds, phys_ram_base + vga_ram_addr,
665 vga_ram_addr, vga_ram_size);
1f04275e 666 }
d34cab9f
TS
667 } else if (vmsvga_enabled) {
668 if (pci_enabled)
669 pci_vmsvga_init(pci_bus, ds, phys_ram_base + ram_size,
670 ram_size, vga_ram_size);
671 else
672 fprintf(stderr, "%s: vmware_vga: no PCI bus\n", __FUNCTION__);
1f04275e 673 } else {
89b6b508 674 if (pci_enabled) {
970ac5a3
FB
675 pci_vga_init(pci_bus, ds, phys_ram_base + vga_ram_addr,
676 vga_ram_addr, vga_ram_size, 0, 0);
89b6b508 677 } else {
970ac5a3
FB
678 isa_vga_init(ds, phys_ram_base + vga_ram_addr,
679 vga_ram_addr, vga_ram_size);
89b6b508 680 }
1f04275e 681 }
80cabfad 682
b0a21b53 683 rtc_state = rtc_init(0x70, 8);
80cabfad 684
e1a23744
FB
685 register_ioport_read(0x92, 1, 1, ioport92_read, NULL);
686 register_ioport_write(0x92, 1, 1, ioport92_write, NULL);
687
d592d303 688 if (pci_enabled) {
d592d303
FB
689 ioapic = ioapic_init();
690 }
59b8ad81 691 isa_pic = pic_init(pic_irq_request, first_cpu);
ec844b96 692 pit = pit_init(0x40, 0);
fd06c375 693 pcspk_init(pit);
d592d303
FB
694 if (pci_enabled) {
695 pic_set_alt_irq_func(isa_pic, ioapic_set_irq, ioapic);
696 }
b41a2cd1 697
8d11df9e
FB
698 for(i = 0; i < MAX_SERIAL_PORTS; i++) {
699 if (serial_hds[i]) {
e5d13e2f
FB
700 serial_init(&pic_set_irq_new, isa_pic,
701 serial_io[i], serial_irq[i], serial_hds[i]);
8d11df9e
FB
702 }
703 }
b41a2cd1 704
6508fe59
FB
705 for(i = 0; i < MAX_PARALLEL_PORTS; i++) {
706 if (parallel_hds[i]) {
707 parallel_init(parallel_io[i], parallel_irq[i], parallel_hds[i]);
708 }
709 }
710
a41b2ff2
PB
711 for(i = 0; i < nb_nics; i++) {
712 nd = &nd_table[i];
713 if (!nd->model) {
714 if (pci_enabled) {
715 nd->model = "ne2k_pci";
716 } else {
717 nd->model = "ne2k_isa";
718 }
69b91039 719 }
a41b2ff2
PB
720 if (strcmp(nd->model, "ne2k_isa") == 0) {
721 pc_init_ne2k_isa(nd);
722 } else if (pci_enabled) {
abcebc7e 723 pci_nic_init(pci_bus, nd, -1);
a41b2ff2
PB
724 } else {
725 fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd->model);
726 exit(1);
69b91039 727 }
a41b2ff2 728 }
b41a2cd1 729
a41b2ff2 730 if (pci_enabled) {
502a5395 731 pci_piix3_ide_init(pci_bus, bs_table, piix3_devfn + 1);
a41b2ff2 732 } else {
69b91039
FB
733 for(i = 0; i < 2; i++) {
734 isa_ide_init(ide_iobase[i], ide_iobase2[i], ide_irq[i],
735 bs_table[2 * i], bs_table[2 * i + 1]);
736 }
b41a2cd1 737 }
69b91039 738
80cabfad 739 kbd_init();
7c29d0c0 740 DMA_init(0);
6a36d84e
FB
741#ifdef HAS_AUDIO
742 audio_init(pci_enabled ? pci_bus : NULL);
fb065187 743#endif
80cabfad 744
baca51fa 745 floppy_controller = fdctrl_init(6, 2, 0, 0x3f0, fd_table);
b41a2cd1 746
ba6c2377 747 cmos_init(ram_size, boot_device, bs_table);
69b91039 748
bb36d470 749 if (pci_enabled && usb_enabled) {
0d92ed30 750 usb_uhci_init(pci_bus, piix3_devfn + 2);
bb36d470
FB
751 }
752
6515b203 753 if (pci_enabled && acpi_enabled) {
3fffc223 754 uint8_t *eeprom_buf = qemu_mallocz(8 * 256); /* XXX: make this persistent */
502a5395 755 piix4_pm_init(pci_bus, piix3_devfn + 3);
3fffc223
TS
756 for (i = 0; i < 8; i++) {
757 SMBusDevice *eeprom = smbus_eeprom_device_init(0x50 + i,
758 eeprom_buf + (i * 256));
759 piix4_smbus_register_device(eeprom, 0x50 + i);
760 }
6515b203 761 }
a5954d5c
FB
762
763 if (i440fx_state) {
764 i440fx_init_memory_mappings(i440fx_state);
765 }
96d30e48
TS
766#if 0
767 /* ??? Need to figure out some way for the user to
768 specify SCSI devices. */
7d8406be
PB
769 if (pci_enabled) {
770 void *scsi;
96d30e48
TS
771 BlockDriverState *bdrv;
772
773 scsi = lsi_scsi_init(pci_bus, -1);
774 bdrv = bdrv_new("scsidisk");
775 bdrv_open(bdrv, "scsi_disk.img", 0);
776 lsi_scsi_attach(scsi, bdrv, -1);
777 bdrv = bdrv_new("scsicd");
778 bdrv_open(bdrv, "scsi_cd.iso", 0);
779 bdrv_set_type_hint(bdrv, BDRV_TYPE_CDROM);
780 lsi_scsi_attach(scsi, bdrv, -1);
7d8406be 781 }
96d30e48 782#endif
80cabfad 783}
b5ff2d6e 784
3dbbdc25
FB
785static void pc_init_pci(int ram_size, int vga_ram_size, int boot_device,
786 DisplayState *ds, const char **fd_filename,
787 int snapshot,
788 const char *kernel_filename,
789 const char *kernel_cmdline,
94fc95cd
JM
790 const char *initrd_filename,
791 const char *cpu_model)
3dbbdc25
FB
792{
793 pc_init1(ram_size, vga_ram_size, boot_device,
794 ds, fd_filename, snapshot,
795 kernel_filename, kernel_cmdline,
796 initrd_filename, 1);
797}
798
799static void pc_init_isa(int ram_size, int vga_ram_size, int boot_device,
800 DisplayState *ds, const char **fd_filename,
801 int snapshot,
802 const char *kernel_filename,
803 const char *kernel_cmdline,
94fc95cd
JM
804 const char *initrd_filename,
805 const char *cpu_model)
3dbbdc25
FB
806{
807 pc_init1(ram_size, vga_ram_size, boot_device,
808 ds, fd_filename, snapshot,
809 kernel_filename, kernel_cmdline,
810 initrd_filename, 0);
811}
812
b5ff2d6e
FB
813QEMUMachine pc_machine = {
814 "pc",
815 "Standard PC",
3dbbdc25
FB
816 pc_init_pci,
817};
818
819QEMUMachine isapc_machine = {
820 "isapc",
821 "ISA-only PC",
822 pc_init_isa,
b5ff2d6e 823};