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Commit | Line | Data |
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80cabfad FB |
1 | /* |
2 | * QEMU PC System Emulator | |
3 | * | |
4 | * Copyright (c) 2003-2004 Fabrice Bellard | |
5 | * | |
6 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
7 | * of this software and associated documentation files (the "Software"), to deal | |
8 | * in the Software without restriction, including without limitation the rights | |
9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
10 | * copies of the Software, and to permit persons to whom the Software is | |
11 | * furnished to do so, subject to the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice shall be included in | |
14 | * all copies or substantial portions of the Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
22 | * THE SOFTWARE. | |
23 | */ | |
80cabfad FB |
24 | #include "vl.h" |
25 | ||
b41a2cd1 FB |
26 | /* output Bochs bios info messages */ |
27 | //#define DEBUG_BIOS | |
28 | ||
80cabfad FB |
29 | #define BIOS_FILENAME "bios.bin" |
30 | #define VGABIOS_FILENAME "vgabios.bin" | |
de9258a8 | 31 | #define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin" |
80cabfad | 32 | |
a80274c3 PB |
33 | /* Leave a chunk of memory at the top of RAM for the BIOS ACPI tables. */ |
34 | #define ACPI_DATA_SIZE 0x10000 | |
80cabfad | 35 | |
baca51fa | 36 | static fdctrl_t *floppy_controller; |
b0a21b53 | 37 | static RTCState *rtc_state; |
ec844b96 | 38 | static PITState *pit; |
d592d303 | 39 | static IOAPICState *ioapic; |
a5954d5c | 40 | static PCIDevice *i440fx_state; |
80cabfad | 41 | |
b41a2cd1 | 42 | static void ioport80_write(void *opaque, uint32_t addr, uint32_t data) |
80cabfad FB |
43 | { |
44 | } | |
45 | ||
f929aad6 | 46 | /* MSDOS compatibility mode FPU exception support */ |
d537cf6c | 47 | static qemu_irq ferr_irq; |
f929aad6 FB |
48 | /* XXX: add IGNNE support */ |
49 | void cpu_set_ferr(CPUX86State *s) | |
50 | { | |
d537cf6c | 51 | qemu_irq_raise(ferr_irq); |
f929aad6 FB |
52 | } |
53 | ||
54 | static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data) | |
55 | { | |
d537cf6c | 56 | qemu_irq_lower(ferr_irq); |
f929aad6 FB |
57 | } |
58 | ||
28ab0e2e | 59 | /* TSC handling */ |
28ab0e2e FB |
60 | uint64_t cpu_get_tsc(CPUX86State *env) |
61 | { | |
1dce7c3c FB |
62 | /* Note: when using kqemu, it is more logical to return the host TSC |
63 | because kqemu does not trap the RDTSC instruction for | |
64 | performance reasons */ | |
65 | #if USE_KQEMU | |
66 | if (env->kqemu_enabled) { | |
67 | return cpu_get_real_ticks(); | |
68 | } else | |
69 | #endif | |
70 | { | |
71 | return cpu_get_ticks(); | |
72 | } | |
28ab0e2e FB |
73 | } |
74 | ||
a5954d5c FB |
75 | /* SMM support */ |
76 | void cpu_smm_update(CPUState *env) | |
77 | { | |
78 | if (i440fx_state && env == first_cpu) | |
79 | i440fx_set_smm(i440fx_state, (env->hflags >> HF_SMM_SHIFT) & 1); | |
80 | } | |
81 | ||
82 | ||
3de388f6 FB |
83 | /* IRQ handling */ |
84 | int cpu_get_pic_interrupt(CPUState *env) | |
85 | { | |
86 | int intno; | |
87 | ||
3de388f6 FB |
88 | intno = apic_get_interrupt(env); |
89 | if (intno >= 0) { | |
90 | /* set irq request if a PIC irq is still pending */ | |
91 | /* XXX: improve that */ | |
92 | pic_update_irq(isa_pic); | |
93 | return intno; | |
94 | } | |
3de388f6 FB |
95 | /* read the irq from the PIC */ |
96 | intno = pic_read_irq(isa_pic); | |
97 | return intno; | |
98 | } | |
99 | ||
d537cf6c | 100 | static void pic_irq_request(void *opaque, int irq, int level) |
3de388f6 | 101 | { |
59b8ad81 | 102 | CPUState *env = opaque; |
3de388f6 | 103 | if (level) |
59b8ad81 | 104 | cpu_interrupt(env, CPU_INTERRUPT_HARD); |
3de388f6 | 105 | else |
59b8ad81 | 106 | cpu_reset_interrupt(env, CPU_INTERRUPT_HARD); |
3de388f6 FB |
107 | } |
108 | ||
b0a21b53 FB |
109 | /* PC cmos mappings */ |
110 | ||
80cabfad FB |
111 | #define REG_EQUIPMENT_BYTE 0x14 |
112 | ||
777428f2 FB |
113 | static int cmos_get_fd_drive_type(int fd0) |
114 | { | |
115 | int val; | |
116 | ||
117 | switch (fd0) { | |
118 | case 0: | |
119 | /* 1.44 Mb 3"5 drive */ | |
120 | val = 4; | |
121 | break; | |
122 | case 1: | |
123 | /* 2.88 Mb 3"5 drive */ | |
124 | val = 5; | |
125 | break; | |
126 | case 2: | |
127 | /* 1.2 Mb 5"5 drive */ | |
128 | val = 2; | |
129 | break; | |
130 | default: | |
131 | val = 0; | |
132 | break; | |
133 | } | |
134 | return val; | |
135 | } | |
136 | ||
ba6c2377 FB |
137 | static void cmos_init_hd(int type_ofs, int info_ofs, BlockDriverState *hd) |
138 | { | |
139 | RTCState *s = rtc_state; | |
140 | int cylinders, heads, sectors; | |
141 | bdrv_get_geometry_hint(hd, &cylinders, &heads, §ors); | |
142 | rtc_set_memory(s, type_ofs, 47); | |
143 | rtc_set_memory(s, info_ofs, cylinders); | |
144 | rtc_set_memory(s, info_ofs + 1, cylinders >> 8); | |
145 | rtc_set_memory(s, info_ofs + 2, heads); | |
146 | rtc_set_memory(s, info_ofs + 3, 0xff); | |
147 | rtc_set_memory(s, info_ofs + 4, 0xff); | |
148 | rtc_set_memory(s, info_ofs + 5, 0xc0 | ((heads > 8) << 3)); | |
149 | rtc_set_memory(s, info_ofs + 6, cylinders); | |
150 | rtc_set_memory(s, info_ofs + 7, cylinders >> 8); | |
151 | rtc_set_memory(s, info_ofs + 8, sectors); | |
152 | } | |
153 | ||
154 | /* hd_table must contain 4 block drivers */ | |
155 | static void cmos_init(int ram_size, int boot_device, BlockDriverState **hd_table) | |
80cabfad | 156 | { |
b0a21b53 | 157 | RTCState *s = rtc_state; |
80cabfad | 158 | int val; |
b41a2cd1 | 159 | int fd0, fd1, nb; |
ba6c2377 | 160 | int i; |
b0a21b53 | 161 | |
b0a21b53 | 162 | /* various important CMOS locations needed by PC/Bochs bios */ |
80cabfad FB |
163 | |
164 | /* memory size */ | |
333190eb FB |
165 | val = 640; /* base memory in K */ |
166 | rtc_set_memory(s, 0x15, val); | |
167 | rtc_set_memory(s, 0x16, val >> 8); | |
168 | ||
80cabfad FB |
169 | val = (ram_size / 1024) - 1024; |
170 | if (val > 65535) | |
171 | val = 65535; | |
b0a21b53 FB |
172 | rtc_set_memory(s, 0x17, val); |
173 | rtc_set_memory(s, 0x18, val >> 8); | |
174 | rtc_set_memory(s, 0x30, val); | |
175 | rtc_set_memory(s, 0x31, val >> 8); | |
80cabfad | 176 | |
9da98861 FB |
177 | if (ram_size > (16 * 1024 * 1024)) |
178 | val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536); | |
179 | else | |
180 | val = 0; | |
80cabfad FB |
181 | if (val > 65535) |
182 | val = 65535; | |
b0a21b53 FB |
183 | rtc_set_memory(s, 0x34, val); |
184 | rtc_set_memory(s, 0x35, val >> 8); | |
80cabfad FB |
185 | |
186 | switch(boot_device) { | |
187 | case 'a': | |
188 | case 'b': | |
b0a21b53 | 189 | rtc_set_memory(s, 0x3d, 0x01); /* floppy boot */ |
52ca8d6a FB |
190 | if (!fd_bootchk) |
191 | rtc_set_memory(s, 0x38, 0x01); /* disable signature check */ | |
80cabfad FB |
192 | break; |
193 | default: | |
194 | case 'c': | |
b0a21b53 | 195 | rtc_set_memory(s, 0x3d, 0x02); /* hard drive boot */ |
80cabfad FB |
196 | break; |
197 | case 'd': | |
b0a21b53 | 198 | rtc_set_memory(s, 0x3d, 0x03); /* CD-ROM boot */ |
80cabfad FB |
199 | break; |
200 | } | |
80cabfad | 201 | |
b41a2cd1 FB |
202 | /* floppy type */ |
203 | ||
baca51fa FB |
204 | fd0 = fdctrl_get_drive_type(floppy_controller, 0); |
205 | fd1 = fdctrl_get_drive_type(floppy_controller, 1); | |
80cabfad | 206 | |
777428f2 | 207 | val = (cmos_get_fd_drive_type(fd0) << 4) | cmos_get_fd_drive_type(fd1); |
b0a21b53 FB |
208 | rtc_set_memory(s, 0x10, val); |
209 | ||
210 | val = 0; | |
b41a2cd1 | 211 | nb = 0; |
80cabfad FB |
212 | if (fd0 < 3) |
213 | nb++; | |
214 | if (fd1 < 3) | |
215 | nb++; | |
216 | switch (nb) { | |
217 | case 0: | |
218 | break; | |
219 | case 1: | |
b0a21b53 | 220 | val |= 0x01; /* 1 drive, ready for boot */ |
80cabfad FB |
221 | break; |
222 | case 2: | |
b0a21b53 | 223 | val |= 0x41; /* 2 drives, ready for boot */ |
80cabfad FB |
224 | break; |
225 | } | |
b0a21b53 FB |
226 | val |= 0x02; /* FPU is there */ |
227 | val |= 0x04; /* PS/2 mouse installed */ | |
228 | rtc_set_memory(s, REG_EQUIPMENT_BYTE, val); | |
229 | ||
ba6c2377 FB |
230 | /* hard drives */ |
231 | ||
232 | rtc_set_memory(s, 0x12, (hd_table[0] ? 0xf0 : 0) | (hd_table[1] ? 0x0f : 0)); | |
233 | if (hd_table[0]) | |
234 | cmos_init_hd(0x19, 0x1b, hd_table[0]); | |
235 | if (hd_table[1]) | |
236 | cmos_init_hd(0x1a, 0x24, hd_table[1]); | |
237 | ||
238 | val = 0; | |
40b6ecc6 | 239 | for (i = 0; i < 4; i++) { |
ba6c2377 | 240 | if (hd_table[i]) { |
46d4767d FB |
241 | int cylinders, heads, sectors, translation; |
242 | /* NOTE: bdrv_get_geometry_hint() returns the physical | |
243 | geometry. It is always such that: 1 <= sects <= 63, 1 | |
244 | <= heads <= 16, 1 <= cylinders <= 16383. The BIOS | |
245 | geometry can be different if a translation is done. */ | |
246 | translation = bdrv_get_translation_hint(hd_table[i]); | |
247 | if (translation == BIOS_ATA_TRANSLATION_AUTO) { | |
248 | bdrv_get_geometry_hint(hd_table[i], &cylinders, &heads, §ors); | |
249 | if (cylinders <= 1024 && heads <= 16 && sectors <= 63) { | |
250 | /* No translation. */ | |
251 | translation = 0; | |
252 | } else { | |
253 | /* LBA translation. */ | |
254 | translation = 1; | |
255 | } | |
40b6ecc6 | 256 | } else { |
46d4767d | 257 | translation--; |
ba6c2377 | 258 | } |
ba6c2377 FB |
259 | val |= translation << (i * 2); |
260 | } | |
40b6ecc6 | 261 | } |
ba6c2377 | 262 | rtc_set_memory(s, 0x39, val); |
80cabfad FB |
263 | } |
264 | ||
59b8ad81 FB |
265 | void ioport_set_a20(int enable) |
266 | { | |
267 | /* XXX: send to all CPUs ? */ | |
268 | cpu_x86_set_a20(first_cpu, enable); | |
269 | } | |
270 | ||
271 | int ioport_get_a20(void) | |
272 | { | |
273 | return ((first_cpu->a20_mask >> 20) & 1); | |
274 | } | |
275 | ||
e1a23744 FB |
276 | static void ioport92_write(void *opaque, uint32_t addr, uint32_t val) |
277 | { | |
59b8ad81 | 278 | ioport_set_a20((val >> 1) & 1); |
e1a23744 FB |
279 | /* XXX: bit 0 is fast reset */ |
280 | } | |
281 | ||
282 | static uint32_t ioport92_read(void *opaque, uint32_t addr) | |
283 | { | |
59b8ad81 | 284 | return ioport_get_a20() << 1; |
e1a23744 FB |
285 | } |
286 | ||
80cabfad FB |
287 | /***********************************************************/ |
288 | /* Bochs BIOS debug ports */ | |
289 | ||
b41a2cd1 | 290 | void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val) |
80cabfad | 291 | { |
a2f659ee FB |
292 | static const char shutdown_str[8] = "Shutdown"; |
293 | static int shutdown_index = 0; | |
294 | ||
80cabfad FB |
295 | switch(addr) { |
296 | /* Bochs BIOS messages */ | |
297 | case 0x400: | |
298 | case 0x401: | |
299 | fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val); | |
300 | exit(1); | |
301 | case 0x402: | |
302 | case 0x403: | |
303 | #ifdef DEBUG_BIOS | |
304 | fprintf(stderr, "%c", val); | |
305 | #endif | |
306 | break; | |
a2f659ee FB |
307 | case 0x8900: |
308 | /* same as Bochs power off */ | |
309 | if (val == shutdown_str[shutdown_index]) { | |
310 | shutdown_index++; | |
311 | if (shutdown_index == 8) { | |
312 | shutdown_index = 0; | |
313 | qemu_system_shutdown_request(); | |
314 | } | |
315 | } else { | |
316 | shutdown_index = 0; | |
317 | } | |
318 | break; | |
80cabfad FB |
319 | |
320 | /* LGPL'ed VGA BIOS messages */ | |
321 | case 0x501: | |
322 | case 0x502: | |
323 | fprintf(stderr, "VGA BIOS panic, line %d\n", val); | |
324 | exit(1); | |
325 | case 0x500: | |
326 | case 0x503: | |
327 | #ifdef DEBUG_BIOS | |
328 | fprintf(stderr, "%c", val); | |
329 | #endif | |
330 | break; | |
331 | } | |
332 | } | |
333 | ||
334 | void bochs_bios_init(void) | |
335 | { | |
b41a2cd1 FB |
336 | register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL); |
337 | register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL); | |
338 | register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL); | |
339 | register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL); | |
a2f659ee | 340 | register_ioport_write(0x8900, 1, 1, bochs_bios_write, NULL); |
b41a2cd1 FB |
341 | |
342 | register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL); | |
343 | register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL); | |
344 | register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL); | |
345 | register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL); | |
80cabfad FB |
346 | } |
347 | ||
642a4f96 TS |
348 | /* Generate an initial boot sector which sets state and jump to |
349 | a specified vector */ | |
3f6c925f | 350 | static void generate_bootsect(uint32_t gpr[8], uint16_t segs[6], uint16_t ip) |
642a4f96 TS |
351 | { |
352 | uint8_t bootsect[512], *p; | |
353 | int i; | |
354 | ||
355 | if (bs_table[0] == NULL) { | |
356 | fprintf(stderr, "A disk image must be given for 'hda' when booting " | |
357 | "a Linux kernel\n"); | |
358 | exit(1); | |
359 | } | |
360 | ||
361 | memset(bootsect, 0, sizeof(bootsect)); | |
362 | ||
363 | /* Copy the MSDOS partition table if possible */ | |
364 | bdrv_read(bs_table[0], 0, bootsect, 1); | |
365 | ||
366 | /* Make sure we have a partition signature */ | |
367 | bootsect[510] = 0x55; | |
368 | bootsect[511] = 0xaa; | |
369 | ||
370 | /* Actual code */ | |
371 | p = bootsect; | |
372 | *p++ = 0xfa; /* CLI */ | |
373 | *p++ = 0xfc; /* CLD */ | |
374 | ||
375 | for (i = 0; i < 6; i++) { | |
376 | if (i == 1) /* Skip CS */ | |
377 | continue; | |
378 | ||
379 | *p++ = 0xb8; /* MOV AX,imm16 */ | |
380 | *p++ = segs[i]; | |
381 | *p++ = segs[i] >> 8; | |
382 | *p++ = 0x8e; /* MOV <seg>,AX */ | |
383 | *p++ = 0xc0 + (i << 3); | |
384 | } | |
385 | ||
386 | for (i = 0; i < 8; i++) { | |
387 | *p++ = 0x66; /* 32-bit operand size */ | |
388 | *p++ = 0xb8 + i; /* MOV <reg>,imm32 */ | |
389 | *p++ = gpr[i]; | |
390 | *p++ = gpr[i] >> 8; | |
391 | *p++ = gpr[i] >> 16; | |
392 | *p++ = gpr[i] >> 24; | |
393 | } | |
394 | ||
395 | *p++ = 0xea; /* JMP FAR */ | |
396 | *p++ = ip; /* IP */ | |
397 | *p++ = ip >> 8; | |
398 | *p++ = segs[1]; /* CS */ | |
399 | *p++ = segs[1] >> 8; | |
400 | ||
401 | bdrv_set_boot_sector(bs_table[0], bootsect, sizeof(bootsect)); | |
402 | } | |
80cabfad FB |
403 | |
404 | int load_kernel(const char *filename, uint8_t *addr, | |
405 | uint8_t *real_addr) | |
406 | { | |
407 | int fd, size; | |
408 | int setup_sects; | |
409 | ||
096b7ea4 | 410 | fd = open(filename, O_RDONLY | O_BINARY); |
80cabfad FB |
411 | if (fd < 0) |
412 | return -1; | |
413 | ||
414 | /* load 16 bit code */ | |
415 | if (read(fd, real_addr, 512) != 512) | |
416 | goto fail; | |
417 | setup_sects = real_addr[0x1F1]; | |
418 | if (!setup_sects) | |
419 | setup_sects = 4; | |
420 | if (read(fd, real_addr + 512, setup_sects * 512) != | |
421 | setup_sects * 512) | |
422 | goto fail; | |
642a4f96 | 423 | |
80cabfad FB |
424 | /* load 32 bit code */ |
425 | size = read(fd, addr, 16 * 1024 * 1024); | |
426 | if (size < 0) | |
427 | goto fail; | |
428 | close(fd); | |
429 | return size; | |
430 | fail: | |
431 | close(fd); | |
432 | return -1; | |
433 | } | |
434 | ||
642a4f96 TS |
435 | static long get_file_size(FILE *f) |
436 | { | |
437 | long where, size; | |
438 | ||
439 | /* XXX: on Unix systems, using fstat() probably makes more sense */ | |
440 | ||
441 | where = ftell(f); | |
442 | fseek(f, 0, SEEK_END); | |
443 | size = ftell(f); | |
444 | fseek(f, where, SEEK_SET); | |
445 | ||
446 | return size; | |
447 | } | |
448 | ||
449 | static void load_linux(const char *kernel_filename, | |
450 | const char *initrd_filename, | |
451 | const char *kernel_cmdline) | |
452 | { | |
453 | uint16_t protocol; | |
454 | uint32_t gpr[8]; | |
455 | uint16_t seg[6]; | |
456 | uint16_t real_seg; | |
457 | int setup_size, kernel_size, initrd_size, cmdline_size; | |
458 | uint32_t initrd_max; | |
459 | uint8_t header[1024]; | |
460 | uint8_t *real_addr, *prot_addr, *cmdline_addr, *initrd_addr; | |
461 | FILE *f, *fi; | |
462 | ||
463 | /* Align to 16 bytes as a paranoia measure */ | |
464 | cmdline_size = (strlen(kernel_cmdline)+16) & ~15; | |
465 | ||
466 | /* load the kernel header */ | |
467 | f = fopen(kernel_filename, "rb"); | |
468 | if (!f || !(kernel_size = get_file_size(f)) || | |
469 | fread(header, 1, 1024, f) != 1024) { | |
470 | fprintf(stderr, "qemu: could not load kernel '%s'\n", | |
471 | kernel_filename); | |
472 | exit(1); | |
473 | } | |
474 | ||
475 | /* kernel protocol version */ | |
476 | fprintf(stderr, "header magic: %#x\n", ldl_p(header+0x202)); | |
477 | if (ldl_p(header+0x202) == 0x53726448) | |
478 | protocol = lduw_p(header+0x206); | |
479 | else | |
480 | protocol = 0; | |
481 | ||
482 | if (protocol < 0x200 || !(header[0x211] & 0x01)) { | |
483 | /* Low kernel */ | |
484 | real_addr = phys_ram_base + 0x90000; | |
485 | cmdline_addr = phys_ram_base + 0x9a000 - cmdline_size; | |
486 | prot_addr = phys_ram_base + 0x10000; | |
487 | } else if (protocol < 0x202) { | |
488 | /* High but ancient kernel */ | |
489 | real_addr = phys_ram_base + 0x90000; | |
490 | cmdline_addr = phys_ram_base + 0x9a000 - cmdline_size; | |
491 | prot_addr = phys_ram_base + 0x100000; | |
492 | } else { | |
493 | /* High and recent kernel */ | |
494 | real_addr = phys_ram_base + 0x10000; | |
495 | cmdline_addr = phys_ram_base + 0x20000; | |
496 | prot_addr = phys_ram_base + 0x100000; | |
497 | } | |
498 | ||
499 | fprintf(stderr, | |
500 | "qemu: real_addr = %#zx\n" | |
501 | "qemu: cmdline_addr = %#zx\n" | |
502 | "qemu: prot_addr = %#zx\n", | |
503 | real_addr-phys_ram_base, | |
504 | cmdline_addr-phys_ram_base, | |
505 | prot_addr-phys_ram_base); | |
506 | ||
507 | /* highest address for loading the initrd */ | |
508 | if (protocol >= 0x203) | |
509 | initrd_max = ldl_p(header+0x22c); | |
510 | else | |
511 | initrd_max = 0x37ffffff; | |
512 | ||
513 | if (initrd_max >= ram_size-ACPI_DATA_SIZE) | |
514 | initrd_max = ram_size-ACPI_DATA_SIZE-1; | |
515 | ||
516 | /* kernel command line */ | |
517 | pstrcpy(cmdline_addr, 4096, kernel_cmdline); | |
518 | ||
519 | if (protocol >= 0x202) { | |
520 | stl_p(header+0x228, cmdline_addr-phys_ram_base); | |
521 | } else { | |
522 | stw_p(header+0x20, 0xA33F); | |
523 | stw_p(header+0x22, cmdline_addr-real_addr); | |
524 | } | |
525 | ||
526 | /* loader type */ | |
527 | /* High nybble = B reserved for Qemu; low nybble is revision number. | |
528 | If this code is substantially changed, you may want to consider | |
529 | incrementing the revision. */ | |
530 | if (protocol >= 0x200) | |
531 | header[0x210] = 0xB0; | |
532 | ||
533 | /* heap */ | |
534 | if (protocol >= 0x201) { | |
535 | header[0x211] |= 0x80; /* CAN_USE_HEAP */ | |
536 | stw_p(header+0x224, cmdline_addr-real_addr-0x200); | |
537 | } | |
538 | ||
539 | /* load initrd */ | |
540 | if (initrd_filename) { | |
541 | if (protocol < 0x200) { | |
542 | fprintf(stderr, "qemu: linux kernel too old to load a ram disk\n"); | |
543 | exit(1); | |
544 | } | |
545 | ||
546 | fi = fopen(initrd_filename, "rb"); | |
547 | if (!fi) { | |
548 | fprintf(stderr, "qemu: could not load initial ram disk '%s'\n", | |
549 | initrd_filename); | |
550 | exit(1); | |
551 | } | |
552 | ||
553 | initrd_size = get_file_size(fi); | |
554 | initrd_addr = phys_ram_base + ((initrd_max-initrd_size) & ~4095); | |
555 | ||
556 | fprintf(stderr, "qemu: loading initrd (%#x bytes) at %#zx\n", | |
557 | initrd_size, initrd_addr-phys_ram_base); | |
558 | ||
559 | if (fread(initrd_addr, 1, initrd_size, fi) != initrd_size) { | |
560 | fprintf(stderr, "qemu: read error on initial ram disk '%s'\n", | |
561 | initrd_filename); | |
562 | exit(1); | |
563 | } | |
564 | fclose(fi); | |
565 | ||
566 | stl_p(header+0x218, initrd_addr-phys_ram_base); | |
567 | stl_p(header+0x21c, initrd_size); | |
568 | } | |
569 | ||
570 | /* store the finalized header and load the rest of the kernel */ | |
571 | memcpy(real_addr, header, 1024); | |
572 | ||
573 | setup_size = header[0x1f1]; | |
574 | if (setup_size == 0) | |
575 | setup_size = 4; | |
576 | ||
577 | setup_size = (setup_size+1)*512; | |
578 | kernel_size -= setup_size; /* Size of protected-mode code */ | |
579 | ||
580 | if (fread(real_addr+1024, 1, setup_size-1024, f) != setup_size-1024 || | |
581 | fread(prot_addr, 1, kernel_size, f) != kernel_size) { | |
582 | fprintf(stderr, "qemu: read error on kernel '%s'\n", | |
583 | kernel_filename); | |
584 | exit(1); | |
585 | } | |
586 | fclose(f); | |
587 | ||
588 | /* generate bootsector to set up the initial register state */ | |
589 | real_seg = (real_addr-phys_ram_base) >> 4; | |
590 | seg[0] = seg[2] = seg[3] = seg[4] = seg[4] = real_seg; | |
591 | seg[1] = real_seg+0x20; /* CS */ | |
592 | memset(gpr, 0, sizeof gpr); | |
593 | gpr[4] = cmdline_addr-real_addr-16; /* SP (-16 is paranoia) */ | |
594 | ||
595 | generate_bootsect(gpr, seg, 0); | |
596 | } | |
597 | ||
59b8ad81 FB |
598 | static void main_cpu_reset(void *opaque) |
599 | { | |
600 | CPUState *env = opaque; | |
601 | cpu_reset(env); | |
602 | } | |
603 | ||
b41a2cd1 FB |
604 | static const int ide_iobase[2] = { 0x1f0, 0x170 }; |
605 | static const int ide_iobase2[2] = { 0x3f6, 0x376 }; | |
606 | static const int ide_irq[2] = { 14, 15 }; | |
607 | ||
608 | #define NE2000_NB_MAX 6 | |
609 | ||
8d11df9e | 610 | static int ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, 0x280, 0x380 }; |
b41a2cd1 FB |
611 | static int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 }; |
612 | ||
8d11df9e FB |
613 | static int serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; |
614 | static int serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 }; | |
615 | ||
6508fe59 FB |
616 | static int parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc }; |
617 | static int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 }; | |
618 | ||
6a36d84e | 619 | #ifdef HAS_AUDIO |
d537cf6c | 620 | static void audio_init (PCIBus *pci_bus, qemu_irq *pic) |
6a36d84e FB |
621 | { |
622 | struct soundhw *c; | |
623 | int audio_enabled = 0; | |
624 | ||
625 | for (c = soundhw; !audio_enabled && c->name; ++c) { | |
626 | audio_enabled = c->enabled; | |
627 | } | |
628 | ||
629 | if (audio_enabled) { | |
630 | AudioState *s; | |
631 | ||
632 | s = AUD_init (); | |
633 | if (s) { | |
634 | for (c = soundhw; c->name; ++c) { | |
635 | if (c->enabled) { | |
636 | if (c->isa) { | |
d537cf6c | 637 | c->init.init_isa (s, pic); |
6a36d84e FB |
638 | } |
639 | else { | |
640 | if (pci_bus) { | |
641 | c->init.init_pci (pci_bus, s); | |
642 | } | |
643 | } | |
644 | } | |
645 | } | |
646 | } | |
647 | } | |
648 | } | |
649 | #endif | |
650 | ||
d537cf6c | 651 | static void pc_init_ne2k_isa(NICInfo *nd, qemu_irq *pic) |
a41b2ff2 PB |
652 | { |
653 | static int nb_ne2k = 0; | |
654 | ||
655 | if (nb_ne2k == NE2000_NB_MAX) | |
656 | return; | |
d537cf6c | 657 | isa_ne2000_init(ne2000_io[nb_ne2k], pic[ne2000_irq[nb_ne2k]], nd); |
a41b2ff2 PB |
658 | nb_ne2k++; |
659 | } | |
660 | ||
80cabfad | 661 | /* PC hardware initialisation */ |
b5ff2d6e FB |
662 | static void pc_init1(int ram_size, int vga_ram_size, int boot_device, |
663 | DisplayState *ds, const char **fd_filename, int snapshot, | |
664 | const char *kernel_filename, const char *kernel_cmdline, | |
3dbbdc25 FB |
665 | const char *initrd_filename, |
666 | int pci_enabled) | |
80cabfad FB |
667 | { |
668 | char buf[1024]; | |
642a4f96 | 669 | int ret, linux_boot, i; |
970ac5a3 FB |
670 | ram_addr_t ram_addr, vga_ram_addr, bios_offset, vga_bios_offset; |
671 | int bios_size, isa_bios_size, vga_bios_size; | |
46e50e9d | 672 | PCIBus *pci_bus; |
5c3ff3a7 | 673 | int piix3_devfn = -1; |
59b8ad81 | 674 | CPUState *env; |
a41b2ff2 | 675 | NICInfo *nd; |
d537cf6c PB |
676 | qemu_irq *cpu_irq; |
677 | qemu_irq *i8259; | |
d592d303 | 678 | |
80cabfad FB |
679 | linux_boot = (kernel_filename != NULL); |
680 | ||
59b8ad81 FB |
681 | /* init CPUs */ |
682 | for(i = 0; i < smp_cpus; i++) { | |
683 | env = cpu_init(); | |
684 | if (i != 0) | |
ad49ff9d | 685 | env->hflags |= HF_HALTED_MASK; |
59b8ad81 FB |
686 | if (smp_cpus > 1) { |
687 | /* XXX: enable it in all cases */ | |
688 | env->cpuid_features |= CPUID_APIC; | |
689 | } | |
a5954d5c | 690 | register_savevm("cpu", i, 4, cpu_save, cpu_load, env); |
59b8ad81 FB |
691 | qemu_register_reset(main_cpu_reset, env); |
692 | if (pci_enabled) { | |
693 | apic_init(env); | |
694 | } | |
695 | } | |
696 | ||
80cabfad | 697 | /* allocate RAM */ |
970ac5a3 FB |
698 | ram_addr = qemu_ram_alloc(ram_size); |
699 | cpu_register_physical_memory(0, ram_size, ram_addr); | |
80cabfad | 700 | |
970ac5a3 FB |
701 | /* allocate VGA RAM */ |
702 | vga_ram_addr = qemu_ram_alloc(vga_ram_size); | |
7587cf44 | 703 | |
970ac5a3 | 704 | /* BIOS load */ |
80cabfad | 705 | snprintf(buf, sizeof(buf), "%s/%s", bios_dir, BIOS_FILENAME); |
7587cf44 FB |
706 | bios_size = get_image_size(buf); |
707 | if (bios_size <= 0 || | |
970ac5a3 | 708 | (bios_size % 65536) != 0) { |
7587cf44 FB |
709 | goto bios_error; |
710 | } | |
970ac5a3 | 711 | bios_offset = qemu_ram_alloc(bios_size); |
7587cf44 FB |
712 | ret = load_image(buf, phys_ram_base + bios_offset); |
713 | if (ret != bios_size) { | |
714 | bios_error: | |
970ac5a3 | 715 | fprintf(stderr, "qemu: could not load PC BIOS '%s'\n", buf); |
80cabfad FB |
716 | exit(1); |
717 | } | |
7587cf44 | 718 | |
80cabfad | 719 | /* VGA BIOS load */ |
de9258a8 FB |
720 | if (cirrus_vga_enabled) { |
721 | snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_CIRRUS_FILENAME); | |
722 | } else { | |
723 | snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME); | |
724 | } | |
970ac5a3 FB |
725 | vga_bios_size = get_image_size(buf); |
726 | if (vga_bios_size <= 0 || vga_bios_size > 65536) | |
727 | goto vga_bios_error; | |
728 | vga_bios_offset = qemu_ram_alloc(65536); | |
729 | ||
7587cf44 | 730 | ret = load_image(buf, phys_ram_base + vga_bios_offset); |
970ac5a3 FB |
731 | if (ret != vga_bios_size) { |
732 | vga_bios_error: | |
733 | fprintf(stderr, "qemu: could not load VGA BIOS '%s'\n", buf); | |
734 | exit(1); | |
735 | } | |
736 | ||
80cabfad | 737 | /* setup basic memory access */ |
7587cf44 FB |
738 | cpu_register_physical_memory(0xc0000, 0x10000, |
739 | vga_bios_offset | IO_MEM_ROM); | |
740 | ||
741 | /* map the last 128KB of the BIOS in ISA space */ | |
742 | isa_bios_size = bios_size; | |
743 | if (isa_bios_size > (128 * 1024)) | |
744 | isa_bios_size = 128 * 1024; | |
745 | cpu_register_physical_memory(0xd0000, (192 * 1024) - isa_bios_size, | |
746 | IO_MEM_UNASSIGNED); | |
747 | cpu_register_physical_memory(0x100000 - isa_bios_size, | |
748 | isa_bios_size, | |
749 | (bios_offset + bios_size - isa_bios_size) | IO_MEM_ROM); | |
9ae02555 | 750 | |
970ac5a3 FB |
751 | { |
752 | ram_addr_t option_rom_offset; | |
753 | int size, offset; | |
754 | ||
755 | offset = 0; | |
756 | for (i = 0; i < nb_option_roms; i++) { | |
757 | size = get_image_size(option_rom[i]); | |
758 | if (size < 0) { | |
759 | fprintf(stderr, "Could not load option rom '%s'\n", | |
760 | option_rom[i]); | |
761 | exit(1); | |
762 | } | |
763 | if (size > (0x10000 - offset)) | |
764 | goto option_rom_error; | |
765 | option_rom_offset = qemu_ram_alloc(size); | |
766 | ret = load_image(option_rom[i], phys_ram_base + option_rom_offset); | |
767 | if (ret != size) { | |
768 | option_rom_error: | |
769 | fprintf(stderr, "Too many option ROMS\n"); | |
770 | exit(1); | |
771 | } | |
772 | size = (size + 4095) & ~4095; | |
773 | cpu_register_physical_memory(0xd0000 + offset, | |
774 | size, option_rom_offset | IO_MEM_ROM); | |
775 | offset += size; | |
776 | } | |
9ae02555 TS |
777 | } |
778 | ||
7587cf44 FB |
779 | /* map all the bios at the top of memory */ |
780 | cpu_register_physical_memory((uint32_t)(-bios_size), | |
781 | bios_size, bios_offset | IO_MEM_ROM); | |
80cabfad FB |
782 | |
783 | bochs_bios_init(); | |
784 | ||
642a4f96 TS |
785 | if (linux_boot) |
786 | load_linux(kernel_filename, initrd_filename, kernel_cmdline); | |
80cabfad | 787 | |
d537cf6c PB |
788 | cpu_irq = qemu_allocate_irqs(pic_irq_request, first_cpu, 1); |
789 | i8259 = i8259_init(cpu_irq[0]); | |
790 | ferr_irq = i8259[13]; | |
791 | ||
69b91039 | 792 | if (pci_enabled) { |
d537cf6c | 793 | pci_bus = i440fx_init(&i440fx_state, i8259); |
8f1c91d8 | 794 | piix3_devfn = piix3_init(pci_bus, -1); |
46e50e9d FB |
795 | } else { |
796 | pci_bus = NULL; | |
69b91039 FB |
797 | } |
798 | ||
80cabfad | 799 | /* init basic PC hardware */ |
b41a2cd1 | 800 | register_ioport_write(0x80, 1, 1, ioport80_write, NULL); |
80cabfad | 801 | |
f929aad6 FB |
802 | register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL); |
803 | ||
1f04275e FB |
804 | if (cirrus_vga_enabled) { |
805 | if (pci_enabled) { | |
46e50e9d | 806 | pci_cirrus_vga_init(pci_bus, |
970ac5a3 FB |
807 | ds, phys_ram_base + vga_ram_addr, |
808 | vga_ram_addr, vga_ram_size); | |
1f04275e | 809 | } else { |
970ac5a3 FB |
810 | isa_cirrus_vga_init(ds, phys_ram_base + vga_ram_addr, |
811 | vga_ram_addr, vga_ram_size); | |
1f04275e | 812 | } |
d34cab9f TS |
813 | } else if (vmsvga_enabled) { |
814 | if (pci_enabled) | |
815 | pci_vmsvga_init(pci_bus, ds, phys_ram_base + ram_size, | |
816 | ram_size, vga_ram_size); | |
817 | else | |
818 | fprintf(stderr, "%s: vmware_vga: no PCI bus\n", __FUNCTION__); | |
1f04275e | 819 | } else { |
89b6b508 | 820 | if (pci_enabled) { |
970ac5a3 FB |
821 | pci_vga_init(pci_bus, ds, phys_ram_base + vga_ram_addr, |
822 | vga_ram_addr, vga_ram_size, 0, 0); | |
89b6b508 | 823 | } else { |
970ac5a3 FB |
824 | isa_vga_init(ds, phys_ram_base + vga_ram_addr, |
825 | vga_ram_addr, vga_ram_size); | |
89b6b508 | 826 | } |
1f04275e | 827 | } |
80cabfad | 828 | |
d537cf6c | 829 | rtc_state = rtc_init(0x70, i8259[8]); |
80cabfad | 830 | |
e1a23744 FB |
831 | register_ioport_read(0x92, 1, 1, ioport92_read, NULL); |
832 | register_ioport_write(0x92, 1, 1, ioport92_write, NULL); | |
833 | ||
d592d303 | 834 | if (pci_enabled) { |
d592d303 FB |
835 | ioapic = ioapic_init(); |
836 | } | |
d537cf6c | 837 | pit = pit_init(0x40, i8259[0]); |
fd06c375 | 838 | pcspk_init(pit); |
d592d303 FB |
839 | if (pci_enabled) { |
840 | pic_set_alt_irq_func(isa_pic, ioapic_set_irq, ioapic); | |
841 | } | |
b41a2cd1 | 842 | |
8d11df9e FB |
843 | for(i = 0; i < MAX_SERIAL_PORTS; i++) { |
844 | if (serial_hds[i]) { | |
d537cf6c | 845 | serial_init(serial_io[i], i8259[serial_irq[i]], serial_hds[i]); |
8d11df9e FB |
846 | } |
847 | } | |
b41a2cd1 | 848 | |
6508fe59 FB |
849 | for(i = 0; i < MAX_PARALLEL_PORTS; i++) { |
850 | if (parallel_hds[i]) { | |
d537cf6c PB |
851 | parallel_init(parallel_io[i], i8259[parallel_irq[i]], |
852 | parallel_hds[i]); | |
6508fe59 FB |
853 | } |
854 | } | |
855 | ||
a41b2ff2 PB |
856 | for(i = 0; i < nb_nics; i++) { |
857 | nd = &nd_table[i]; | |
858 | if (!nd->model) { | |
859 | if (pci_enabled) { | |
860 | nd->model = "ne2k_pci"; | |
861 | } else { | |
862 | nd->model = "ne2k_isa"; | |
863 | } | |
69b91039 | 864 | } |
a41b2ff2 | 865 | if (strcmp(nd->model, "ne2k_isa") == 0) { |
d537cf6c | 866 | pc_init_ne2k_isa(nd, i8259); |
a41b2ff2 | 867 | } else if (pci_enabled) { |
c4a7060c BS |
868 | if (strcmp(nd->model, "?") == 0) |
869 | fprintf(stderr, "qemu: Supported ISA NICs: ne2k_isa\n"); | |
abcebc7e | 870 | pci_nic_init(pci_bus, nd, -1); |
c4a7060c BS |
871 | } else if (strcmp(nd->model, "?") == 0) { |
872 | fprintf(stderr, "qemu: Supported ISA NICs: ne2k_isa\n"); | |
873 | exit(1); | |
a41b2ff2 PB |
874 | } else { |
875 | fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd->model); | |
876 | exit(1); | |
69b91039 | 877 | } |
a41b2ff2 | 878 | } |
b41a2cd1 | 879 | |
a41b2ff2 | 880 | if (pci_enabled) { |
d537cf6c | 881 | pci_piix3_ide_init(pci_bus, bs_table, piix3_devfn + 1, i8259); |
a41b2ff2 | 882 | } else { |
69b91039 | 883 | for(i = 0; i < 2; i++) { |
d537cf6c | 884 | isa_ide_init(ide_iobase[i], ide_iobase2[i], i8259[ide_irq[i]], |
69b91039 FB |
885 | bs_table[2 * i], bs_table[2 * i + 1]); |
886 | } | |
b41a2cd1 | 887 | } |
69b91039 | 888 | |
d537cf6c | 889 | i8042_init(i8259[1], i8259[12], 0x60); |
7c29d0c0 | 890 | DMA_init(0); |
6a36d84e | 891 | #ifdef HAS_AUDIO |
d537cf6c | 892 | audio_init(pci_enabled ? pci_bus : NULL, i8259); |
fb065187 | 893 | #endif |
80cabfad | 894 | |
d537cf6c | 895 | floppy_controller = fdctrl_init(i8259[6], 2, 0, 0x3f0, fd_table); |
b41a2cd1 | 896 | |
ba6c2377 | 897 | cmos_init(ram_size, boot_device, bs_table); |
69b91039 | 898 | |
bb36d470 | 899 | if (pci_enabled && usb_enabled) { |
0d92ed30 | 900 | usb_uhci_init(pci_bus, piix3_devfn + 2); |
bb36d470 FB |
901 | } |
902 | ||
6515b203 | 903 | if (pci_enabled && acpi_enabled) { |
3fffc223 | 904 | uint8_t *eeprom_buf = qemu_mallocz(8 * 256); /* XXX: make this persistent */ |
0ff596d0 PB |
905 | i2c_bus *smbus; |
906 | ||
907 | /* TODO: Populate SPD eeprom data. */ | |
908 | smbus = piix4_pm_init(pci_bus, piix3_devfn + 3); | |
3fffc223 | 909 | for (i = 0; i < 8; i++) { |
0ff596d0 | 910 | smbus_eeprom_device_init(smbus, 0x50 + i, eeprom_buf + (i * 256)); |
3fffc223 | 911 | } |
6515b203 | 912 | } |
a5954d5c FB |
913 | |
914 | if (i440fx_state) { | |
915 | i440fx_init_memory_mappings(i440fx_state); | |
916 | } | |
96d30e48 TS |
917 | #if 0 |
918 | /* ??? Need to figure out some way for the user to | |
919 | specify SCSI devices. */ | |
7d8406be PB |
920 | if (pci_enabled) { |
921 | void *scsi; | |
96d30e48 TS |
922 | BlockDriverState *bdrv; |
923 | ||
924 | scsi = lsi_scsi_init(pci_bus, -1); | |
925 | bdrv = bdrv_new("scsidisk"); | |
926 | bdrv_open(bdrv, "scsi_disk.img", 0); | |
927 | lsi_scsi_attach(scsi, bdrv, -1); | |
928 | bdrv = bdrv_new("scsicd"); | |
929 | bdrv_open(bdrv, "scsi_cd.iso", 0); | |
930 | bdrv_set_type_hint(bdrv, BDRV_TYPE_CDROM); | |
931 | lsi_scsi_attach(scsi, bdrv, -1); | |
7d8406be | 932 | } |
96d30e48 | 933 | #endif |
80cabfad | 934 | } |
b5ff2d6e | 935 | |
3dbbdc25 FB |
936 | static void pc_init_pci(int ram_size, int vga_ram_size, int boot_device, |
937 | DisplayState *ds, const char **fd_filename, | |
938 | int snapshot, | |
939 | const char *kernel_filename, | |
940 | const char *kernel_cmdline, | |
94fc95cd JM |
941 | const char *initrd_filename, |
942 | const char *cpu_model) | |
3dbbdc25 FB |
943 | { |
944 | pc_init1(ram_size, vga_ram_size, boot_device, | |
945 | ds, fd_filename, snapshot, | |
946 | kernel_filename, kernel_cmdline, | |
947 | initrd_filename, 1); | |
948 | } | |
949 | ||
950 | static void pc_init_isa(int ram_size, int vga_ram_size, int boot_device, | |
951 | DisplayState *ds, const char **fd_filename, | |
952 | int snapshot, | |
953 | const char *kernel_filename, | |
954 | const char *kernel_cmdline, | |
94fc95cd JM |
955 | const char *initrd_filename, |
956 | const char *cpu_model) | |
3dbbdc25 FB |
957 | { |
958 | pc_init1(ram_size, vga_ram_size, boot_device, | |
959 | ds, fd_filename, snapshot, | |
960 | kernel_filename, kernel_cmdline, | |
961 | initrd_filename, 0); | |
962 | } | |
963 | ||
b5ff2d6e FB |
964 | QEMUMachine pc_machine = { |
965 | "pc", | |
966 | "Standard PC", | |
3dbbdc25 FB |
967 | pc_init_pci, |
968 | }; | |
969 | ||
970 | QEMUMachine isapc_machine = { | |
971 | "isapc", | |
972 | "ISA-only PC", | |
973 | pc_init_isa, | |
b5ff2d6e | 974 | }; |