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audio clean up (initial patch by malc)
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80cabfad
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1/*
2 * QEMU PC System Emulator
3 *
4 * Copyright (c) 2003-2004 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
80cabfad
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24#include "vl.h"
25
b41a2cd1
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26/* output Bochs bios info messages */
27//#define DEBUG_BIOS
28
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29#define BIOS_FILENAME "bios.bin"
30#define VGABIOS_FILENAME "vgabios.bin"
de9258a8 31#define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin"
80cabfad
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32#define LINUX_BOOT_FILENAME "linux_boot.bin"
33
34#define KERNEL_LOAD_ADDR 0x00100000
35#define INITRD_LOAD_ADDR 0x00400000
36#define KERNEL_PARAMS_ADDR 0x00090000
37#define KERNEL_CMDLINE_ADDR 0x00099000
38
39int speaker_data_on;
40int dummy_refresh_clock;
baca51fa 41static fdctrl_t *floppy_controller;
b0a21b53 42static RTCState *rtc_state;
ec844b96 43static PITState *pit;
80cabfad 44
b41a2cd1 45static void ioport80_write(void *opaque, uint32_t addr, uint32_t data)
80cabfad
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46{
47}
48
f929aad6
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49/* MSDOS compatibility mode FPU exception support */
50/* XXX: add IGNNE support */
51void cpu_set_ferr(CPUX86State *s)
52{
53 pic_set_irq(13, 1);
54}
55
56static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data)
57{
58 pic_set_irq(13, 0);
59}
60
28ab0e2e
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61/* TSC handling */
62
63uint64_t cpu_get_tsc(CPUX86State *env)
64{
65 return qemu_get_clock(vm_clock);
66}
67
b0a21b53
FB
68/* PC cmos mappings */
69
80cabfad 70#define REG_EQUIPMENT_BYTE 0x14
b0a21b53
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71#define REG_IBM_CENTURY_BYTE 0x32
72#define REG_IBM_PS2_CENTURY_BYTE 0x37
73
74
75static inline int to_bcd(RTCState *s, int a)
76{
77 return ((a / 10) << 4) | (a % 10);
78}
80cabfad 79
777428f2
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80static int cmos_get_fd_drive_type(int fd0)
81{
82 int val;
83
84 switch (fd0) {
85 case 0:
86 /* 1.44 Mb 3"5 drive */
87 val = 4;
88 break;
89 case 1:
90 /* 2.88 Mb 3"5 drive */
91 val = 5;
92 break;
93 case 2:
94 /* 1.2 Mb 5"5 drive */
95 val = 2;
96 break;
97 default:
98 val = 0;
99 break;
100 }
101 return val;
102}
103
ba6c2377
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104static void cmos_init_hd(int type_ofs, int info_ofs, BlockDriverState *hd)
105{
106 RTCState *s = rtc_state;
107 int cylinders, heads, sectors;
108 bdrv_get_geometry_hint(hd, &cylinders, &heads, &sectors);
109 rtc_set_memory(s, type_ofs, 47);
110 rtc_set_memory(s, info_ofs, cylinders);
111 rtc_set_memory(s, info_ofs + 1, cylinders >> 8);
112 rtc_set_memory(s, info_ofs + 2, heads);
113 rtc_set_memory(s, info_ofs + 3, 0xff);
114 rtc_set_memory(s, info_ofs + 4, 0xff);
115 rtc_set_memory(s, info_ofs + 5, 0xc0 | ((heads > 8) << 3));
116 rtc_set_memory(s, info_ofs + 6, cylinders);
117 rtc_set_memory(s, info_ofs + 7, cylinders >> 8);
118 rtc_set_memory(s, info_ofs + 8, sectors);
119}
120
121/* hd_table must contain 4 block drivers */
122static void cmos_init(int ram_size, int boot_device, BlockDriverState **hd_table)
80cabfad 123{
b0a21b53 124 RTCState *s = rtc_state;
80cabfad 125 int val;
b41a2cd1 126 int fd0, fd1, nb;
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127 time_t ti;
128 struct tm *tm;
ba6c2377 129 int i;
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130
131 /* set the CMOS date */
132 time(&ti);
ee22c2f7
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133 if (rtc_utc)
134 tm = gmtime(&ti);
135 else
136 tm = localtime(&ti);
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137 rtc_set_date(s, tm);
138
139 val = to_bcd(s, (tm->tm_year / 100) + 19);
140 rtc_set_memory(s, REG_IBM_CENTURY_BYTE, val);
141 rtc_set_memory(s, REG_IBM_PS2_CENTURY_BYTE, val);
80cabfad 142
b0a21b53 143 /* various important CMOS locations needed by PC/Bochs bios */
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144
145 /* memory size */
333190eb
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146 val = 640; /* base memory in K */
147 rtc_set_memory(s, 0x15, val);
148 rtc_set_memory(s, 0x16, val >> 8);
149
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150 val = (ram_size / 1024) - 1024;
151 if (val > 65535)
152 val = 65535;
b0a21b53
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153 rtc_set_memory(s, 0x17, val);
154 rtc_set_memory(s, 0x18, val >> 8);
155 rtc_set_memory(s, 0x30, val);
156 rtc_set_memory(s, 0x31, val >> 8);
80cabfad 157
9da98861
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158 if (ram_size > (16 * 1024 * 1024))
159 val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536);
160 else
161 val = 0;
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162 if (val > 65535)
163 val = 65535;
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164 rtc_set_memory(s, 0x34, val);
165 rtc_set_memory(s, 0x35, val >> 8);
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166
167 switch(boot_device) {
168 case 'a':
169 case 'b':
b0a21b53 170 rtc_set_memory(s, 0x3d, 0x01); /* floppy boot */
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171 break;
172 default:
173 case 'c':
b0a21b53 174 rtc_set_memory(s, 0x3d, 0x02); /* hard drive boot */
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175 break;
176 case 'd':
b0a21b53 177 rtc_set_memory(s, 0x3d, 0x03); /* CD-ROM boot */
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178 break;
179 }
80cabfad 180
b41a2cd1
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181 /* floppy type */
182
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183 fd0 = fdctrl_get_drive_type(floppy_controller, 0);
184 fd1 = fdctrl_get_drive_type(floppy_controller, 1);
80cabfad 185
777428f2 186 val = (cmos_get_fd_drive_type(fd0) << 4) | cmos_get_fd_drive_type(fd1);
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187 rtc_set_memory(s, 0x10, val);
188
189 val = 0;
b41a2cd1 190 nb = 0;
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191 if (fd0 < 3)
192 nb++;
193 if (fd1 < 3)
194 nb++;
195 switch (nb) {
196 case 0:
197 break;
198 case 1:
b0a21b53 199 val |= 0x01; /* 1 drive, ready for boot */
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200 break;
201 case 2:
b0a21b53 202 val |= 0x41; /* 2 drives, ready for boot */
80cabfad
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203 break;
204 }
b0a21b53
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205 val |= 0x02; /* FPU is there */
206 val |= 0x04; /* PS/2 mouse installed */
207 rtc_set_memory(s, REG_EQUIPMENT_BYTE, val);
208
ba6c2377
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209 /* hard drives */
210
211 rtc_set_memory(s, 0x12, (hd_table[0] ? 0xf0 : 0) | (hd_table[1] ? 0x0f : 0));
212 if (hd_table[0])
213 cmos_init_hd(0x19, 0x1b, hd_table[0]);
214 if (hd_table[1])
215 cmos_init_hd(0x1a, 0x24, hd_table[1]);
216
217 val = 0;
40b6ecc6 218 for (i = 0; i < 4; i++) {
ba6c2377
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219 if (hd_table[i]) {
220 int cylinders, heads, sectors;
221 uint8_t translation;
40b6ecc6
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222 /* NOTE: bdrv_get_geometry_hint() returns the geometry
223 that the hard disk returns. It is always such that: 1 <=
224 sects <= 63, 1 <= heads <= 16, 1 <= cylinders <=
225 16383. The BIOS geometry can be different. */
ba6c2377
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226 bdrv_get_geometry_hint(hd_table[i], &cylinders, &heads, &sectors);
227 if (cylinders <= 1024 && heads <= 16 && sectors <= 63) {
228 /* No translation. */
229 translation = 0;
40b6ecc6 230 } else {
ba6c2377
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231 /* LBA translation. */
232 translation = 1;
ba6c2377 233 }
ba6c2377
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234 val |= translation << (i * 2);
235 }
40b6ecc6 236 }
ba6c2377
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237 rtc_set_memory(s, 0x39, val);
238
239 /* Disable check of 0x55AA signature on the last two bytes of
240 first sector of disk. XXX: make it the default ? */
241 // rtc_set_memory(s, 0x38, 1);
80cabfad
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242}
243
b41a2cd1 244static void speaker_ioport_write(void *opaque, uint32_t addr, uint32_t val)
80cabfad
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245{
246 speaker_data_on = (val >> 1) & 1;
ec844b96 247 pit_set_gate(pit, 2, val & 1);
80cabfad
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248}
249
b41a2cd1 250static uint32_t speaker_ioport_read(void *opaque, uint32_t addr)
80cabfad
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251{
252 int out;
ec844b96 253 out = pit_get_out(pit, 2, qemu_get_clock(vm_clock));
80cabfad 254 dummy_refresh_clock ^= 1;
ec844b96 255 return (speaker_data_on << 1) | pit_get_gate(pit, 2) | (out << 5) |
80cabfad
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256 (dummy_refresh_clock << 4);
257}
258
e1a23744
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259static void ioport92_write(void *opaque, uint32_t addr, uint32_t val)
260{
261 cpu_x86_set_a20(cpu_single_env, (val >> 1) & 1);
262 /* XXX: bit 0 is fast reset */
263}
264
265static uint32_t ioport92_read(void *opaque, uint32_t addr)
266{
267 return ((cpu_single_env->a20_mask >> 20) & 1) << 1;
268}
269
80cabfad
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270/***********************************************************/
271/* Bochs BIOS debug ports */
272
b41a2cd1 273void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val)
80cabfad 274{
a2f659ee
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275 static const char shutdown_str[8] = "Shutdown";
276 static int shutdown_index = 0;
277
80cabfad
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278 switch(addr) {
279 /* Bochs BIOS messages */
280 case 0x400:
281 case 0x401:
282 fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
283 exit(1);
284 case 0x402:
285 case 0x403:
286#ifdef DEBUG_BIOS
287 fprintf(stderr, "%c", val);
288#endif
289 break;
a2f659ee
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290 case 0x8900:
291 /* same as Bochs power off */
292 if (val == shutdown_str[shutdown_index]) {
293 shutdown_index++;
294 if (shutdown_index == 8) {
295 shutdown_index = 0;
296 qemu_system_shutdown_request();
297 }
298 } else {
299 shutdown_index = 0;
300 }
301 break;
80cabfad
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302
303 /* LGPL'ed VGA BIOS messages */
304 case 0x501:
305 case 0x502:
306 fprintf(stderr, "VGA BIOS panic, line %d\n", val);
307 exit(1);
308 case 0x500:
309 case 0x503:
310#ifdef DEBUG_BIOS
311 fprintf(stderr, "%c", val);
312#endif
313 break;
314 }
315}
316
317void bochs_bios_init(void)
318{
b41a2cd1
FB
319 register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL);
320 register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL);
321 register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL);
322 register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL);
a2f659ee 323 register_ioport_write(0x8900, 1, 1, bochs_bios_write, NULL);
b41a2cd1
FB
324
325 register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL);
326 register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL);
327 register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL);
328 register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL);
80cabfad
FB
329}
330
331
332int load_kernel(const char *filename, uint8_t *addr,
333 uint8_t *real_addr)
334{
335 int fd, size;
336 int setup_sects;
337
096b7ea4 338 fd = open(filename, O_RDONLY | O_BINARY);
80cabfad
FB
339 if (fd < 0)
340 return -1;
341
342 /* load 16 bit code */
343 if (read(fd, real_addr, 512) != 512)
344 goto fail;
345 setup_sects = real_addr[0x1F1];
346 if (!setup_sects)
347 setup_sects = 4;
348 if (read(fd, real_addr + 512, setup_sects * 512) !=
349 setup_sects * 512)
350 goto fail;
351
352 /* load 32 bit code */
353 size = read(fd, addr, 16 * 1024 * 1024);
354 if (size < 0)
355 goto fail;
356 close(fd);
357 return size;
358 fail:
359 close(fd);
360 return -1;
361}
362
b41a2cd1
FB
363static const int ide_iobase[2] = { 0x1f0, 0x170 };
364static const int ide_iobase2[2] = { 0x3f6, 0x376 };
365static const int ide_irq[2] = { 14, 15 };
366
367#define NE2000_NB_MAX 6
368
8d11df9e 369static int ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, 0x280, 0x380 };
b41a2cd1
FB
370static int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 };
371
8d11df9e
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372static int serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
373static int serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 };
374
80cabfad
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375/* PC hardware initialisation */
376void pc_init(int ram_size, int vga_ram_size, int boot_device,
377 DisplayState *ds, const char **fd_filename, int snapshot,
378 const char *kernel_filename, const char *kernel_cmdline,
379 const char *initrd_filename)
380{
381 char buf[1024];
82c643ff 382 int ret, linux_boot, initrd_size, i, nb_nics1;
7587cf44
FB
383 unsigned long bios_offset, vga_bios_offset;
384 int bios_size, isa_bios_size;
46e50e9d
FB
385 PCIBus *pci_bus;
386
80cabfad
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387 linux_boot = (kernel_filename != NULL);
388
389 /* allocate RAM */
390 cpu_register_physical_memory(0, ram_size, 0);
391
392 /* BIOS load */
7587cf44
FB
393 bios_offset = ram_size + vga_ram_size;
394 vga_bios_offset = bios_offset + 256 * 1024;
395
80cabfad 396 snprintf(buf, sizeof(buf), "%s/%s", bios_dir, BIOS_FILENAME);
7587cf44
FB
397 bios_size = get_image_size(buf);
398 if (bios_size <= 0 ||
399 (bios_size % 65536) != 0 ||
400 bios_size > (256 * 1024)) {
401 goto bios_error;
402 }
403 ret = load_image(buf, phys_ram_base + bios_offset);
404 if (ret != bios_size) {
405 bios_error:
80cabfad
FB
406 fprintf(stderr, "qemu: could not load PC bios '%s'\n", buf);
407 exit(1);
408 }
7587cf44 409
80cabfad 410 /* VGA BIOS load */
de9258a8
FB
411 if (cirrus_vga_enabled) {
412 snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_CIRRUS_FILENAME);
413 } else {
414 snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
415 }
7587cf44 416 ret = load_image(buf, phys_ram_base + vga_bios_offset);
80cabfad
FB
417
418 /* setup basic memory access */
7587cf44
FB
419 cpu_register_physical_memory(0xc0000, 0x10000,
420 vga_bios_offset | IO_MEM_ROM);
421
422 /* map the last 128KB of the BIOS in ISA space */
423 isa_bios_size = bios_size;
424 if (isa_bios_size > (128 * 1024))
425 isa_bios_size = 128 * 1024;
426 cpu_register_physical_memory(0xd0000, (192 * 1024) - isa_bios_size,
427 IO_MEM_UNASSIGNED);
428 cpu_register_physical_memory(0x100000 - isa_bios_size,
429 isa_bios_size,
430 (bios_offset + bios_size - isa_bios_size) | IO_MEM_ROM);
431 /* map all the bios at the top of memory */
432 cpu_register_physical_memory((uint32_t)(-bios_size),
433 bios_size, bios_offset | IO_MEM_ROM);
80cabfad
FB
434
435 bochs_bios_init();
436
437 if (linux_boot) {
438 uint8_t bootsect[512];
41b9be47 439 uint8_t old_bootsect[512];
80cabfad
FB
440
441 if (bs_table[0] == NULL) {
442 fprintf(stderr, "A disk image must be given for 'hda' when booting a Linux kernel\n");
443 exit(1);
444 }
445 snprintf(buf, sizeof(buf), "%s/%s", bios_dir, LINUX_BOOT_FILENAME);
446 ret = load_image(buf, bootsect);
447 if (ret != sizeof(bootsect)) {
448 fprintf(stderr, "qemu: could not load linux boot sector '%s'\n",
449 buf);
450 exit(1);
451 }
452
41b9be47
FB
453 if (bdrv_read(bs_table[0], 0, old_bootsect, 1) >= 0) {
454 /* copy the MSDOS partition table */
455 memcpy(bootsect + 0x1be, old_bootsect + 0x1be, 0x40);
456 }
457
80cabfad
FB
458 bdrv_set_boot_sector(bs_table[0], bootsect, sizeof(bootsect));
459
460 /* now we can load the kernel */
461 ret = load_kernel(kernel_filename,
462 phys_ram_base + KERNEL_LOAD_ADDR,
463 phys_ram_base + KERNEL_PARAMS_ADDR);
464 if (ret < 0) {
465 fprintf(stderr, "qemu: could not load kernel '%s'\n",
466 kernel_filename);
467 exit(1);
468 }
469
470 /* load initrd */
471 initrd_size = 0;
472 if (initrd_filename) {
473 initrd_size = load_image(initrd_filename, phys_ram_base + INITRD_LOAD_ADDR);
474 if (initrd_size < 0) {
475 fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
476 initrd_filename);
477 exit(1);
478 }
479 }
480 if (initrd_size > 0) {
481 stl_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x218, INITRD_LOAD_ADDR);
482 stl_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x21c, initrd_size);
483 }
484 pstrcpy(phys_ram_base + KERNEL_CMDLINE_ADDR, 4096,
485 kernel_cmdline);
486 stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x20, 0xA33F);
487 stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x22,
488 KERNEL_CMDLINE_ADDR - KERNEL_PARAMS_ADDR);
489 /* loader type */
490 stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x210, 0x01);
491 }
492
69b91039 493 if (pci_enabled) {
46e50e9d
FB
494 pci_bus = i440fx_init();
495 piix3_init(pci_bus);
496 } else {
497 pci_bus = NULL;
69b91039
FB
498 }
499
80cabfad 500 /* init basic PC hardware */
b41a2cd1 501 register_ioport_write(0x80, 1, 1, ioport80_write, NULL);
80cabfad 502
f929aad6
FB
503 register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL);
504
1f04275e
FB
505 if (cirrus_vga_enabled) {
506 if (pci_enabled) {
46e50e9d
FB
507 pci_cirrus_vga_init(pci_bus,
508 ds, phys_ram_base + ram_size, ram_size,
1f04275e
FB
509 vga_ram_size);
510 } else {
511 isa_cirrus_vga_init(ds, phys_ram_base + ram_size, ram_size,
512 vga_ram_size);
513 }
514 } else {
46e50e9d
FB
515 vga_initialize(pci_bus, ds, phys_ram_base + ram_size, ram_size,
516 vga_ram_size);
1f04275e 517 }
80cabfad 518
b0a21b53 519 rtc_state = rtc_init(0x70, 8);
b41a2cd1
FB
520 register_ioport_read(0x61, 1, 1, speaker_ioport_read, NULL);
521 register_ioport_write(0x61, 1, 1, speaker_ioport_write, NULL);
80cabfad 522
e1a23744
FB
523 register_ioport_read(0x92, 1, 1, ioport92_read, NULL);
524 register_ioport_write(0x92, 1, 1, ioport92_write, NULL);
525
80cabfad 526 pic_init();
ec844b96 527 pit = pit_init(0x40, 0);
b41a2cd1 528
8d11df9e
FB
529 for(i = 0; i < MAX_SERIAL_PORTS; i++) {
530 if (serial_hds[i]) {
531 serial_init(serial_io[i], serial_irq[i], serial_hds[i]);
532 }
533 }
b41a2cd1 534
69b91039
FB
535 if (pci_enabled) {
536 for(i = 0; i < nb_nics; i++) {
46e50e9d 537 pci_ne2000_init(pci_bus, &nd_table[i]);
69b91039 538 }
46e50e9d 539 pci_piix3_ide_init(pci_bus, bs_table);
69b91039
FB
540 } else {
541 nb_nics1 = nb_nics;
542 if (nb_nics1 > NE2000_NB_MAX)
543 nb_nics1 = NE2000_NB_MAX;
544 for(i = 0; i < nb_nics1; i++) {
545 isa_ne2000_init(ne2000_io[i], ne2000_irq[i], &nd_table[i]);
546 }
b41a2cd1 547
69b91039
FB
548 for(i = 0; i < 2; i++) {
549 isa_ide_init(ide_iobase[i], ide_iobase2[i], ide_irq[i],
550 bs_table[2 * i], bs_table[2 * i + 1]);
551 }
b41a2cd1 552 }
69b91039 553
80cabfad 554 kbd_init();
7c29d0c0 555 DMA_init(0);
67b915a5 556
aaaa7df6 557 if (audio_enabled) {
aaaa7df6 558 AUD_init();
fb065187
FB
559#ifdef USE_SB16
560 if (sb16_enabled)
561 SB16_init ();
562#endif
563#ifdef CONFIG_ADLIB
564 if (adlib_enabled)
565 Adlib_init ();
566#endif
567#ifdef USE_GUS
568 if (gus_enabled)
569 GUS_init ();
570#endif
aaaa7df6 571 }
80cabfad 572
baca51fa 573 floppy_controller = fdctrl_init(6, 2, 0, 0x3f0, fd_table);
b41a2cd1 574
ba6c2377 575 cmos_init(ram_size, boot_device, bs_table);
69b91039
FB
576
577 /* must be done after all PCI devices are instanciated */
578 /* XXX: should be done in the Bochs BIOS */
579 if (pci_enabled) {
580 pci_bios_init();
581 }
80cabfad 582}