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tcg-sparc: Use TCG_TARGET_REG_BITS in conditional compilation.
[qemu.git] / hw / pc.h
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1#ifndef HW_PC_H
2#define HW_PC_H
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3
4#include "qemu-common.h"
5
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6/* PC-style peripherals (also used by other machines). */
7
8/* serial.c */
9
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10SerialState *serial_init(int base, qemu_irq irq, int baudbase,
11 CharDriverState *chr);
c227f099 12SerialState *serial_mm_init (target_phys_addr_t base, int it_shift,
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13 qemu_irq irq, int baudbase,
14 CharDriverState *chr, int ioregister);
ac0be998 15SerialState *serial_isa_init(int index, CharDriverState *chr);
038eaf82 16void serial_set_frequency(SerialState *s, uint32_t frequency);
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17
18/* parallel.c */
19
20typedef struct ParallelState ParallelState;
021f0674 21ParallelState *parallel_init(int index, CharDriverState *chr);
c227f099 22ParallelState *parallel_mm_init(target_phys_addr_t base, int it_shift, qemu_irq irq, CharDriverState *chr);
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23
24/* i8259.c */
25
26typedef struct PicState2 PicState2;
27extern PicState2 *isa_pic;
28void pic_set_irq(int irq, int level);
29void pic_set_irq_new(void *opaque, int irq, int level);
30qemu_irq *i8259_init(qemu_irq parent_irq);
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31int pic_read_irq(PicState2 *s);
32void pic_update_irq(PicState2 *s);
33uint32_t pic_intack_read(PicState2 *s);
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34void pic_info(Monitor *mon);
35void irq_info(Monitor *mon);
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36
37/* APIC */
38typedef struct IOAPICState IOAPICState;
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39void apic_deliver_irq(uint8_t dest, uint8_t dest_mode,
40 uint8_t delivery_mode,
41 uint8_t vector_num, uint8_t polarity,
42 uint8_t trigger_mode);
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43int apic_init(CPUState *env);
44int apic_accept_pic_intr(CPUState *env);
1a7de94a 45void apic_deliver_pic_intr(CPUState *env, int level);
87ecb68b 46int apic_get_interrupt(CPUState *env);
1632dc6a 47qemu_irq *ioapic_init(void);
87ecb68b 48void ioapic_set_irq(void *opaque, int vector, int level);
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49void apic_reset_irq_delivered(void);
50int apic_get_irq_delivered(void);
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51
52/* i8254.c */
53
54#define PIT_FREQ 1193182
55
56typedef struct PITState PITState;
57
58PITState *pit_init(int base, qemu_irq irq);
59void pit_set_gate(PITState *pit, int channel, int val);
60int pit_get_gate(PITState *pit, int channel);
61int pit_get_initial_count(PITState *pit, int channel);
62int pit_get_mode(PITState *pit, int channel);
63int pit_get_out(PITState *pit, int channel, int64_t current_time);
64
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65void hpet_pit_disable(void);
66void hpet_pit_enable(void);
67
87ecb68b 68/* vmport.c */
26fb5e48 69void vmport_init(void);
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70void vmport_register(unsigned char command, IOPortReadFunc *func, void *opaque);
71
72/* vmmouse.c */
73void *vmmouse_init(void *m);
74
75/* pckbd.c */
76
77void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base);
78void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
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79 target_phys_addr_t base, ram_addr_t size,
80 target_phys_addr_t mask);
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81
82/* mc146818rtc.c */
83
84typedef struct RTCState RTCState;
85
32e0c826 86RTCState *rtc_init(int base_year);
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87void rtc_set_memory(RTCState *s, int addr, int val);
88void rtc_set_date(RTCState *s, const struct tm *tm);
0bacd130 89void cmos_set_s3_resume(void);
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90
91/* pc.c */
92extern int fd_bootchk;
93
94void ioport_set_a20(int enable);
95int ioport_get_a20(void);
96
97/* acpi.c */
98extern int acpi_enabled;
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99extern char *acpi_tables;
100extern size_t acpi_tables_len;
101
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102void acpi_bios_init(void);
103int acpi_table_add(const char *table_desc);
104
105/* acpi_piix.c */
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106i2c_bus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
107 qemu_irq sci_irq);
87ecb68b 108void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr);
3f84865a 109void piix4_acpi_system_hot_add_init(PCIBus *bus);
87ecb68b 110
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111/* hpet.c */
112extern int no_hpet;
113
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114/* pcspk.c */
115void pcspk_init(PITState *);
22d83b14 116int pcspk_audio_init(qemu_irq *pic);
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117
118/* piix_pci.c */
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119struct PCII440FXState;
120typedef struct PCII440FXState PCII440FXState;
121
85a750ca 122PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix_devfn, qemu_irq *pic);
0a3bacf3 123void i440fx_set_smm(PCII440FXState *d, int val);
0a3bacf3 124void i440fx_init_memory_mappings(PCII440FXState *d);
87ecb68b 125
823e675a 126/* piix4.c */
b1d8e52e 127extern PCIDevice *piix4_dev;
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128int piix4_init(PCIBus *bus, int devfn);
129
130/* vga.c */
cb5a7aa8 131enum vga_retrace_method {
132 VGA_RETRACE_DUMB,
133 VGA_RETRACE_PRECISE
134};
135
136extern enum vga_retrace_method vga_retrace_method;
87ecb68b 137
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138int isa_vga_init(void);
139int pci_vga_init(PCIBus *bus,
87ecb68b 140 unsigned long vga_bios_offset, int vga_bios_size);
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141int isa_vga_mm_init(target_phys_addr_t vram_base,
142 target_phys_addr_t ctrl_base, int it_shift);
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143
144/* cirrus_vga.c */
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145void pci_cirrus_vga_init(PCIBus *bus);
146void isa_cirrus_vga_init(void);
87ecb68b 147
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148/* ne2000.c */
149
9453c5bc 150void isa_ne2000_init(int base, int irq, NICInfo *nd);
87ecb68b 151
678e12cc 152int cpu_is_bsp(CPUState *env);
87ecb68b 153#endif