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Commit | Line | Data |
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87ecb68b PB |
1 | #ifndef HW_PC_H |
2 | #define HW_PC_H | |
376253ec AL |
3 | |
4 | #include "qemu-common.h" | |
00cb2a99 | 5 | #include "memory.h" |
35bed8ee | 6 | #include "ioport.h" |
845773ab IY |
7 | #include "isa.h" |
8 | #include "fdc.h" | |
cd1b8a8b | 9 | #include "net.h" |
4aa63af1 | 10 | #include "memory.h" |
376253ec | 11 | |
87ecb68b PB |
12 | /* PC-style peripherals (also used by other machines). */ |
13 | ||
14 | /* serial.c */ | |
15 | ||
b6cd0ea1 AJ |
16 | SerialState *serial_init(int base, qemu_irq irq, int baudbase, |
17 | CharDriverState *chr); | |
c227f099 | 18 | SerialState *serial_mm_init (target_phys_addr_t base, int it_shift, |
b6cd0ea1 | 19 | qemu_irq irq, int baudbase, |
2d48377a BS |
20 | CharDriverState *chr, int ioregister, |
21 | int be); | |
e22cf21e BS |
22 | static inline bool serial_isa_init(int index, CharDriverState *chr) |
23 | { | |
24 | ISADevice *dev; | |
25 | ||
9b13ef9f BS |
26 | dev = isa_try_create("isa-serial"); |
27 | if (!dev) { | |
28 | return false; | |
29 | } | |
e22cf21e BS |
30 | qdev_prop_set_uint32(&dev->qdev, "index", index); |
31 | qdev_prop_set_chr(&dev->qdev, "chardev", chr); | |
32 | if (qdev_init(&dev->qdev) < 0) { | |
33 | return false; | |
34 | } | |
35 | return true; | |
36 | } | |
37 | ||
038eaf82 | 38 | void serial_set_frequency(SerialState *s, uint32_t frequency); |
87ecb68b PB |
39 | |
40 | /* parallel.c */ | |
defdb20e BS |
41 | static inline bool parallel_init(int index, CharDriverState *chr) |
42 | { | |
43 | ISADevice *dev; | |
44 | ||
73531538 BS |
45 | dev = isa_try_create("isa-parallel"); |
46 | if (!dev) { | |
47 | return false; | |
48 | } | |
defdb20e BS |
49 | qdev_prop_set_uint32(&dev->qdev, "index", index); |
50 | qdev_prop_set_chr(&dev->qdev, "chardev", chr); | |
51 | if (qdev_init(&dev->qdev) < 0) { | |
52 | return false; | |
53 | } | |
54 | return true; | |
55 | } | |
56 | ||
57 | bool parallel_mm_init(target_phys_addr_t base, int it_shift, qemu_irq irq, | |
58 | CharDriverState *chr); | |
87ecb68b PB |
59 | |
60 | /* i8259.c */ | |
61 | ||
62 | typedef struct PicState2 PicState2; | |
63 | extern PicState2 *isa_pic; | |
64 | void pic_set_irq(int irq, int level); | |
65 | void pic_set_irq_new(void *opaque, int irq, int level); | |
66 | qemu_irq *i8259_init(qemu_irq parent_irq); | |
87ecb68b PB |
67 | int pic_read_irq(PicState2 *s); |
68 | void pic_update_irq(PicState2 *s); | |
69 | uint32_t pic_intack_read(PicState2 *s); | |
376253ec AL |
70 | void pic_info(Monitor *mon); |
71 | void irq_info(Monitor *mon); | |
87ecb68b | 72 | |
845773ab | 73 | /* ISA */ |
96051119 BS |
74 | #define IOAPIC_NUM_PINS 0x18 |
75 | ||
845773ab IY |
76 | typedef struct isa_irq_state { |
77 | qemu_irq *i8259; | |
96051119 | 78 | qemu_irq ioapic[IOAPIC_NUM_PINS]; |
845773ab IY |
79 | } IsaIrqState; |
80 | ||
81 | void isa_irq_handler(void *opaque, int n, int level); | |
82 | ||
87ecb68b PB |
83 | /* i8254.c */ |
84 | ||
85 | #define PIT_FREQ 1193182 | |
86 | ||
64d7e9a4 BS |
87 | static inline ISADevice *pit_init(int base, int irq) |
88 | { | |
89 | ISADevice *dev; | |
90 | ||
91 | dev = isa_create("isa-pit"); | |
92 | qdev_prop_set_uint32(&dev->qdev, "iobase", base); | |
93 | qdev_prop_set_uint32(&dev->qdev, "irq", irq); | |
94 | qdev_init_nofail(&dev->qdev); | |
95 | ||
96 | return dev; | |
97 | } | |
87ecb68b | 98 | |
64d7e9a4 BS |
99 | void pit_set_gate(ISADevice *dev, int channel, int val); |
100 | int pit_get_gate(ISADevice *dev, int channel); | |
101 | int pit_get_initial_count(ISADevice *dev, int channel); | |
102 | int pit_get_mode(ISADevice *dev, int channel); | |
103 | int pit_get_out(ISADevice *dev, int channel, int64_t current_time); | |
87ecb68b | 104 | |
bf4f74c0 AJ |
105 | void hpet_pit_disable(void); |
106 | void hpet_pit_enable(void); | |
107 | ||
87ecb68b | 108 | /* vmport.c */ |
6872ef61 BS |
109 | static inline void vmport_init(void) |
110 | { | |
111 | isa_create_simple("vmport"); | |
112 | } | |
87ecb68b | 113 | void vmport_register(unsigned char command, IOPortReadFunc *func, void *opaque); |
86d86414 BS |
114 | void vmmouse_get_data(uint32_t *data); |
115 | void vmmouse_set_data(const uint32_t *data); | |
87ecb68b | 116 | |
87ecb68b PB |
117 | /* pckbd.c */ |
118 | ||
119 | void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base); | |
120 | void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq, | |
c227f099 AL |
121 | target_phys_addr_t base, ram_addr_t size, |
122 | target_phys_addr_t mask); | |
956a3e6b BS |
123 | void i8042_isa_mouse_fake_event(void *opaque); |
124 | void i8042_setup_a20_line(ISADevice *dev, qemu_irq *a20_out); | |
87ecb68b | 125 | |
87ecb68b PB |
126 | /* pc.c */ |
127 | extern int fd_bootchk; | |
128 | ||
8e78eb28 | 129 | void pc_register_ferr_irq(qemu_irq irq); |
845773ab IY |
130 | void pc_cmos_set_s3_resume(void *opaque, int irq, int level); |
131 | void pc_acpi_smi_interrupt(void *opaque, int irq, int level); | |
132 | ||
133 | void pc_cpus_init(const char *cpu_model); | |
4aa63af1 AK |
134 | void pc_memory_init(MemoryRegion *system_memory, |
135 | const char *kernel_filename, | |
845773ab IY |
136 | const char *kernel_cmdline, |
137 | const char *initrd_filename, | |
e0e7e67b AP |
138 | ram_addr_t below_4g_mem_size, |
139 | ram_addr_t above_4g_mem_size); | |
845773ab IY |
140 | qemu_irq *pc_allocate_cpu_irq(void); |
141 | void pc_vga_init(PCIBus *pci_bus); | |
142 | void pc_basic_device_init(qemu_irq *isa_irq, | |
1611977c AP |
143 | ISADevice **rtc_state, |
144 | bool no_vmport); | |
845773ab | 145 | void pc_init_ne2k_isa(NICInfo *nd); |
845773ab | 146 | void pc_cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size, |
c0897e0c MA |
147 | const char *boot_device, |
148 | BusState *ide0, BusState *ide1, | |
63ffb564 | 149 | ISADevice *s); |
845773ab | 150 | void pc_pci_device_init(PCIBus *pci_bus); |
8e78eb28 | 151 | |
f885f1ea IY |
152 | typedef void (*cpu_set_smm_t)(int smm, void *arg); |
153 | void cpu_smm_register(cpu_set_smm_t callback, void *arg); | |
154 | ||
87ecb68b PB |
155 | /* acpi.c */ |
156 | extern int acpi_enabled; | |
80deece2 BS |
157 | extern char *acpi_tables; |
158 | extern size_t acpi_tables_len; | |
159 | ||
9d5e77a2 IY |
160 | void acpi_bios_init(void); |
161 | int acpi_table_add(const char *table_desc); | |
162 | ||
163 | /* acpi_piix.c */ | |
53b67b30 | 164 | |
cf7a2fe2 | 165 | i2c_bus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base, |
53b67b30 BS |
166 | qemu_irq sci_irq, qemu_irq cmos_s3, qemu_irq smi_irq, |
167 | int kvm_enabled); | |
87ecb68b | 168 | void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr); |
87ecb68b | 169 | |
16b29ae1 AL |
170 | /* hpet.c */ |
171 | extern int no_hpet; | |
172 | ||
87ecb68b | 173 | /* pcspk.c */ |
64d7e9a4 | 174 | void pcspk_init(ISADevice *pit); |
22d83b14 | 175 | int pcspk_audio_init(qemu_irq *pic); |
87ecb68b PB |
176 | |
177 | /* piix_pci.c */ | |
0a3bacf3 JQ |
178 | struct PCII440FXState; |
179 | typedef struct PCII440FXState PCII440FXState; | |
180 | ||
1e39101c AK |
181 | PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix_devfn, |
182 | qemu_irq *pic, MemoryRegion *address_space, | |
183 | ram_addr_t ram_size); | |
0a3bacf3 | 184 | void i440fx_init_memory_mappings(PCII440FXState *d); |
87ecb68b | 185 | |
823e675a | 186 | /* piix4.c */ |
b1d8e52e | 187 | extern PCIDevice *piix4_dev; |
87ecb68b PB |
188 | int piix4_init(PCIBus *bus, int devfn); |
189 | ||
190 | /* vga.c */ | |
cb5a7aa8 | 191 | enum vga_retrace_method { |
192 | VGA_RETRACE_DUMB, | |
193 | VGA_RETRACE_PRECISE | |
194 | }; | |
195 | ||
196 | extern enum vga_retrace_method vga_retrace_method; | |
87ecb68b | 197 | |
7435b791 BS |
198 | static inline int isa_vga_init(void) |
199 | { | |
c74b88df | 200 | ISADevice *dev; |
7435b791 | 201 | |
c74b88df BS |
202 | dev = isa_try_create("isa-vga"); |
203 | if (!dev) { | |
204 | fprintf(stderr, "Warning: isa-vga not available\n"); | |
205 | return 0; | |
206 | } | |
207 | qdev_init_nofail(&dev->qdev); | |
208 | return 1; | |
7435b791 BS |
209 | } |
210 | ||
78895427 | 211 | int pci_vga_init(PCIBus *bus); |
c227f099 AL |
212 | int isa_vga_mm_init(target_phys_addr_t vram_base, |
213 | target_phys_addr_t ctrl_base, int it_shift); | |
87ecb68b PB |
214 | |
215 | /* cirrus_vga.c */ | |
fbe1b595 PB |
216 | void pci_cirrus_vga_init(PCIBus *bus); |
217 | void isa_cirrus_vga_init(void); | |
87ecb68b | 218 | |
87ecb68b | 219 | /* ne2000.c */ |
cd1b8a8b | 220 | static inline bool isa_ne2000_init(int base, int irq, NICInfo *nd) |
60a14ad3 BS |
221 | { |
222 | ISADevice *dev; | |
87ecb68b | 223 | |
60a14ad3 BS |
224 | qemu_check_nic_model(nd, "ne2k_isa"); |
225 | ||
cd1b8a8b BS |
226 | dev = isa_try_create("ne2k_isa"); |
227 | if (!dev) { | |
228 | return false; | |
229 | } | |
60a14ad3 BS |
230 | qdev_prop_set_uint32(&dev->qdev, "iobase", base); |
231 | qdev_prop_set_uint32(&dev->qdev, "irq", irq); | |
232 | qdev_set_nic_properties(&dev->qdev, nd); | |
233 | qdev_init_nofail(&dev->qdev); | |
cd1b8a8b | 234 | return true; |
60a14ad3 | 235 | } |
87ecb68b | 236 | |
4c5b10b7 JS |
237 | /* e820 types */ |
238 | #define E820_RAM 1 | |
239 | #define E820_RESERVED 2 | |
240 | #define E820_ACPI 3 | |
241 | #define E820_NVS 4 | |
242 | #define E820_UNUSABLE 5 | |
243 | ||
244 | int e820_add_entry(uint64_t, uint64_t, uint32_t); | |
245 | ||
87ecb68b | 246 | #endif |