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parallel: convert to memory API
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1#ifndef HW_PC_H
2#define HW_PC_H
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3
4#include "qemu-common.h"
00cb2a99 5#include "memory.h"
35bed8ee 6#include "ioport.h"
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7#include "isa.h"
8#include "fdc.h"
cd1b8a8b 9#include "net.h"
4aa63af1 10#include "memory.h"
b881fbe9 11#include "ioapic.h"
376253ec 12
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13/* PC-style peripherals (also used by other machines). */
14
15/* serial.c */
16
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17SerialState *serial_init(int base, qemu_irq irq, int baudbase,
18 CharDriverState *chr);
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19SerialState *serial_mm_init(MemoryRegion *address_space,
20 target_phys_addr_t base, int it_shift,
21 qemu_irq irq, int baudbase,
22 CharDriverState *chr, enum device_endian);
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23static inline bool serial_isa_init(int index, CharDriverState *chr)
24{
25 ISADevice *dev;
26
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27 dev = isa_try_create("isa-serial");
28 if (!dev) {
29 return false;
30 }
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31 qdev_prop_set_uint32(&dev->qdev, "index", index);
32 qdev_prop_set_chr(&dev->qdev, "chardev", chr);
33 if (qdev_init(&dev->qdev) < 0) {
34 return false;
35 }
36 return true;
37}
38
038eaf82 39void serial_set_frequency(SerialState *s, uint32_t frequency);
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40
41/* parallel.c */
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42static inline bool parallel_init(int index, CharDriverState *chr)
43{
44 ISADevice *dev;
45
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46 dev = isa_try_create("isa-parallel");
47 if (!dev) {
48 return false;
49 }
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50 qdev_prop_set_uint32(&dev->qdev, "index", index);
51 qdev_prop_set_chr(&dev->qdev, "chardev", chr);
52 if (qdev_init(&dev->qdev) < 0) {
53 return false;
54 }
55 return true;
56}
57
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58bool parallel_mm_init(MemoryRegion *address_space,
59 target_phys_addr_t base, int it_shift, qemu_irq irq,
defdb20e 60 CharDriverState *chr);
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61
62/* i8259.c */
63
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64typedef struct PicState PicState;
65extern PicState *isa_pic;
87ecb68b 66qemu_irq *i8259_init(qemu_irq parent_irq);
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67int pic_read_irq(PicState *s);
68int pic_get_output(PicState *s);
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69void pic_info(Monitor *mon);
70void irq_info(Monitor *mon);
87ecb68b 71
b881fbe9 72/* Global System Interrupts */
96051119 73
b881fbe9 74#define GSI_NUM_PINS IOAPIC_NUM_PINS
845773ab 75
b881fbe9 76typedef struct GSIState {
43a0db35 77 qemu_irq i8259_irq[ISA_NUM_IRQS];
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78 qemu_irq ioapic_irq[IOAPIC_NUM_PINS];
79} GSIState;
80
81void gsi_handler(void *opaque, int n, int level);
845773ab 82
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83/* i8254.c */
84
85#define PIT_FREQ 1193182
86
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87static inline ISADevice *pit_init(int base, int irq)
88{
89 ISADevice *dev;
90
91 dev = isa_create("isa-pit");
92 qdev_prop_set_uint32(&dev->qdev, "iobase", base);
93 qdev_prop_set_uint32(&dev->qdev, "irq", irq);
94 qdev_init_nofail(&dev->qdev);
95
96 return dev;
97}
87ecb68b 98
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99void pit_set_gate(ISADevice *dev, int channel, int val);
100int pit_get_gate(ISADevice *dev, int channel);
101int pit_get_initial_count(ISADevice *dev, int channel);
102int pit_get_mode(ISADevice *dev, int channel);
103int pit_get_out(ISADevice *dev, int channel, int64_t current_time);
87ecb68b 104
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105void hpet_pit_disable(void);
106void hpet_pit_enable(void);
107
87ecb68b 108/* vmport.c */
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109static inline void vmport_init(void)
110{
111 isa_create_simple("vmport");
112}
87ecb68b 113void vmport_register(unsigned char command, IOPortReadFunc *func, void *opaque);
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114void vmmouse_get_data(uint32_t *data);
115void vmmouse_set_data(const uint32_t *data);
87ecb68b 116
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117/* pckbd.c */
118
119void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base);
120void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
dbff76ac 121 MemoryRegion *region, ram_addr_t size,
c227f099 122 target_phys_addr_t mask);
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123void i8042_isa_mouse_fake_event(void *opaque);
124void i8042_setup_a20_line(ISADevice *dev, qemu_irq *a20_out);
87ecb68b 125
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126/* pc.c */
127extern int fd_bootchk;
128
8e78eb28 129void pc_register_ferr_irq(qemu_irq irq);
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130void pc_cmos_set_s3_resume(void *opaque, int irq, int level);
131void pc_acpi_smi_interrupt(void *opaque, int irq, int level);
132
133void pc_cpus_init(const char *cpu_model);
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134void pc_memory_init(MemoryRegion *system_memory,
135 const char *kernel_filename,
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136 const char *kernel_cmdline,
137 const char *initrd_filename,
e0e7e67b 138 ram_addr_t below_4g_mem_size,
ae0a5466 139 ram_addr_t above_4g_mem_size,
4463aee6 140 MemoryRegion *rom_memory,
ae0a5466 141 MemoryRegion **ram_memory);
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142qemu_irq *pc_allocate_cpu_irq(void);
143void pc_vga_init(PCIBus *pci_bus);
b881fbe9 144void pc_basic_device_init(qemu_irq *gsi,
1611977c 145 ISADevice **rtc_state,
34d4260e 146 ISADevice **floppy,
1611977c 147 bool no_vmport);
845773ab 148void pc_init_ne2k_isa(NICInfo *nd);
845773ab 149void pc_cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
c0897e0c 150 const char *boot_device,
34d4260e 151 ISADevice *floppy, BusState *ide0, BusState *ide1,
63ffb564 152 ISADevice *s);
845773ab 153void pc_pci_device_init(PCIBus *pci_bus);
8e78eb28 154
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155typedef void (*cpu_set_smm_t)(int smm, void *arg);
156void cpu_smm_register(cpu_set_smm_t callback, void *arg);
157
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158/* acpi.c */
159extern int acpi_enabled;
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160extern char *acpi_tables;
161extern size_t acpi_tables_len;
162
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163void acpi_bios_init(void);
164int acpi_table_add(const char *table_desc);
165
166/* acpi_piix.c */
53b67b30 167
cf7a2fe2 168i2c_bus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
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169 qemu_irq sci_irq, qemu_irq cmos_s3, qemu_irq smi_irq,
170 int kvm_enabled);
87ecb68b 171void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr);
87ecb68b 172
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173/* hpet.c */
174extern int no_hpet;
175
87ecb68b 176/* pcspk.c */
64d7e9a4 177void pcspk_init(ISADevice *pit);
22d83b14 178int pcspk_audio_init(qemu_irq *pic);
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179
180/* piix_pci.c */
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181struct PCII440FXState;
182typedef struct PCII440FXState PCII440FXState;
183
1e39101c 184PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix_devfn,
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185 qemu_irq *pic,
186 MemoryRegion *address_space_mem,
187 MemoryRegion *address_space_io,
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188 ram_addr_t ram_size,
189 target_phys_addr_t pci_hole_start,
190 target_phys_addr_t pci_hole_size,
191 target_phys_addr_t pci_hole64_start,
192 target_phys_addr_t pci_hole64_size,
193 MemoryRegion *pci_memory,
194 MemoryRegion *ram_memory);
87ecb68b 195
823e675a 196/* piix4.c */
b1d8e52e 197extern PCIDevice *piix4_dev;
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198int piix4_init(PCIBus *bus, int devfn);
199
200/* vga.c */
cb5a7aa8 201enum vga_retrace_method {
202 VGA_RETRACE_DUMB,
203 VGA_RETRACE_PRECISE
204};
205
206extern enum vga_retrace_method vga_retrace_method;
87ecb68b 207
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208static inline int isa_vga_init(void)
209{
c74b88df 210 ISADevice *dev;
7435b791 211
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212 dev = isa_try_create("isa-vga");
213 if (!dev) {
214 fprintf(stderr, "Warning: isa-vga not available\n");
215 return 0;
216 }
217 qdev_init_nofail(&dev->qdev);
218 return 1;
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219}
220
78895427 221int pci_vga_init(PCIBus *bus);
c227f099 222int isa_vga_mm_init(target_phys_addr_t vram_base,
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223 target_phys_addr_t ctrl_base, int it_shift,
224 MemoryRegion *address_space);
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225
226/* cirrus_vga.c */
fbe1b595 227void pci_cirrus_vga_init(PCIBus *bus);
be20f9e9 228void isa_cirrus_vga_init(MemoryRegion *address_space);
87ecb68b 229
87ecb68b 230/* ne2000.c */
cd1b8a8b 231static inline bool isa_ne2000_init(int base, int irq, NICInfo *nd)
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232{
233 ISADevice *dev;
87ecb68b 234
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235 qemu_check_nic_model(nd, "ne2k_isa");
236
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237 dev = isa_try_create("ne2k_isa");
238 if (!dev) {
239 return false;
240 }
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241 qdev_prop_set_uint32(&dev->qdev, "iobase", base);
242 qdev_prop_set_uint32(&dev->qdev, "irq", irq);
243 qdev_set_nic_properties(&dev->qdev, nd);
244 qdev_init_nofail(&dev->qdev);
cd1b8a8b 245 return true;
60a14ad3 246}
87ecb68b 247
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248/* e820 types */
249#define E820_RAM 1
250#define E820_RESERVED 2
251#define E820_ACPI 3
252#define E820_NVS 4
253#define E820_UNUSABLE 5
254
255int e820_add_entry(uint64_t, uint64_t, uint32_t);
256
87ecb68b 257#endif