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ne2000_isa: make optional
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1#ifndef HW_PC_H
2#define HW_PC_H
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3
4#include "qemu-common.h"
35bed8ee 5#include "ioport.h"
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6#include "isa.h"
7#include "fdc.h"
cd1b8a8b 8#include "net.h"
376253ec 9
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10/* PC-style peripherals (also used by other machines). */
11
12/* serial.c */
13
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14SerialState *serial_init(int base, qemu_irq irq, int baudbase,
15 CharDriverState *chr);
c227f099 16SerialState *serial_mm_init (target_phys_addr_t base, int it_shift,
b6cd0ea1 17 qemu_irq irq, int baudbase,
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18 CharDriverState *chr, int ioregister,
19 int be);
ac0be998 20SerialState *serial_isa_init(int index, CharDriverState *chr);
038eaf82 21void serial_set_frequency(SerialState *s, uint32_t frequency);
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22
23/* parallel.c */
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24static inline bool parallel_init(int index, CharDriverState *chr)
25{
26 ISADevice *dev;
27
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28 dev = isa_try_create("isa-parallel");
29 if (!dev) {
30 return false;
31 }
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32 qdev_prop_set_uint32(&dev->qdev, "index", index);
33 qdev_prop_set_chr(&dev->qdev, "chardev", chr);
34 if (qdev_init(&dev->qdev) < 0) {
35 return false;
36 }
37 return true;
38}
39
40bool parallel_mm_init(target_phys_addr_t base, int it_shift, qemu_irq irq,
41 CharDriverState *chr);
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42
43/* i8259.c */
44
45typedef struct PicState2 PicState2;
46extern PicState2 *isa_pic;
47void pic_set_irq(int irq, int level);
48void pic_set_irq_new(void *opaque, int irq, int level);
49qemu_irq *i8259_init(qemu_irq parent_irq);
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50int pic_read_irq(PicState2 *s);
51void pic_update_irq(PicState2 *s);
52uint32_t pic_intack_read(PicState2 *s);
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53void pic_info(Monitor *mon);
54void irq_info(Monitor *mon);
87ecb68b 55
845773ab 56/* ISA */
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57#define IOAPIC_NUM_PINS 0x18
58
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59typedef struct isa_irq_state {
60 qemu_irq *i8259;
96051119 61 qemu_irq ioapic[IOAPIC_NUM_PINS];
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62} IsaIrqState;
63
64void isa_irq_handler(void *opaque, int n, int level);
65
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66/* i8254.c */
67
68#define PIT_FREQ 1193182
69
70typedef struct PITState PITState;
71
72PITState *pit_init(int base, qemu_irq irq);
73void pit_set_gate(PITState *pit, int channel, int val);
74int pit_get_gate(PITState *pit, int channel);
75int pit_get_initial_count(PITState *pit, int channel);
76int pit_get_mode(PITState *pit, int channel);
77int pit_get_out(PITState *pit, int channel, int64_t current_time);
78
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79void hpet_pit_disable(void);
80void hpet_pit_enable(void);
81
87ecb68b 82/* vmport.c */
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83static inline void vmport_init(void)
84{
85 isa_create_simple("vmport");
86}
87ecb68b 87void vmport_register(unsigned char command, IOPortReadFunc *func, void *opaque);
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88void vmmouse_get_data(uint32_t *data);
89void vmmouse_set_data(const uint32_t *data);
87ecb68b 90
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91/* pckbd.c */
92
93void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base);
94void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
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95 target_phys_addr_t base, ram_addr_t size,
96 target_phys_addr_t mask);
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97void i8042_isa_mouse_fake_event(void *opaque);
98void i8042_setup_a20_line(ISADevice *dev, qemu_irq *a20_out);
87ecb68b 99
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100/* pc.c */
101extern int fd_bootchk;
102
8e78eb28 103void pc_register_ferr_irq(qemu_irq irq);
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104void pc_cmos_set_s3_resume(void *opaque, int irq, int level);
105void pc_acpi_smi_interrupt(void *opaque, int irq, int level);
106
107void pc_cpus_init(const char *cpu_model);
108void pc_memory_init(ram_addr_t ram_size,
109 const char *kernel_filename,
110 const char *kernel_cmdline,
111 const char *initrd_filename,
112 ram_addr_t *below_4g_mem_size_p,
113 ram_addr_t *above_4g_mem_size_p);
114qemu_irq *pc_allocate_cpu_irq(void);
115void pc_vga_init(PCIBus *pci_bus);
116void pc_basic_device_init(qemu_irq *isa_irq,
117 FDCtrl **floppy_controller,
1d914fa0 118 ISADevice **rtc_state);
845773ab 119void pc_init_ne2k_isa(NICInfo *nd);
845773ab 120void pc_cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
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121 const char *boot_device,
122 BusState *ide0, BusState *ide1,
1d914fa0 123 FDCtrl *floppy_controller, ISADevice *s);
845773ab 124void pc_pci_device_init(PCIBus *pci_bus);
8e78eb28 125
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126typedef void (*cpu_set_smm_t)(int smm, void *arg);
127void cpu_smm_register(cpu_set_smm_t callback, void *arg);
128
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129/* acpi.c */
130extern int acpi_enabled;
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131extern char *acpi_tables;
132extern size_t acpi_tables_len;
133
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134void acpi_bios_init(void);
135int acpi_table_add(const char *table_desc);
136
137/* acpi_piix.c */
53b67b30 138
cf7a2fe2 139i2c_bus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
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140 qemu_irq sci_irq, qemu_irq cmos_s3, qemu_irq smi_irq,
141 int kvm_enabled);
87ecb68b 142void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr);
87ecb68b 143
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144/* hpet.c */
145extern int no_hpet;
146
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147/* pcspk.c */
148void pcspk_init(PITState *);
22d83b14 149int pcspk_audio_init(qemu_irq *pic);
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150
151/* piix_pci.c */
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152struct PCII440FXState;
153typedef struct PCII440FXState PCII440FXState;
154
97679527 155PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix_devfn, qemu_irq *pic, ram_addr_t ram_size);
0a3bacf3 156void i440fx_init_memory_mappings(PCII440FXState *d);
87ecb68b 157
823e675a 158/* piix4.c */
b1d8e52e 159extern PCIDevice *piix4_dev;
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160int piix4_init(PCIBus *bus, int devfn);
161
162/* vga.c */
cb5a7aa8 163enum vga_retrace_method {
164 VGA_RETRACE_DUMB,
165 VGA_RETRACE_PRECISE
166};
167
168extern enum vga_retrace_method vga_retrace_method;
87ecb68b 169
fbe1b595 170int isa_vga_init(void);
78895427 171int pci_vga_init(PCIBus *bus);
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172int isa_vga_mm_init(target_phys_addr_t vram_base,
173 target_phys_addr_t ctrl_base, int it_shift);
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174
175/* cirrus_vga.c */
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176void pci_cirrus_vga_init(PCIBus *bus);
177void isa_cirrus_vga_init(void);
87ecb68b 178
87ecb68b 179/* ne2000.c */
cd1b8a8b 180static inline bool isa_ne2000_init(int base, int irq, NICInfo *nd)
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181{
182 ISADevice *dev;
87ecb68b 183
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184 qemu_check_nic_model(nd, "ne2k_isa");
185
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186 dev = isa_try_create("ne2k_isa");
187 if (!dev) {
188 return false;
189 }
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190 qdev_prop_set_uint32(&dev->qdev, "iobase", base);
191 qdev_prop_set_uint32(&dev->qdev, "irq", irq);
192 qdev_set_nic_properties(&dev->qdev, nd);
193 qdev_init_nofail(&dev->qdev);
cd1b8a8b 194 return true;
60a14ad3 195}
87ecb68b 196
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197/* e820 types */
198#define E820_RAM 1
199#define E820_RESERVED 2
200#define E820_ACPI 3
201#define E820_NVS 4
202#define E820_UNUSABLE 5
203
204int e820_add_entry(uint64_t, uint64_t, uint32_t);
205
87ecb68b 206#endif