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Fix vmport segfault (v2)
[mirror_qemu.git] / hw / pc.h
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1#ifndef HW_PC_H
2#define HW_PC_H
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3
4#include "qemu-common.h"
35bed8ee 5#include "ioport.h"
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6#include "isa.h"
7#include "fdc.h"
376253ec 8
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9/* PC-style peripherals (also used by other machines). */
10
11/* serial.c */
12
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13SerialState *serial_init(int base, qemu_irq irq, int baudbase,
14 CharDriverState *chr);
c227f099 15SerialState *serial_mm_init (target_phys_addr_t base, int it_shift,
b6cd0ea1 16 qemu_irq irq, int baudbase,
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17 CharDriverState *chr, int ioregister,
18 int be);
ac0be998 19SerialState *serial_isa_init(int index, CharDriverState *chr);
038eaf82 20void serial_set_frequency(SerialState *s, uint32_t frequency);
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21
22/* parallel.c */
23
24typedef struct ParallelState ParallelState;
021f0674 25ParallelState *parallel_init(int index, CharDriverState *chr);
c227f099 26ParallelState *parallel_mm_init(target_phys_addr_t base, int it_shift, qemu_irq irq, CharDriverState *chr);
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27
28/* i8259.c */
29
30typedef struct PicState2 PicState2;
31extern PicState2 *isa_pic;
32void pic_set_irq(int irq, int level);
33void pic_set_irq_new(void *opaque, int irq, int level);
34qemu_irq *i8259_init(qemu_irq parent_irq);
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35int pic_read_irq(PicState2 *s);
36void pic_update_irq(PicState2 *s);
37uint32_t pic_intack_read(PicState2 *s);
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38void pic_info(Monitor *mon);
39void irq_info(Monitor *mon);
87ecb68b 40
845773ab 41/* ISA */
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42#define IOAPIC_NUM_PINS 0x18
43
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44typedef struct isa_irq_state {
45 qemu_irq *i8259;
96051119 46 qemu_irq ioapic[IOAPIC_NUM_PINS];
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47} IsaIrqState;
48
49void isa_irq_handler(void *opaque, int n, int level);
50
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51/* i8254.c */
52
53#define PIT_FREQ 1193182
54
55typedef struct PITState PITState;
56
57PITState *pit_init(int base, qemu_irq irq);
58void pit_set_gate(PITState *pit, int channel, int val);
59int pit_get_gate(PITState *pit, int channel);
60int pit_get_initial_count(PITState *pit, int channel);
61int pit_get_mode(PITState *pit, int channel);
62int pit_get_out(PITState *pit, int channel, int64_t current_time);
63
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64void hpet_pit_disable(void);
65void hpet_pit_enable(void);
66
87ecb68b 67/* vmport.c */
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68static inline void vmport_init(void)
69{
70 isa_create_simple("vmport");
71}
87ecb68b 72void vmport_register(unsigned char command, IOPortReadFunc *func, void *opaque);
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73void vmmouse_get_data(uint32_t *data);
74void vmmouse_set_data(const uint32_t *data);
87ecb68b 75
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76/* pckbd.c */
77
78void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base);
79void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
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80 target_phys_addr_t base, ram_addr_t size,
81 target_phys_addr_t mask);
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82void i8042_isa_mouse_fake_event(void *opaque);
83void i8042_setup_a20_line(ISADevice *dev, qemu_irq *a20_out);
87ecb68b 84
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85/* pc.c */
86extern int fd_bootchk;
87
8e78eb28 88void pc_register_ferr_irq(qemu_irq irq);
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89void pc_cmos_set_s3_resume(void *opaque, int irq, int level);
90void pc_acpi_smi_interrupt(void *opaque, int irq, int level);
91
92void pc_cpus_init(const char *cpu_model);
93void pc_memory_init(ram_addr_t ram_size,
94 const char *kernel_filename,
95 const char *kernel_cmdline,
96 const char *initrd_filename,
97 ram_addr_t *below_4g_mem_size_p,
98 ram_addr_t *above_4g_mem_size_p);
99qemu_irq *pc_allocate_cpu_irq(void);
100void pc_vga_init(PCIBus *pci_bus);
101void pc_basic_device_init(qemu_irq *isa_irq,
102 FDCtrl **floppy_controller,
1d914fa0 103 ISADevice **rtc_state);
845773ab 104void pc_init_ne2k_isa(NICInfo *nd);
845773ab 105void pc_cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
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106 const char *boot_device,
107 BusState *ide0, BusState *ide1,
1d914fa0 108 FDCtrl *floppy_controller, ISADevice *s);
845773ab 109void pc_pci_device_init(PCIBus *pci_bus);
8e78eb28 110
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111typedef void (*cpu_set_smm_t)(int smm, void *arg);
112void cpu_smm_register(cpu_set_smm_t callback, void *arg);
113
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114/* acpi.c */
115extern int acpi_enabled;
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116extern char *acpi_tables;
117extern size_t acpi_tables_len;
118
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119void acpi_bios_init(void);
120int acpi_table_add(const char *table_desc);
121
122/* acpi_piix.c */
53b67b30 123
cf7a2fe2 124i2c_bus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
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125 qemu_irq sci_irq, qemu_irq cmos_s3, qemu_irq smi_irq,
126 int kvm_enabled);
87ecb68b 127void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr);
87ecb68b 128
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129/* hpet.c */
130extern int no_hpet;
131
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132/* pcspk.c */
133void pcspk_init(PITState *);
22d83b14 134int pcspk_audio_init(qemu_irq *pic);
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135
136/* piix_pci.c */
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137struct PCII440FXState;
138typedef struct PCII440FXState PCII440FXState;
139
97679527 140PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix_devfn, qemu_irq *pic, ram_addr_t ram_size);
0a3bacf3 141void i440fx_init_memory_mappings(PCII440FXState *d);
87ecb68b 142
823e675a 143/* piix4.c */
b1d8e52e 144extern PCIDevice *piix4_dev;
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145int piix4_init(PCIBus *bus, int devfn);
146
147/* vga.c */
cb5a7aa8 148enum vga_retrace_method {
149 VGA_RETRACE_DUMB,
150 VGA_RETRACE_PRECISE
151};
152
153extern enum vga_retrace_method vga_retrace_method;
87ecb68b 154
fbe1b595 155int isa_vga_init(void);
78895427 156int pci_vga_init(PCIBus *bus);
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157int isa_vga_mm_init(target_phys_addr_t vram_base,
158 target_phys_addr_t ctrl_base, int it_shift);
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159
160/* cirrus_vga.c */
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161void pci_cirrus_vga_init(PCIBus *bus);
162void isa_cirrus_vga_init(void);
87ecb68b 163
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164/* ne2000.c */
165
9453c5bc 166void isa_ne2000_init(int base, int irq, NICInfo *nd);
87ecb68b 167
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168/* e820 types */
169#define E820_RAM 1
170#define E820_RESERVED 2
171#define E820_ACPI 3
172#define E820_NVS 4
173#define E820_UNUSABLE 5
174
175int e820_add_entry(uint64_t, uint64_t, uint32_t);
176
87ecb68b 177#endif