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783753fd IY |
1 | /* |
2 | * QEMU PCI bus manager | |
3 | * | |
4 | * Copyright (c) 2004 Fabrice Bellard | |
5 | * | |
6 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
7 | * of this software and associated documentation files (the "Software"), to dea | |
8 | ||
9 | * in the Software without restriction, including without limitation the rights | |
10 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
11 | * copies of the Software, and to permit persons to whom the Software is | |
12 | * furnished to do so, subject to the following conditions: | |
13 | * | |
14 | * The above copyright notice and this permission notice shall be included in | |
15 | * all copies or substantial portions of the Software. | |
16 | * | |
17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
19 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
20 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
21 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM | |
22 | ||
23 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
24 | * THE SOFTWARE. | |
25 | */ | |
26 | /* | |
27 | * split out from pci.c | |
28 | * Copyright (c) 2010 Isaku Yamahata <yamahata at valinux co jp> | |
29 | * VA Linux Systems Japan K.K. | |
30 | */ | |
31 | ||
32 | #include "pci_bridge.h" | |
33 | #include "pci_internals.h" | |
34 | ||
68f79994 | 35 | /* Accessor function to get parent bridge device from pci bus. */ |
783753fd IY |
36 | PCIDevice *pci_bridge_get_device(PCIBus *bus) |
37 | { | |
38 | return bus->parent_dev; | |
39 | } | |
40 | ||
68f79994 IY |
41 | /* Accessor function to get secondary bus from pci-to-pci bridge device */ |
42 | PCIBus *pci_bridge_get_sec_bus(PCIBridge *br) | |
43 | { | |
44 | return &br->sec_bus; | |
45 | } | |
46 | ||
47 | static uint32_t pci_config_get_io_base(const PCIDevice *d, | |
783753fd IY |
48 | uint32_t base, uint32_t base_upper16) |
49 | { | |
50 | uint32_t val; | |
51 | ||
52 | val = ((uint32_t)d->config[base] & PCI_IO_RANGE_MASK) << 8; | |
53 | if (d->config[base] & PCI_IO_RANGE_TYPE_32) { | |
54 | val |= (uint32_t)pci_get_word(d->config + base_upper16) << 16; | |
55 | } | |
56 | return val; | |
57 | } | |
58 | ||
68f79994 | 59 | static pcibus_t pci_config_get_memory_base(const PCIDevice *d, uint32_t base) |
783753fd IY |
60 | { |
61 | return ((pcibus_t)pci_get_word(d->config + base) & PCI_MEMORY_RANGE_MASK) | |
62 | << 16; | |
63 | } | |
64 | ||
68f79994 | 65 | static pcibus_t pci_config_get_pref_base(const PCIDevice *d, |
783753fd IY |
66 | uint32_t base, uint32_t upper) |
67 | { | |
68 | pcibus_t tmp; | |
69 | pcibus_t val; | |
70 | ||
71 | tmp = (pcibus_t)pci_get_word(d->config + base); | |
72 | val = (tmp & PCI_PREF_RANGE_MASK) << 16; | |
73 | if (tmp & PCI_PREF_RANGE_TYPE_64) { | |
74 | val |= (pcibus_t)pci_get_long(d->config + upper) << 32; | |
75 | } | |
76 | return val; | |
77 | } | |
78 | ||
68f79994 IY |
79 | /* accessor function to get bridge filtering base address */ |
80 | pcibus_t pci_bridge_get_base(const PCIDevice *bridge, uint8_t type) | |
783753fd IY |
81 | { |
82 | pcibus_t base; | |
83 | if (type & PCI_BASE_ADDRESS_SPACE_IO) { | |
84 | base = pci_config_get_io_base(bridge, | |
85 | PCI_IO_BASE, PCI_IO_BASE_UPPER16); | |
86 | } else { | |
87 | if (type & PCI_BASE_ADDRESS_MEM_PREFETCH) { | |
88 | base = pci_config_get_pref_base( | |
89 | bridge, PCI_PREF_MEMORY_BASE, PCI_PREF_BASE_UPPER32); | |
90 | } else { | |
91 | base = pci_config_get_memory_base(bridge, PCI_MEMORY_BASE); | |
92 | } | |
93 | } | |
94 | ||
95 | return base; | |
96 | } | |
97 | ||
68f79994 IY |
98 | /* accessor funciton to get bridge filtering limit */ |
99 | pcibus_t pci_bridge_get_limit(const PCIDevice *bridge, uint8_t type) | |
783753fd IY |
100 | { |
101 | pcibus_t limit; | |
102 | if (type & PCI_BASE_ADDRESS_SPACE_IO) { | |
103 | limit = pci_config_get_io_base(bridge, | |
104 | PCI_IO_LIMIT, PCI_IO_LIMIT_UPPER16); | |
105 | limit |= 0xfff; /* PCI bridge spec 3.2.5.6. */ | |
106 | } else { | |
107 | if (type & PCI_BASE_ADDRESS_MEM_PREFETCH) { | |
108 | limit = pci_config_get_pref_base( | |
109 | bridge, PCI_PREF_MEMORY_LIMIT, PCI_PREF_LIMIT_UPPER32); | |
110 | } else { | |
111 | limit = pci_config_get_memory_base(bridge, PCI_MEMORY_LIMIT); | |
112 | } | |
113 | limit |= 0xfffff; /* PCI bridge spec 3.2.5.{1, 8}. */ | |
114 | } | |
115 | return limit; | |
116 | } | |
117 | ||
68f79994 IY |
118 | /* default write_config function for PCI-to-PCI bridge */ |
119 | void pci_bridge_write_config(PCIDevice *d, | |
783753fd IY |
120 | uint32_t address, uint32_t val, int len) |
121 | { | |
122 | pci_default_write_config(d, address, val, len); | |
123 | ||
124 | if (/* io base/limit */ | |
125 | ranges_overlap(address, len, PCI_IO_BASE, 2) || | |
126 | ||
127 | /* memory base/limit, prefetchable base/limit and | |
128 | io base/limit upper 16 */ | |
129 | ranges_overlap(address, len, PCI_MEMORY_BASE, 20)) { | |
130 | PCIBridge *s = container_of(d, PCIBridge, dev); | |
7e98e3af | 131 | pci_bridge_update_mappings(&s->sec_bus); |
783753fd IY |
132 | } |
133 | } | |
134 | ||
68f79994 IY |
135 | /* reset bridge specific configuration registers */ |
136 | void pci_bridge_reset_reg(PCIDevice *dev) | |
137 | { | |
138 | uint8_t *conf = dev->config; | |
139 | ||
140 | conf[PCI_PRIMARY_BUS] = 0; | |
141 | conf[PCI_SECONDARY_BUS] = 0; | |
142 | conf[PCI_SUBORDINATE_BUS] = 0; | |
143 | conf[PCI_SEC_LATENCY_TIMER] = 0; | |
144 | ||
145 | conf[PCI_IO_BASE] = 0; | |
146 | conf[PCI_IO_LIMIT] = 0; | |
147 | pci_set_word(conf + PCI_MEMORY_BASE, 0); | |
148 | pci_set_word(conf + PCI_MEMORY_LIMIT, 0); | |
149 | pci_set_word(conf + PCI_PREF_MEMORY_BASE, 0); | |
150 | pci_set_word(conf + PCI_PREF_MEMORY_LIMIT, 0); | |
151 | pci_set_word(conf + PCI_PREF_BASE_UPPER32, 0); | |
152 | pci_set_word(conf + PCI_PREF_LIMIT_UPPER32, 0); | |
153 | ||
154 | pci_set_word(conf + PCI_BRIDGE_CONTROL, 0); | |
155 | } | |
156 | ||
157 | /* default reset function for PCI-to-PCI bridge */ | |
158 | void pci_bridge_reset(DeviceState *qdev) | |
783753fd | 159 | { |
68f79994 IY |
160 | PCIDevice *dev = DO_UPCAST(PCIDevice, qdev, qdev); |
161 | pci_bridge_reset_reg(dev); | |
162 | } | |
783753fd | 163 | |
68f79994 IY |
164 | /* default qdev initialization function for PCI-to-PCI bridge */ |
165 | int pci_bridge_initfn(PCIDevice *dev) | |
166 | { | |
167 | PCIBus *parent = dev->bus; | |
168 | PCIBridge *br = DO_UPCAST(PCIBridge, dev, dev); | |
169 | PCIBus *sec_bus = &br->sec_bus; | |
783753fd IY |
170 | |
171 | pci_set_word(dev->config + PCI_STATUS, | |
172 | PCI_STATUS_66MHZ | PCI_STATUS_FAST_BACK); | |
173 | pci_config_set_class(dev->config, PCI_CLASS_BRIDGE_PCI); | |
174 | dev->config[PCI_HEADER_TYPE] = | |
175 | (dev->config[PCI_HEADER_TYPE] & PCI_HEADER_TYPE_MULTI_FUNCTION) | | |
176 | PCI_HEADER_TYPE_BRIDGE; | |
177 | pci_set_word(dev->config + PCI_SEC_STATUS, | |
178 | PCI_STATUS_66MHZ | PCI_STATUS_FAST_BACK); | |
68f79994 IY |
179 | |
180 | qbus_create_inplace(&sec_bus->qbus, &pci_bus_info, &dev->qdev, | |
181 | br->bus_name); | |
182 | sec_bus->parent_dev = dev; | |
183 | sec_bus->map_irq = br->map_irq; | |
184 | ||
185 | QLIST_INIT(&sec_bus->child); | |
186 | QLIST_INSERT_HEAD(&parent->child, sec_bus, sibling); | |
783753fd IY |
187 | return 0; |
188 | } | |
189 | ||
68f79994 IY |
190 | /* default qdev clean up function for PCI-to-PCI bridge */ |
191 | int pci_bridge_exitfn(PCIDevice *pci_dev) | |
783753fd IY |
192 | { |
193 | PCIBridge *s = DO_UPCAST(PCIBridge, dev, pci_dev); | |
51a92333 IY |
194 | assert(QLIST_EMPTY(&s->sec_bus.child)); |
195 | QLIST_REMOVE(&s->sec_bus, sibling); | |
68f79994 | 196 | /* qbus_free() is called automatically by qdev_free() */ |
783753fd IY |
197 | return 0; |
198 | } | |
199 | ||
68f79994 IY |
200 | /* |
201 | * before qdev initialization(qdev_init()), this function sets bus_name and | |
202 | * map_irq callback which are necessry for pci_bridge_initfn() to | |
203 | * initialize bus. | |
204 | */ | |
205 | void pci_bridge_map_irq(PCIBridge *br, const char* bus_name, | |
206 | pci_map_irq_fn map_irq) | |
783753fd | 207 | { |
68f79994 IY |
208 | br->map_irq = map_irq; |
209 | br->bus_name = bus_name; | |
783753fd | 210 | } |