[qemu.git] / hw / petalogix_s3adsp1800_mmu.c

/*
 * Model of Petalogix linux reference design targeting Xilinx Spartan 3ADSP-1800
 * boards.
 *
 * Copyright (c) 2009 Edgar E. Iglesias.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a copy
 * of this software and associated documentation files (the "Software"), to deal
 * in the Software without restriction, including without limitation the rights
 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
 * copies of the Software, and to permit persons to whom the Software is
 * furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
 * THE SOFTWARE.
 */

#include "sysbus.h"
#include "hw.h"
#include "net.h"
#include "flash.h"
#include "sysemu.h"
#include "devices.h"
#include "boards.h"
#include "device_tree.h"
#include "xilinx.h"

#define LMB_BRAM_SIZE  (128 * 1024)
#define FLASH_SIZE     (16 * 1024 * 1024)

static uint32_t bootstrap_pc;

static void main_cpu_reset(void *opaque)
{
    CPUState *env = opaque;
    cpu_reset(env);
    env->sregs[SR_PC] = bootstrap_pc;
}

#define BINARY_DEVICE_TREE_FILE "petalogix-s3adsp1800.dtb"
static int petalogix_load_device_tree(target_phys_addr_t addr,
                                      uint32_t ramsize,
                                      target_phys_addr_t initrd_base,
                                      target_phys_addr_t initrd_size,
                                      const char *kernel_cmdline)
{
    char *path;
    int fdt_size;
#ifdef CONFIG_FDT
    void *fdt;
    int r;

    /* Try the local "mb.dtb" override.  */
    fdt = load_device_tree("mb.dtb", &fdt_size);
    if (!fdt) {
        path = qemu_find_file(QEMU_FILE_TYPE_BIOS, BINARY_DEVICE_TREE_FILE);
        if (path) {
            fdt = load_device_tree(path, &fdt_size);
            qemu_free(path);
        }
        if (!fdt)
            return 0;
    }

    r = qemu_devtree_setprop_string(fdt, "/chosen", "bootargs", kernel_cmdline);
    if (r < 0)
        fprintf(stderr, "couldn't set /chosen/bootargs\n");
    cpu_physical_memory_write (addr, (void *)fdt, fdt_size);
#else
    /* We lack libfdt so we cannot manipulate the fdt. Just pass on the blob
       to the kernel.  */
    fdt_size = load_image_targphys("mb.dtb", addr, 0x10000);
    if (fdt_size < 0) {
        path = qemu_find_file(QEMU_FILE_TYPE_BIOS, BINARY_DEVICE_TREE_FILE);
        if (path) {
            fdt_size = load_image_targphys(path, addr, 0x10000);
	    qemu_free(path);
        }
    }

    if (kernel_cmdline) {
        fprintf(stderr,
                "Warning: missing libfdt, cannot pass cmdline to kernel!\n");
    }
#endif
    return fdt_size;
}

static void
petalogix_s3adsp1800_init(ram_addr_t ram_size,
                          const char *boot_device,
                          const char *kernel_filename,
                          const char *kernel_cmdline,
                          const char *initrd_filename, const char *cpu_model)
{
    DeviceState *dev;
    CPUState *env;
    int kernel_size;
    DriveInfo *dinfo;
    int i;
    target_phys_addr_t ddr_base = 0x90000000;
    ram_addr_t phys_lmb_bram;
    ram_addr_t phys_ram;
    ram_addr_t phys_flash;
    qemu_irq irq[32], *cpu_irq;

    /* init CPUs */
    if (cpu_model == NULL) {
        cpu_model = "microblaze";
    }
    env = cpu_init(cpu_model);

    env->pvr.regs[10] = 0x0c000000; /* spartan 3a dsp family.  */
    qemu_register_reset(main_cpu_reset, env);

    /* Attach emulated BRAM through the LMB.  */
    phys_lmb_bram = qemu_ram_alloc(LMB_BRAM_SIZE);
    cpu_register_physical_memory(0x00000000, LMB_BRAM_SIZE,
                                 phys_lmb_bram | IO_MEM_RAM);

    phys_ram = qemu_ram_alloc(ram_size);
    cpu_register_physical_memory(ddr_base, ram_size, phys_ram | IO_MEM_RAM);

    phys_flash = qemu_ram_alloc(FLASH_SIZE);
    dinfo = drive_get(IF_PFLASH, 0, 0);
    pflash_cfi02_register(0xa0000000, phys_flash,
                          dinfo ? dinfo->bdrv : NULL, (64 * 1024),
                          FLASH_SIZE >> 16,
                          1, 1, 0x0000, 0x0000, 0x0000, 0x0000,
                          0x555, 0x2aa);

    cpu_irq = microblaze_pic_init_cpu(env);
    dev = xilinx_intc_create(0x81800000, cpu_irq[0], 2);
    for (i = 0; i < 32; i++) {
        irq[i] = qdev_get_gpio_in(dev, i);
    }

    sysbus_create_simple("xilinx,uartlite", 0x84000000, irq[3]);
    /* 2 timers at irq 2 @ 62 Mhz.  */
    xilinx_timer_create(0x83c00000, irq[0], 2, 62 * 1000000);
    xilinx_ethlite_create(&nd_table[0], 0x81000000, irq[1], 0, 0);

    if (kernel_filename) {
        uint64_t entry, low, high;
        int kcmdline_len;
        uint32_t base32;

        /* Boots a kernel elf binary.  */
        kernel_size = load_elf(kernel_filename, 0,
                               &entry, &low, &high);
        base32 = entry;
        if (base32 == 0xc0000000) {
            kernel_size = load_elf(kernel_filename, -0x30000000LL,
                                   &entry, NULL, NULL);
        }
        /* Always boot into physical ram.  */
        bootstrap_pc = ddr_base + (entry & 0x0fffffff);
        if (kernel_size < 0) {
            /* If we failed loading ELF's try a raw image.  */
            kernel_size = load_image_targphys(kernel_filename, ddr_base,
                                              ram_size);
            bootstrap_pc = ddr_base;
        }

        env->regs[5] = ddr_base + kernel_size;
        if (kernel_cmdline && (kcmdline_len = strlen(kernel_cmdline))) {
            pstrcpy_targphys(env->regs[5], 256, kernel_cmdline);
        }
        env->regs[6] = 0;
        /* Provide a device-tree.  */
        env->regs[7] = ddr_base + kernel_size + 256;
        petalogix_load_device_tree(env->regs[7], ram_size,
                                   env->regs[6], 0,
                                   kernel_cmdline);
    }

    env->sregs[SR_PC] = bootstrap_pc;
}

static QEMUMachine petalogix_s3adsp1800_machine = {
    .name = "petalogix-s3adsp1800",
    .desc = "Petalogix linux refdesign for xilinx Spartan 3ADSP1800",
    .init = petalogix_s3adsp1800_init,
    .is_default = 1
};

static void petalogix_s3adsp1800_machine_init(void)
{
    qemu_register_machine(&petalogix_s3adsp1800_machine);
}

machine_init(petalogix_s3adsp1800_machine_init);
Commit	Line	Data
6a8b1ae2 EI	1	/*
	2	* Model of Petalogix linux reference design targeting Xilinx Spartan 3ADSP-1800
	3	* boards.
	4	*
	5	* Copyright (c) 2009 Edgar E. Iglesias.
	6	*
	7	* Permission is hereby granted, free of charge, to any person obtaining a copy
	8	* of this software and associated documentation files (the "Software"), to deal
	9	* in the Software without restriction, including without limitation the rights
	10	* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
	11	* copies of the Software, and to permit persons to whom the Software is
	12	* furnished to do so, subject to the following conditions:
	13	*
	14	* The above copyright notice and this permission notice shall be included in
	15	* all copies or substantial portions of the Software.
	16	*
	17	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	18	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	19	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	20	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
	21	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
	22	* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
	23	* THE SOFTWARE.
	24	*/
	25
	26	#include "sysbus.h"
	27	#include "hw.h"
	28	#include "net.h"
	29	#include "flash.h"
	30	#include "sysemu.h"
	31	#include "devices.h"
	32	#include "boards.h"
	33	#include "device_tree.h"
	34	#include "xilinx.h"
	35
	36	#define LMB_BRAM_SIZE (128 * 1024)
	37	#define FLASH_SIZE (16 * 1024 * 1024)
	38
	39	static uint32_t bootstrap_pc;
	40
	41	static void main_cpu_reset(void *opaque)
	42	{
	43	CPUState *env = opaque;
	44	cpu_reset(env);
	45	env->sregs[SR_PC] = bootstrap_pc;
	46	}
	47
	48	#define BINARY_DEVICE_TREE_FILE "petalogix-s3adsp1800.dtb"
	49	static int petalogix_load_device_tree(target_phys_addr_t addr,
	50	uint32_t ramsize,
	51	target_phys_addr_t initrd_base,
	52	target_phys_addr_t initrd_size,
	53	const char *kernel_cmdline)
	54	{
84f15818 JQ	55	char *path;
84f15818 JQ	56	int fdt_size;
3f0855b1	57	#ifdef CONFIG_FDT
6a8b1ae2	58	void *fdt;
6a8b1ae2 EI	59	int r;
	60
	61	/* Try the local "mb.dtb" override. */
	62	fdt = load_device_tree("mb.dtb", &fdt_size);
	63	if (!fdt) {
4b0c7aa3 EI	64	path = qemu_find_file(QEMU_FILE_TYPE_BIOS, BINARY_DEVICE_TREE_FILE);
	65	if (path) {
	66	fdt = load_device_tree(path, &fdt_size);
	67	qemu_free(path);
	68	}
6a8b1ae2 EI	69	if (!fdt)
	70	return 0;
	71	}
	72
	73	r = qemu_devtree_setprop_string(fdt, "/chosen", "bootargs", kernel_cmdline);
	74	if (r < 0)
	75	fprintf(stderr, "couldn't set /chosen/bootargs\n");
6a8b1ae2	76	cpu_physical_memory_write (addr, (void *)fdt, fdt_size);
7696d1ec EI	77	#else
	78	/* We lack libfdt so we cannot manipulate the fdt. Just pass on the blob
	79	to the kernel. */
	80	fdt_size = load_image_targphys("mb.dtb", addr, 0x10000);
	81	if (fdt_size < 0) {
4b0c7aa3 EI	82	path = qemu_find_file(QEMU_FILE_TYPE_BIOS, BINARY_DEVICE_TREE_FILE);
	83	if (path) {
	84	fdt_size = load_image_targphys(path, addr, 0x10000);
	85	qemu_free(path);
	86	}
7696d1ec EI	87	}
	88
	89	if (kernel_cmdline) {
	90	fprintf(stderr,
	91	"Warning: missing libfdt, cannot pass cmdline to kernel!\n");
	92	}
	93	#endif
6a8b1ae2 EI	94	return fdt_size;
	95	}
	96
	97	static void
	98	petalogix_s3adsp1800_init(ram_addr_t ram_size,
	99	const char *boot_device,
	100	const char *kernel_filename,
	101	const char *kernel_cmdline,
	102	const char initrd_filename, const char cpu_model)
	103	{
	104	DeviceState *dev;
	105	CPUState *env;
	106	int kernel_size;
751c6a17	107	DriveInfo *dinfo;
6a8b1ae2 EI	108	int i;
	109	target_phys_addr_t ddr_base = 0x90000000;
	110	ram_addr_t phys_lmb_bram;
	111	ram_addr_t phys_ram;
	112	ram_addr_t phys_flash;
	113	qemu_irq irq[32], *cpu_irq;
	114
	115	/* init CPUs */
	116	if (cpu_model == NULL) {
	117	cpu_model = "microblaze";
	118	}
	119	env = cpu_init(cpu_model);
	120
	121	env->pvr.regs[10] = 0x0c000000; /* spartan 3a dsp family. */
a08d4367	122	qemu_register_reset(main_cpu_reset, env);
6a8b1ae2 EI	123
	124	/* Attach emulated BRAM through the LMB. */
	125	phys_lmb_bram = qemu_ram_alloc(LMB_BRAM_SIZE);
	126	cpu_register_physical_memory(0x00000000, LMB_BRAM_SIZE,
	127	phys_lmb_bram \| IO_MEM_RAM);
	128
	129	phys_ram = qemu_ram_alloc(ram_size);
	130	cpu_register_physical_memory(ddr_base, ram_size, phys_ram \| IO_MEM_RAM);
	131
	132	phys_flash = qemu_ram_alloc(FLASH_SIZE);
751c6a17	133	dinfo = drive_get(IF_PFLASH, 0, 0);
6a8b1ae2	134	pflash_cfi02_register(0xa0000000, phys_flash,
751c6a17	135	dinfo ? dinfo->bdrv : NULL, (64 * 1024),
6a8b1ae2 EI	136	FLASH_SIZE >> 16,
	137	1, 1, 0x0000, 0x0000, 0x0000, 0x0000,
	138	0x555, 0x2aa);
	139
	140	cpu_irq = microblaze_pic_init_cpu(env);
	141	dev = xilinx_intc_create(0x81800000, cpu_irq[0], 2);
	142	for (i = 0; i < 32; i++) {
	143	irq[i] = qdev_get_gpio_in(dev, i);
	144	}
	145
	146	sysbus_create_simple("xilinx,uartlite", 0x84000000, irq[3]);
	147	/* 2 timers at irq 2 @ 62 Mhz. */
	148	xilinx_timer_create(0x83c00000, irq[0], 2, 62 * 1000000);
	149	xilinx_ethlite_create(&nd_table[0], 0x81000000, irq[1], 0, 0);
	150
	151	if (kernel_filename) {
	152	uint64_t entry, low, high;
	153	int kcmdline_len;
	154	uint32_t base32;
	155
	156	/* Boots a kernel elf binary. */
	157	kernel_size = load_elf(kernel_filename, 0,
	158	&entry, &low, &high);
	159	base32 = entry;
	160	if (base32 == 0xc0000000) {
	161	kernel_size = load_elf(kernel_filename, -0x30000000LL,
	162	&entry, NULL, NULL);
	163	}
	164	/* Always boot into physical ram. */
	165	bootstrap_pc = ddr_base + (entry & 0x0fffffff);
	166	if (kernel_size < 0) {
	167	/* If we failed loading ELF's try a raw image. */
	168	kernel_size = load_image_targphys(kernel_filename, ddr_base,
	169	ram_size);
	170	bootstrap_pc = ddr_base;
	171	}
	172
	173	env->regs[5] = ddr_base + kernel_size;
	174	if (kernel_cmdline && (kcmdline_len = strlen(kernel_cmdline))) {
	175	pstrcpy_targphys(env->regs[5], 256, kernel_cmdline);
	176	}
	177	env->regs[6] = 0;
	178	/* Provide a device-tree. */
	179	env->regs[7] = ddr_base + kernel_size + 256;
	180	petalogix_load_device_tree(env->regs[7], ram_size,
	181	env->regs[6], 0,
	182	kernel_cmdline);
	183	}
	184
	185	env->sregs[SR_PC] = bootstrap_pc;
	186	}
	187
	188	static QEMUMachine petalogix_s3adsp1800_machine = {
	189	.name = "petalogix-s3adsp1800",
	190	.desc = "Petalogix linux refdesign for xilinx Spartan 3ADSP1800",
	191	.init = petalogix_s3adsp1800_init,
	192	.is_default = 1
	193	};
	194
	195	static void petalogix_s3adsp1800_machine_init(void)
	196	{
	197	qemu_register_machine(&petalogix_s3adsp1800_machine);
	198	}
	199
200	machine_init(petalogix_s3adsp1800_machine_init);