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5fafdf24 1/*
69db0ac7 2 * Arm PrimeCell PL050 Keyboard / Mouse Interface
cdbdb648 3 *
9e61ec31 4 * Copyright (c) 2006-2007 CodeSourcery.
cdbdb648
PB
5 * Written by Paul Brook
6 *
8e31bf38 7 * This code is licensed under the GPL.
cdbdb648
PB
8 */
9
86394e96 10#include "sysbus.h"
87ecb68b 11#include "ps2.h"
cdbdb648
PB
12
13typedef struct {
86394e96 14 SysBusDevice busdev;
b8f7a738 15 MemoryRegion iomem;
cdbdb648 16 void *dev;
cdbdb648
PB
17 uint32_t cr;
18 uint32_t clk;
19 uint32_t last;
cdbdb648 20 int pending;
d537cf6c 21 qemu_irq irq;
cdbdb648
PB
22 int is_mouse;
23} pl050_state;
24
d6ac172a
PM
25static const VMStateDescription vmstate_pl050 = {
26 .name = "pl050",
27 .version_id = 1,
28 .minimum_version_id = 1,
29 .fields = (VMStateField[]) {
30 VMSTATE_UINT32(cr, pl050_state),
31 VMSTATE_UINT32(clk, pl050_state),
32 VMSTATE_UINT32(last, pl050_state),
33 VMSTATE_INT32(pending, pl050_state),
34 VMSTATE_INT32(is_mouse, pl050_state),
35 VMSTATE_END_OF_LIST()
36 }
37};
38
9e61ec31
PB
39#define PL050_TXEMPTY (1 << 6)
40#define PL050_TXBUSY (1 << 5)
41#define PL050_RXFULL (1 << 4)
42#define PL050_RXBUSY (1 << 3)
43#define PL050_RXPARITY (1 << 2)
44#define PL050_KMIC (1 << 1)
45#define PL050_KMID (1 << 0)
46
cdbdb648
PB
47static const unsigned char pl050_id[] =
48{ 0x50, 0x10, 0x04, 0x00, 0x0d, 0xf0, 0x05, 0xb1 };
49
50static void pl050_update(void *opaque, int level)
51{
52 pl050_state *s = (pl050_state *)opaque;
53 int raise;
54
55 s->pending = level;
56 raise = (s->pending && (s->cr & 0x10) != 0)
57 || (s->cr & 0x08) != 0;
d537cf6c 58 qemu_set_irq(s->irq, raise);
cdbdb648
PB
59}
60
a8170e5e 61static uint64_t pl050_read(void *opaque, hwaddr offset,
b8f7a738 62 unsigned size)
cdbdb648
PB
63{
64 pl050_state *s = (pl050_state *)opaque;
cdbdb648
PB
65 if (offset >= 0xfe0 && offset < 0x1000)
66 return pl050_id[(offset - 0xfe0) >> 2];
67
68 switch (offset >> 2) {
69 case 0: /* KMICR */
70 return s->cr;
71 case 1: /* KMISTAT */
9e61ec31
PB
72 {
73 uint8_t val;
74 uint32_t stat;
75
76 val = s->last;
77 val = val ^ (val >> 4);
78 val = val ^ (val >> 2);
79 val = (val ^ (val >> 1)) & 1;
80
81 stat = PL050_TXEMPTY;
82 if (val)
83 stat |= PL050_RXPARITY;
84 if (s->pending)
85 stat |= PL050_RXFULL;
86
87 return stat;
cdbdb648
PB
88 }
89 case 2: /* KMIDATA */
90 if (s->pending)
91 s->last = ps2_read_data(s->dev);
92 return s->last;
93 case 3: /* KMICLKDIV */
94 return s->clk;
95 case 4: /* KMIIR */
96 return s->pending | 2;
97 default:
fbfecf43
PM
98 qemu_log_mask(LOG_GUEST_ERROR,
99 "pl050_read: Bad offset %x\n", (int)offset);
cdbdb648
PB
100 return 0;
101 }
102}
103
a8170e5e 104static void pl050_write(void *opaque, hwaddr offset,
b8f7a738 105 uint64_t value, unsigned size)
cdbdb648
PB
106{
107 pl050_state *s = (pl050_state *)opaque;
cdbdb648
PB
108 switch (offset >> 2) {
109 case 0: /* KMICR */
110 s->cr = value;
111 pl050_update(s, s->pending);
112 /* ??? Need to implement the enable/disable bit. */
113 break;
114 case 2: /* KMIDATA */
115 /* ??? This should toggle the TX interrupt line. */
116 /* ??? This means kbd/mouse can block each other. */
117 if (s->is_mouse) {
118 ps2_write_mouse(s->dev, value);
119 } else {
120 ps2_write_keyboard(s->dev, value);
121 }
122 break;
123 case 3: /* KMICLKDIV */
124 s->clk = value;
125 return;
126 default:
fbfecf43
PM
127 qemu_log_mask(LOG_GUEST_ERROR,
128 "pl050_write: Bad offset %x\n", (int)offset);
cdbdb648
PB
129 }
130}
b8f7a738
AK
131static const MemoryRegionOps pl050_ops = {
132 .read = pl050_read,
133 .write = pl050_write,
134 .endianness = DEVICE_NATIVE_ENDIAN,
cdbdb648
PB
135};
136
81a322d4 137static int pl050_init(SysBusDevice *dev, int is_mouse)
cdbdb648 138{
86394e96 139 pl050_state *s = FROM_SYSBUS(pl050_state, dev);
cdbdb648 140
b8f7a738 141 memory_region_init_io(&s->iomem, &pl050_ops, s, "pl050", 0x1000);
750ecd44 142 sysbus_init_mmio(dev, &s->iomem);
86394e96 143 sysbus_init_irq(dev, &s->irq);
cdbdb648 144 s->is_mouse = is_mouse;
86394e96 145 if (s->is_mouse)
cdbdb648
PB
146 s->dev = ps2_mouse_init(pl050_update, s);
147 else
148 s->dev = ps2_kbd_init(pl050_update, s);
81a322d4 149 return 0;
cdbdb648 150}
86394e96 151
81a322d4 152static int pl050_init_keyboard(SysBusDevice *dev)
86394e96 153{
81a322d4 154 return pl050_init(dev, 0);
86394e96
PB
155}
156
81a322d4 157static int pl050_init_mouse(SysBusDevice *dev)
86394e96 158{
81a322d4 159 return pl050_init(dev, 1);
86394e96
PB
160}
161
999e12bb
AL
162static void pl050_kbd_class_init(ObjectClass *klass, void *data)
163{
39bffca2 164 DeviceClass *dc = DEVICE_CLASS(klass);
999e12bb
AL
165 SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
166
167 k->init = pl050_init_keyboard;
39bffca2 168 dc->vmsd = &vmstate_pl050;
999e12bb
AL
169}
170
39bffca2
AL
171static TypeInfo pl050_kbd_info = {
172 .name = "pl050_keyboard",
173 .parent = TYPE_SYS_BUS_DEVICE,
174 .instance_size = sizeof(pl050_state),
175 .class_init = pl050_kbd_class_init,
d6ac172a
PM
176};
177
999e12bb
AL
178static void pl050_mouse_class_init(ObjectClass *klass, void *data)
179{
39bffca2 180 DeviceClass *dc = DEVICE_CLASS(klass);
999e12bb
AL
181 SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
182
183 k->init = pl050_init_mouse;
39bffca2 184 dc->vmsd = &vmstate_pl050;
999e12bb
AL
185}
186
39bffca2
AL
187static TypeInfo pl050_mouse_info = {
188 .name = "pl050_mouse",
189 .parent = TYPE_SYS_BUS_DEVICE,
190 .instance_size = sizeof(pl050_state),
191 .class_init = pl050_mouse_class_init,
d6ac172a
PM
192};
193
83f7d43a 194static void pl050_register_types(void)
86394e96 195{
39bffca2
AL
196 type_register_static(&pl050_kbd_info);
197 type_register_static(&pl050_mouse_info);
86394e96
PB
198}
199
83f7d43a 200type_init(pl050_register_types)