]> git.proxmox.com Git - qemu.git/blame - hw/ppc/mpc8544_guts.c
spapr: add vio-bus devices to categories
[qemu.git] / hw / ppc / mpc8544_guts.c
CommitLineData
b0fb8423
AG
1/*
2 * QEMU PowerPC MPC8544 global util pseudo-device
3 *
4 * Copyright (C) 2011 Freescale Semiconductor, Inc. All rights reserved.
5 *
6 * Author: Alexander Graf, <alex@csgraf.de>
7 *
8 * This is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * *****************************************************************
14 *
15 * The documentation for this device is noted in the MPC8544 documentation,
16 * file name "MPC8544ERM.pdf". You can easily find it on the web.
17 *
18 */
19
83c9f4ca 20#include "hw/hw.h"
9c17d615 21#include "sysemu/sysemu.h"
83c9f4ca 22#include "hw/sysbus.h"
b0fb8423
AG
23
24#define MPC8544_GUTS_MMIO_SIZE 0x1000
25#define MPC8544_GUTS_RSTCR_RESET 0x02
26
27#define MPC8544_GUTS_ADDR_PORPLLSR 0x00
28#define MPC8544_GUTS_ADDR_PORBMSR 0x04
29#define MPC8544_GUTS_ADDR_PORIMPSCR 0x08
30#define MPC8544_GUTS_ADDR_PORDEVSR 0x0C
31#define MPC8544_GUTS_ADDR_PORDBGMSR 0x10
32#define MPC8544_GUTS_ADDR_PORDEVSR2 0x14
33#define MPC8544_GUTS_ADDR_GPPORCR 0x20
34#define MPC8544_GUTS_ADDR_GPIOCR 0x30
35#define MPC8544_GUTS_ADDR_GPOUTDR 0x40
36#define MPC8544_GUTS_ADDR_GPINDR 0x50
37#define MPC8544_GUTS_ADDR_PMUXCR 0x60
38#define MPC8544_GUTS_ADDR_DEVDISR 0x70
39#define MPC8544_GUTS_ADDR_POWMGTCSR 0x80
40#define MPC8544_GUTS_ADDR_MCPSUMR 0x90
41#define MPC8544_GUTS_ADDR_RSTRSCR 0x94
42#define MPC8544_GUTS_ADDR_PVR 0xA0
43#define MPC8544_GUTS_ADDR_SVR 0xA4
44#define MPC8544_GUTS_ADDR_RSTCR 0xB0
45#define MPC8544_GUTS_ADDR_IOVSELSR 0xC0
46#define MPC8544_GUTS_ADDR_DDRCSR 0xB20
47#define MPC8544_GUTS_ADDR_DDRCDR 0xB24
48#define MPC8544_GUTS_ADDR_DDRCLKDR 0xB28
49#define MPC8544_GUTS_ADDR_CLKOCR 0xE00
50#define MPC8544_GUTS_ADDR_SRDS1CR1 0xF04
51#define MPC8544_GUTS_ADDR_SRDS2CR1 0xF10
52#define MPC8544_GUTS_ADDR_SRDS2CR3 0xF18
53
43f691e9
AF
54#define TYPE_MPC8544_GUTS "mpc8544-guts"
55#define MPC8544_GUTS(obj) OBJECT_CHECK(GutsState, (obj), TYPE_MPC8544_GUTS)
56
b0fb8423 57struct GutsState {
43f691e9
AF
58 /*< private >*/
59 SysBusDevice parent_obj;
60 /*< public >*/
61
1c7af35f 62 MemoryRegion iomem;
b0fb8423
AG
63};
64
65typedef struct GutsState GutsState;
66
a8170e5e 67static uint64_t mpc8544_guts_read(void *opaque, hwaddr addr,
1c7af35f 68 unsigned size)
b0fb8423
AG
69{
70 uint32_t value = 0;
4917cf44
AF
71 PowerPCCPU *cpu = POWERPC_CPU(current_cpu);
72 CPUPPCState *env = &cpu->env;
b0fb8423
AG
73
74 addr &= MPC8544_GUTS_MMIO_SIZE - 1;
75 switch (addr) {
76 case MPC8544_GUTS_ADDR_PVR:
77 value = env->spr[SPR_PVR];
78 break;
79 case MPC8544_GUTS_ADDR_SVR:
80 value = env->spr[SPR_E500_SVR];
81 break;
82 default:
83 fprintf(stderr, "guts: Unknown register read: %x\n", (int)addr);
84 break;
85 }
86
87 return value;
88}
89
a8170e5e 90static void mpc8544_guts_write(void *opaque, hwaddr addr,
1c7af35f 91 uint64_t value, unsigned size)
b0fb8423
AG
92{
93 addr &= MPC8544_GUTS_MMIO_SIZE - 1;
94
95 switch (addr) {
96 case MPC8544_GUTS_ADDR_RSTCR:
97 if (value & MPC8544_GUTS_RSTCR_RESET) {
98 qemu_system_reset_request();
99 }
100 break;
101 default:
102 fprintf(stderr, "guts: Unknown register write: %x = %x\n",
1c7af35f 103 (int)addr, (unsigned)value);
b0fb8423
AG
104 break;
105 }
106}
107
1c7af35f
AK
108static const MemoryRegionOps mpc8544_guts_ops = {
109 .read = mpc8544_guts_read,
110 .write = mpc8544_guts_write,
111 .endianness = DEVICE_BIG_ENDIAN,
112 .valid = {
113 .min_access_size = 4,
114 .max_access_size = 4,
115 },
b0fb8423
AG
116};
117
7587ea5b 118static void mpc8544_guts_initfn(Object *obj)
b0fb8423 119{
7587ea5b
AF
120 SysBusDevice *d = SYS_BUS_DEVICE(obj);
121 GutsState *s = MPC8544_GUTS(obj);
b0fb8423 122
40c5dce9 123 memory_region_init_io(&s->iomem, OBJECT(s), &mpc8544_guts_ops, s,
1f1a83f4 124 "mpc8544.guts", MPC8544_GUTS_MMIO_SIZE);
7587ea5b 125 sysbus_init_mmio(d, &s->iomem);
999e12bb
AL
126}
127
8c43a6f0 128static const TypeInfo mpc8544_guts_info = {
43f691e9 129 .name = TYPE_MPC8544_GUTS,
39bffca2
AL
130 .parent = TYPE_SYS_BUS_DEVICE,
131 .instance_size = sizeof(GutsState),
7587ea5b 132 .instance_init = mpc8544_guts_initfn,
b0fb8423
AG
133};
134
83f7d43a 135static void mpc8544_guts_register_types(void)
b0fb8423 136{
39bffca2 137 type_register_static(&mpc8544_guts_info);
b0fb8423 138}
83f7d43a
AF
139
140type_init(mpc8544_guts_register_types)