]> git.proxmox.com Git - qemu.git/blame - hw/ppc.h
user: Restore debug usage message for '-d ?' in user mode emulation
[qemu.git] / hw / ppc.h
CommitLineData
87ecb68b
PB
1/* PowerPC hardware exceptions management helpers */
2typedef void (*clk_setup_cb)(void *opaque, uint32_t freq);
c227f099
AL
3typedef struct clk_setup_t clk_setup_t;
4struct clk_setup_t {
87ecb68b
PB
5 clk_setup_cb cb;
6 void *opaque;
7};
c227f099 8static inline void clk_setup (clk_setup_t *clk, uint32_t freq)
87ecb68b
PB
9{
10 if (clk->cb != NULL)
11 (*clk->cb)(clk->opaque, freq);
12}
13
14clk_setup_cb cpu_ppc_tb_init (CPUState *env, uint32_t freq);
15/* Embedded PowerPC DCR management */
73b01960
AG
16typedef uint32_t (*dcr_read_cb)(void *opaque, int dcrn);
17typedef void (*dcr_write_cb)(void *opaque, int dcrn, uint32_t val);
87ecb68b
PB
18int ppc_dcr_init (CPUState *env, int (*dcr_read_error)(int dcrn),
19 int (*dcr_write_error)(int dcrn));
20int ppc_dcr_register (CPUState *env, int dcrn, void *opaque,
21 dcr_read_cb drc_read, dcr_write_cb dcr_write);
d63cb48d
EI
22clk_setup_cb ppc_emb_timers_init (CPUState *env, uint32_t freq,
23 unsigned int decr_excp);
24
87ecb68b
PB
25/* Embedded PowerPC reset */
26void ppc40x_core_reset (CPUState *env);
27void ppc40x_chip_reset (CPUState *env);
28void ppc40x_system_reset (CPUState *env);
29void PREP_debug_write (void *opaque, uint32_t addr, uint32_t val);
30
d60efc6b
BS
31extern CPUWriteMemoryFunc * const PPC_io_write[];
32extern CPUReadMemoryFunc * const PPC_io_read[];
87ecb68b 33void PPC_debug_write (void *opaque, uint32_t addr, uint32_t val);
b1d8e52e
BS
34
35void ppc40x_irq_init (CPUState *env);
9fdc60bf 36void ppce500_irq_init (CPUState *env);
b1d8e52e
BS
37void ppc6xx_irq_init (CPUState *env);
38void ppc970_irq_init (CPUState *env);
9d52e907 39void ppcPOWER7_irq_init (CPUState *env);
5ce4aafd
AJ
40
41/* PPC machines for OpenBIOS */
42enum {
43 ARCH_PREP = 0,
44 ARCH_MAC99,
45 ARCH_HEATHROW,
0f921197 46 ARCH_MAC99_U3,
5ce4aafd
AJ
47};
48
7f1aec5f
LV
49#define FW_CFG_PPC_WIDTH (FW_CFG_ARCH_LOCAL + 0x00)
50#define FW_CFG_PPC_HEIGHT (FW_CFG_ARCH_LOCAL + 0x01)
51#define FW_CFG_PPC_DEPTH (FW_CFG_ARCH_LOCAL + 0x02)
dc333cd6 52#define FW_CFG_PPC_TBFREQ (FW_CFG_ARCH_LOCAL + 0x03)
45024f09
AG
53#define FW_CFG_PPC_IS_KVM (FW_CFG_ARCH_LOCAL + 0x05)
54#define FW_CFG_PPC_KVM_HC (FW_CFG_ARCH_LOCAL + 0x06)
55#define FW_CFG_PPC_KVM_PID (FW_CFG_ARCH_LOCAL + 0x07)
802670e6
BS
56
57#define PPC_SERIAL_MM_BAUDBASE 399193