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[qemu.git] / hw / ppc_mac.h
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1/*
2 * QEMU PowerMac emulation shared definitions and prototypes
3 *
4 * Copyright (c) 2004-2007 Fabrice Bellard
5 * Copyright (c) 2007 Jocelyn Mayer
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
24 */
25#if !defined(__PPC_MAC_H__)
26#define __PPC_MAC_H__
27
28/* SMP is not enabled, for now */
29#define MAX_CPUS 1
30
bba831e8 31#define BIOS_SIZE (1024 * 1024)
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32#define BIOS_FILENAME "ppc_rom.bin"
33#define VGABIOS_FILENAME "video.x"
34#define NVRAM_SIZE 0x2000
e5d01b06 35#define PROM_FILENAME "openbios-ppc"
992e5acd 36#define PROM_ADDR 0xfff00000
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37
38#define KERNEL_LOAD_ADDR 0x01000000
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39#define CMDLINE_ADDR 0x027ff000
40#define INITRD_LOAD_ADDR 0x02800000
3cbee15b 41
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42#define ESCC_CLOCK 3686400
43
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44/* Cuda */
45void cuda_init (int *cuda_mem_index, qemu_irq irq);
46
47/* MacIO */
48void macio_init (PCIBus *bus, int device_id, int is_oldworld, int pic_mem_index,
74e91155 49 int dbdma_mem_index, int cuda_mem_index, void *nvram,
7fa9ae1a 50 int nb_ide, int *ide_mem_index, int escc_mem_index);
3cbee15b 51
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52/* Heathrow PIC */
53qemu_irq *heathrow_pic_init(int *pmem_index,
54 int nb_cpus, qemu_irq **irqs);
55
56/* Grackle PCI */
57PCIBus *pci_grackle_init(uint32_t base, qemu_irq *pic);
58
59/* UniNorth PCI */
60PCIBus *pci_pmac_init(qemu_irq *pic);
0f921197 61PCIBus *pci_pmac_u3_init(qemu_irq *pic);
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62
63/* Mac NVRAM */
64typedef struct MacIONVRAMState MacIONVRAMState;
65
c227f099 66MacIONVRAMState *macio_nvram_init (int *mem_index, target_phys_addr_t size,
68af3f24 67 unsigned int it_shift);
c227f099 68void macio_nvram_map (void *opaque, target_phys_addr_t mem_base);
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69void pmac_format_nvram_partition (MacIONVRAMState *nvr, int len);
70uint32_t macio_nvram_read (void *opaque, uint32_t addr);
71void macio_nvram_write (void *opaque, uint32_t addr, uint32_t val);
72
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73/* adb.c */
74
75#define MAX_ADB_DEVICES 16
76
77#define ADB_MAX_OUT_LEN 16
78
79typedef struct ADBDevice ADBDevice;
80
81/* buf = NULL means polling */
82typedef int ADBDeviceRequest(ADBDevice *d, uint8_t *buf_out,
83 const uint8_t *buf, int len);
84typedef int ADBDeviceReset(ADBDevice *d);
85
86struct ADBDevice {
87 struct ADBBusState *bus;
88 int devaddr;
89 int handler;
90 ADBDeviceRequest *devreq;
91 ADBDeviceReset *devreset;
92 void *opaque;
93};
94
95typedef struct ADBBusState {
96 ADBDevice devices[MAX_ADB_DEVICES];
97 int nb_devices;
98 int poll_index;
99} ADBBusState;
100
101int adb_request(ADBBusState *s, uint8_t *buf_out,
102 const uint8_t *buf, int len);
103int adb_poll(ADBBusState *s, uint8_t *buf_out);
104
105ADBDevice *adb_register_device(ADBBusState *s, int devaddr,
106 ADBDeviceRequest *devreq,
107 ADBDeviceReset *devreset,
108 void *opaque);
109void adb_kbd_init(ADBBusState *bus);
110void adb_mouse_init(ADBBusState *bus);
111
112extern ADBBusState adb_bus;
113
3cbee15b 114#endif /* !defined(__PPC_MAC_H__) */