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Commit | Line | Data |
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64201201 | 1 | /* |
3cbee15b | 2 | * QEMU PowerPC CHRP (currently NewWorld PowerMac) hardware System Emulator |
5fafdf24 | 3 | * |
47103572 | 4 | * Copyright (c) 2004-2007 Fabrice Bellard |
3cbee15b | 5 | * Copyright (c) 2007 Jocelyn Mayer |
5fafdf24 | 6 | * |
64201201 FB |
7 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
8 | * of this software and associated documentation files (the "Software"), to deal | |
9 | * in the Software without restriction, including without limitation the rights | |
10 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
11 | * copies of the Software, and to permit persons to whom the Software is | |
12 | * furnished to do so, subject to the following conditions: | |
13 | * | |
14 | * The above copyright notice and this permission notice shall be included in | |
15 | * all copies or substantial portions of the Software. | |
16 | * | |
17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
19 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
20 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
21 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
22 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
23 | * THE SOFTWARE. | |
24 | */ | |
87ecb68b PB |
25 | #include "hw.h" |
26 | #include "ppc.h" | |
3cbee15b | 27 | #include "ppc_mac.h" |
28ce5ce6 | 28 | #include "mac_dbdma.h" |
87ecb68b PB |
29 | #include "nvram.h" |
30 | #include "pc.h" | |
31 | #include "pci.h" | |
32 | #include "net.h" | |
33 | #include "sysemu.h" | |
34 | #include "boards.h" | |
006f3a48 | 35 | #include "fw_cfg.h" |
7fa9ae1a | 36 | #include "escc.h" |
b7169916 | 37 | #include "openpic.h" |
977e1244 | 38 | #include "ide.h" |
267002cd | 39 | |
e4bcb14c | 40 | #define MAX_IDE_BUS 2 |
864c136a | 41 | #define VGA_BIOS_SIZE 65536 |
006f3a48 | 42 | #define CFG_ADDR 0xf0000510 |
e4bcb14c | 43 | |
f3902383 BS |
44 | /* debug UniNorth */ |
45 | //#define DEBUG_UNIN | |
46 | ||
47 | #ifdef DEBUG_UNIN | |
001faf32 BS |
48 | #define UNIN_DPRINTF(fmt, ...) \ |
49 | do { printf("UNIN: " fmt , ## __VA_ARGS__); } while (0) | |
f3902383 | 50 | #else |
001faf32 | 51 | #define UNIN_DPRINTF(fmt, ...) |
f3902383 BS |
52 | #endif |
53 | ||
0aa6a4a2 FB |
54 | /* UniN device */ |
55 | static void unin_writel (void *opaque, target_phys_addr_t addr, uint32_t value) | |
56 | { | |
f3902383 | 57 | UNIN_DPRINTF("writel addr " TARGET_FMT_plx " val %x\n", addr, value); |
0aa6a4a2 FB |
58 | } |
59 | ||
60 | static uint32_t unin_readl (void *opaque, target_phys_addr_t addr) | |
61 | { | |
f3902383 BS |
62 | uint32_t value; |
63 | ||
64 | value = 0; | |
65 | UNIN_DPRINTF("readl addr " TARGET_FMT_plx " val %x\n", addr, value); | |
66 | ||
67 | return value; | |
0aa6a4a2 FB |
68 | } |
69 | ||
d60efc6b | 70 | static CPUWriteMemoryFunc * const unin_write[] = { |
0aa6a4a2 FB |
71 | &unin_writel, |
72 | &unin_writel, | |
73 | &unin_writel, | |
74 | }; | |
75 | ||
d60efc6b | 76 | static CPUReadMemoryFunc * const unin_read[] = { |
0aa6a4a2 FB |
77 | &unin_readl, |
78 | &unin_readl, | |
79 | &unin_readl, | |
80 | }; | |
81 | ||
513f789f BS |
82 | static int fw_cfg_boot_set(void *opaque, const char *boot_device) |
83 | { | |
84 | fw_cfg_add_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]); | |
85 | return 0; | |
86 | } | |
87 | ||
3cbee15b | 88 | /* PowerPC Mac99 hardware initialisation */ |
fbe1b595 | 89 | static void ppc_core99_init (ram_addr_t ram_size, |
3023f332 | 90 | const char *boot_device, |
3cbee15b JM |
91 | const char *kernel_filename, |
92 | const char *kernel_cmdline, | |
93 | const char *initrd_filename, | |
94 | const char *cpu_model) | |
64201201 | 95 | { |
aaed909a | 96 | CPUState *env = NULL, *envs[MAX_CPUS]; |
5cea8590 | 97 | char *filename; |
e9df014c | 98 | qemu_irq *pic, **openpic_irqs; |
aef445bd | 99 | int unin_memory; |
d5295253 | 100 | int linux_boot, i; |
b584726d | 101 | ram_addr_t ram_offset, bios_offset, vga_bios_offset; |
b6b8bd18 | 102 | uint32_t kernel_base, kernel_size, initrd_base, initrd_size; |
46e50e9d | 103 | PCIBus *pci_bus; |
3cbee15b JM |
104 | MacIONVRAMState *nvr; |
105 | int nvram_mem_index; | |
d5295253 | 106 | int vga_bios_size, bios_size; |
d537cf6c | 107 | qemu_irq *dummy_irq; |
7fa9ae1a | 108 | int pic_mem_index, dbdma_mem_index, cuda_mem_index, escc_mem_index; |
28c5af54 | 109 | int ppc_boot_device; |
751c6a17 | 110 | DriveInfo *dinfo; |
e4bcb14c | 111 | BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; |
006f3a48 | 112 | void *fw_cfg; |
28ce5ce6 | 113 | void *dbdma; |
44654490 | 114 | uint8_t *vga_bios_ptr; |
46e50e9d | 115 | |
64201201 FB |
116 | linux_boot = (kernel_filename != NULL); |
117 | ||
c68ea704 | 118 | /* init CPUs */ |
94fc95cd | 119 | if (cpu_model == NULL) |
e6bd862b | 120 | cpu_model = "G4"; |
e9df014c | 121 | for (i = 0; i < smp_cpus; i++) { |
aaed909a FB |
122 | env = cpu_init(cpu_model); |
123 | if (!env) { | |
124 | fprintf(stderr, "Unable to find PowerPC CPU definition\n"); | |
125 | exit(1); | |
126 | } | |
e9df014c JM |
127 | /* Set time-base frequency to 100 Mhz */ |
128 | cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL); | |
3cbee15b | 129 | #if 0 |
e9df014c | 130 | env->osi_call = vga_osi_call; |
3cbee15b | 131 | #endif |
a08d4367 | 132 | qemu_register_reset(&cpu_ppc_reset, env); |
e9df014c JM |
133 | envs[i] = env; |
134 | } | |
c68ea704 | 135 | |
64201201 | 136 | /* allocate RAM */ |
864c136a BS |
137 | ram_offset = qemu_ram_alloc(ram_size); |
138 | cpu_register_physical_memory(0, ram_size, ram_offset); | |
139 | ||
64201201 | 140 | /* allocate and load BIOS */ |
864c136a | 141 | bios_offset = qemu_ram_alloc(BIOS_SIZE); |
1192dad8 | 142 | if (bios_name == NULL) |
006f3a48 | 143 | bios_name = PROM_FILENAME; |
5cea8590 | 144 | filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); |
006f3a48 BS |
145 | cpu_register_physical_memory(PROM_ADDR, BIOS_SIZE, bios_offset | IO_MEM_ROM); |
146 | ||
147 | /* Load OpenBIOS (ELF) */ | |
5cea8590 PB |
148 | if (filename) { |
149 | bios_size = load_elf(filename, 0, NULL, NULL, NULL); | |
150 | qemu_free(filename); | |
151 | } else { | |
152 | bios_size = -1; | |
153 | } | |
d5295253 | 154 | if (bios_size < 0 || bios_size > BIOS_SIZE) { |
5cea8590 | 155 | hw_error("qemu: could not load PowerPC bios '%s'\n", bios_name); |
64201201 FB |
156 | exit(1); |
157 | } | |
3b46e624 | 158 | |
d5295253 | 159 | /* allocate and load VGA BIOS */ |
864c136a | 160 | vga_bios_offset = qemu_ram_alloc(VGA_BIOS_SIZE); |
44654490 | 161 | vga_bios_ptr = qemu_get_ram_ptr(vga_bios_offset); |
5cea8590 PB |
162 | filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, VGABIOS_FILENAME); |
163 | if (filename) { | |
164 | vga_bios_size = load_image(filename, vga_bios_ptr + 8); | |
165 | qemu_free(filename); | |
166 | } else { | |
167 | vga_bios_size = -1; | |
168 | } | |
d5295253 FB |
169 | if (vga_bios_size < 0) { |
170 | /* if no bios is present, we can still work */ | |
5cea8590 PB |
171 | fprintf(stderr, "qemu: warning: could not load VGA bios '%s'\n", |
172 | VGABIOS_FILENAME); | |
d5295253 FB |
173 | vga_bios_size = 0; |
174 | } else { | |
175 | /* set a specific header (XXX: find real Apple format for NDRV | |
176 | drivers) */ | |
44654490 PB |
177 | vga_bios_ptr[0] = 'N'; |
178 | vga_bios_ptr[1] = 'D'; | |
179 | vga_bios_ptr[2] = 'R'; | |
180 | vga_bios_ptr[3] = 'V'; | |
181 | cpu_to_be32w((uint32_t *)(vga_bios_ptr + 4), vga_bios_size); | |
d5295253 | 182 | vga_bios_size += 8; |
a7b022e0 AG |
183 | |
184 | /* Round to page boundary */ | |
185 | vga_bios_size = (vga_bios_size + TARGET_PAGE_SIZE - 1) & | |
186 | TARGET_PAGE_MASK; | |
d5295253 | 187 | } |
3b46e624 | 188 | |
b6b8bd18 | 189 | if (linux_boot) { |
513f789f | 190 | uint64_t lowaddr = 0; |
b6b8bd18 | 191 | kernel_base = KERNEL_LOAD_ADDR; |
513f789f BS |
192 | |
193 | /* Now we can load the kernel. The first step tries to load the kernel | |
194 | supposing PhysAddr = 0x00000000. If that was wrong the kernel is | |
195 | loaded again, the new PhysAddr being computed from lowaddr. */ | |
196 | kernel_size = load_elf(kernel_filename, kernel_base, NULL, &lowaddr, NULL); | |
197 | if (kernel_size > 0 && lowaddr != KERNEL_LOAD_ADDR) { | |
198 | kernel_size = load_elf(kernel_filename, (2 * kernel_base) - lowaddr, | |
660f11be | 199 | NULL, NULL, NULL); |
513f789f BS |
200 | } |
201 | if (kernel_size < 0) | |
202 | kernel_size = load_aout(kernel_filename, kernel_base, | |
203 | ram_size - kernel_base); | |
204 | if (kernel_size < 0) | |
205 | kernel_size = load_image_targphys(kernel_filename, | |
206 | kernel_base, | |
207 | ram_size - kernel_base); | |
b6b8bd18 | 208 | if (kernel_size < 0) { |
2ac71179 | 209 | hw_error("qemu: could not load kernel '%s'\n", kernel_filename); |
b6b8bd18 FB |
210 | exit(1); |
211 | } | |
212 | /* load initrd */ | |
213 | if (initrd_filename) { | |
214 | initrd_base = INITRD_LOAD_ADDR; | |
44654490 PB |
215 | initrd_size = load_image_targphys(initrd_filename, initrd_base, |
216 | ram_size - initrd_base); | |
b6b8bd18 | 217 | if (initrd_size < 0) { |
2ac71179 PB |
218 | hw_error("qemu: could not load initial ram disk '%s'\n", |
219 | initrd_filename); | |
b6b8bd18 FB |
220 | exit(1); |
221 | } | |
222 | } else { | |
223 | initrd_base = 0; | |
224 | initrd_size = 0; | |
225 | } | |
6ac0e82d | 226 | ppc_boot_device = 'm'; |
b6b8bd18 FB |
227 | } else { |
228 | kernel_base = 0; | |
229 | kernel_size = 0; | |
230 | initrd_base = 0; | |
231 | initrd_size = 0; | |
28c5af54 JM |
232 | ppc_boot_device = '\0'; |
233 | /* We consider that NewWorld PowerMac never have any floppy drive | |
234 | * For now, OHW cannot boot from the network. | |
235 | */ | |
0d913fdb JM |
236 | for (i = 0; boot_device[i] != '\0'; i++) { |
237 | if (boot_device[i] >= 'c' && boot_device[i] <= 'f') { | |
238 | ppc_boot_device = boot_device[i]; | |
28c5af54 | 239 | break; |
0d913fdb | 240 | } |
28c5af54 JM |
241 | } |
242 | if (ppc_boot_device == '\0') { | |
243 | fprintf(stderr, "No valid boot device for Mac99 machine\n"); | |
244 | exit(1); | |
245 | } | |
b6b8bd18 | 246 | } |
0aa6a4a2 | 247 | |
3cbee15b | 248 | isa_mem_base = 0x80000000; |
aef445bd | 249 | |
3cbee15b JM |
250 | /* Register 8 MB of ISA IO space */ |
251 | isa_mmio_init(0xf2000000, 0x00800000); | |
3b46e624 | 252 | |
3cbee15b | 253 | /* UniN init */ |
1eed09cb | 254 | unin_memory = cpu_register_io_memory(unin_read, unin_write, NULL); |
3cbee15b | 255 | cpu_register_physical_memory(0xf8000000, 0x00001000, unin_memory); |
47103572 | 256 | |
3cbee15b JM |
257 | openpic_irqs = qemu_mallocz(smp_cpus * sizeof(qemu_irq *)); |
258 | openpic_irqs[0] = | |
259 | qemu_mallocz(smp_cpus * sizeof(qemu_irq) * OPENPIC_OUTPUT_NB); | |
260 | for (i = 0; i < smp_cpus; i++) { | |
261 | /* Mac99 IRQ connection between OpenPIC outputs pins | |
262 | * and PowerPC input pins | |
263 | */ | |
264 | switch (PPC_INPUT(env)) { | |
265 | case PPC_FLAGS_INPUT_6xx: | |
266 | openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB); | |
267 | openpic_irqs[i][OPENPIC_OUTPUT_INT] = | |
268 | ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT]; | |
269 | openpic_irqs[i][OPENPIC_OUTPUT_CINT] = | |
270 | ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT]; | |
271 | openpic_irqs[i][OPENPIC_OUTPUT_MCK] = | |
272 | ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_MCP]; | |
273 | /* Not connected ? */ | |
274 | openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL; | |
275 | /* Check this */ | |
276 | openpic_irqs[i][OPENPIC_OUTPUT_RESET] = | |
277 | ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET]; | |
278 | break; | |
00af685f | 279 | #if defined(TARGET_PPC64) |
3cbee15b JM |
280 | case PPC_FLAGS_INPUT_970: |
281 | openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB); | |
282 | openpic_irqs[i][OPENPIC_OUTPUT_INT] = | |
283 | ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT]; | |
284 | openpic_irqs[i][OPENPIC_OUTPUT_CINT] = | |
285 | ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT]; | |
286 | openpic_irqs[i][OPENPIC_OUTPUT_MCK] = | |
287 | ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_MCP]; | |
288 | /* Not connected ? */ | |
289 | openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL; | |
290 | /* Check this */ | |
291 | openpic_irqs[i][OPENPIC_OUTPUT_RESET] = | |
292 | ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET]; | |
293 | break; | |
00af685f | 294 | #endif /* defined(TARGET_PPC64) */ |
3cbee15b | 295 | default: |
2ac71179 | 296 | hw_error("Bus model not supported on mac99 machine\n"); |
3cbee15b | 297 | exit(1); |
0aa6a4a2 | 298 | } |
3cbee15b JM |
299 | } |
300 | pic = openpic_init(NULL, &pic_mem_index, smp_cpus, openpic_irqs, NULL); | |
301 | pci_bus = pci_pmac_init(pic); | |
302 | /* init basic PC hardware */ | |
fbe1b595 | 303 | pci_vga_init(pci_bus, vga_bios_offset, vga_bios_size); |
aae9366a | 304 | |
3cbee15b JM |
305 | /* XXX: suppress that */ |
306 | dummy_irq = i8259_init(NULL); | |
307 | ||
aeeb69c7 AJ |
308 | escc_mem_index = escc_init(0x80013000, dummy_irq[4], dummy_irq[5], |
309 | serial_hds[0], serial_hds[1], ESCC_CLOCK, 4); | |
cb457d76 AL |
310 | |
311 | for(i = 0; i < nb_nics; i++) | |
5607c388 | 312 | pci_nic_init(&nd_table[i], "ne2k_pci", NULL); |
cb457d76 | 313 | |
e4bcb14c TS |
314 | if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) { |
315 | fprintf(stderr, "qemu: too many IDE bus\n"); | |
316 | exit(1); | |
317 | } | |
318 | for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) { | |
751c6a17 GH |
319 | dinfo = drive_get(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS); |
320 | hd[i] = dinfo ? dinfo->bdrv : NULL; | |
e4bcb14c | 321 | } |
28ce5ce6 | 322 | dbdma = DBDMA_init(&dbdma_mem_index); |
77f0435e BS |
323 | pci_cmd646_ide_init(pci_bus, hd, 0); |
324 | ||
3cbee15b JM |
325 | /* cuda also initialize ADB */ |
326 | cuda_init(&cuda_mem_index, pic[0x19]); | |
aae9366a | 327 | |
3cbee15b JM |
328 | adb_kbd_init(&adb_bus); |
329 | adb_mouse_init(&adb_bus); | |
3b46e624 | 330 | |
3b46e624 | 331 | |
4ebcf884 | 332 | macio_init(pci_bus, PCI_DEVICE_ID_APPLE_UNI_N_KEYL, 0, pic_mem_index, |
77f0435e | 333 | dbdma_mem_index, cuda_mem_index, NULL, 0, NULL, |
4ebcf884 | 334 | escc_mem_index); |
0d92ed30 PB |
335 | |
336 | if (usb_enabled) { | |
e24ad6f1 | 337 | usb_ohci_init_pci(pci_bus, 3, -1); |
0d92ed30 PB |
338 | } |
339 | ||
b6b8bd18 FB |
340 | if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8) |
341 | graphic_depth = 15; | |
4f3f238b | 342 | |
3cbee15b | 343 | /* The NewWorld NVRAM is not located in the MacIO device */ |
68af3f24 | 344 | nvr = macio_nvram_init(&nvram_mem_index, 0x2000, 1); |
3cbee15b | 345 | pmac_format_nvram_partition(nvr, 0x2000); |
74e91155 | 346 | macio_nvram_map(nvr, 0xFFF04000); |
b6b8bd18 | 347 | /* No PCI init: the BIOS will do it */ |
0aa6a4a2 | 348 | |
006f3a48 BS |
349 | fw_cfg = fw_cfg_init(0, 0, CFG_ADDR, CFG_ADDR + 2); |
350 | fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1); | |
351 | fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size); | |
352 | fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, ARCH_MAC99); | |
513f789f BS |
353 | fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base); |
354 | fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size); | |
355 | if (kernel_cmdline) { | |
356 | fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, CMDLINE_ADDR); | |
357 | pstrcpy_targphys(CMDLINE_ADDR, TARGET_PAGE_SIZE, kernel_cmdline); | |
358 | } else { | |
359 | fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0); | |
360 | } | |
361 | fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base); | |
362 | fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size); | |
363 | fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device); | |
10696b4f BS |
364 | |
365 | fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_WIDTH, graphic_width); | |
366 | fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_HEIGHT, graphic_height); | |
367 | fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_DEPTH, graphic_depth); | |
368 | ||
513f789f | 369 | qemu_register_boot_set(fw_cfg_boot_set, fw_cfg); |
aae9366a | 370 | } |
0aa6a4a2 | 371 | |
f80f9ec9 | 372 | static QEMUMachine core99_machine = { |
4b32e168 AL |
373 | .name = "mac99", |
374 | .desc = "Mac99 based PowerMAC", | |
375 | .init = ppc_core99_init, | |
3d878caa | 376 | .max_cpus = MAX_CPUS, |
0aa6a4a2 | 377 | }; |
f80f9ec9 AL |
378 | |
379 | static void core99_machine_init(void) | |
380 | { | |
381 | qemu_register_machine(&core99_machine); | |
382 | } | |
383 | ||
384 | machine_init(core99_machine_init); |