[qemu.git] / hw / ppc_newworld.c

/*
 * QEMU PowerPC CHRP (currently NewWorld PowerMac) hardware System Emulator
 *
 * Copyright (c) 2004-2007 Fabrice Bellard
 * Copyright (c) 2007 Jocelyn Mayer
 *
 * Permission is hereby granted, free of charge, to any person obtaining a copy
 * of this software and associated documentation files (the "Software"), to deal
 * in the Software without restriction, including without limitation the rights
 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
 * copies of the Software, and to permit persons to whom the Software is
 * furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
 * THE SOFTWARE.
 */
#include "hw.h"
#include "ppc.h"
#include "ppc_mac.h"
#include "mac_dbdma.h"
#include "nvram.h"
#include "pc.h"
#include "pci.h"
#include "net.h"
#include "sysemu.h"
#include "boards.h"
#include "fw_cfg.h"
#include "escc.h"

#define MAX_IDE_BUS 2
#define VGA_BIOS_SIZE 65536
#define CFG_ADDR 0xf0000510

/* debug UniNorth */
//#define DEBUG_UNIN

#ifdef DEBUG_UNIN
#define UNIN_DPRINTF(fmt, args...) \
do { printf("UNIN: " fmt , ##args); } while (0)
#else
#define UNIN_DPRINTF(fmt, args...)
#endif

/* UniN device */
static void unin_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
{
    UNIN_DPRINTF("writel addr " TARGET_FMT_plx " val %x\n", addr, value);
}

static uint32_t unin_readl (void *opaque, target_phys_addr_t addr)
{
    uint32_t value;

    value = 0;
    UNIN_DPRINTF("readl addr " TARGET_FMT_plx " val %x\n", addr, value);

    return value;
}

static CPUWriteMemoryFunc *unin_write[] = {
    &unin_writel,
    &unin_writel,
    &unin_writel,
};

static CPUReadMemoryFunc *unin_read[] = {
    &unin_readl,
    &unin_readl,
    &unin_readl,
};

/* PowerPC Mac99 hardware initialisation */
static void ppc_core99_init (ram_addr_t ram_size, int vga_ram_size,
                             const char *boot_device,
                             const char *kernel_filename,
                             const char *kernel_cmdline,
                             const char *initrd_filename,
                             const char *cpu_model)
{
    CPUState *env = NULL, *envs[MAX_CPUS];
    char buf[1024];
    qemu_irq *pic, **openpic_irqs;
    int unin_memory;
    int linux_boot, i;
    ram_addr_t ram_offset, vga_ram_offset, bios_offset, vga_bios_offset;
    uint32_t kernel_base, kernel_size, initrd_base, initrd_size;
    PCIBus *pci_bus;
    MacIONVRAMState *nvr;
    int nvram_mem_index;
    int vga_bios_size, bios_size;
    qemu_irq *dummy_irq;
    int pic_mem_index, dbdma_mem_index, cuda_mem_index, escc_mem_index;
    int ppc_boot_device;
    int index;
    BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
    void *fw_cfg;
    void *dbdma;

    linux_boot = (kernel_filename != NULL);

    /* init CPUs */
    if (cpu_model == NULL)
        cpu_model = "G4";
    for (i = 0; i < smp_cpus; i++) {
        env = cpu_init(cpu_model);
        if (!env) {
            fprintf(stderr, "Unable to find PowerPC CPU definition\n");
            exit(1);
        }
        /* Set time-base frequency to 100 Mhz */
        cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL);
#if 0
        env->osi_call = vga_osi_call;
#endif
        qemu_register_reset(&cpu_ppc_reset, env);
        envs[i] = env;
    }

    /* allocate RAM */
    ram_offset = qemu_ram_alloc(ram_size);
    cpu_register_physical_memory(0, ram_size, ram_offset);

    /* allocate VGA RAM */
    vga_ram_offset = qemu_ram_alloc(vga_ram_size);

    /* allocate and load BIOS */
    bios_offset = qemu_ram_alloc(BIOS_SIZE);
    if (bios_name == NULL)
        bios_name = PROM_FILENAME;
    snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name);
    cpu_register_physical_memory(PROM_ADDR, BIOS_SIZE, bios_offset | IO_MEM_ROM);

    /* Load OpenBIOS (ELF) */
    bios_size = load_elf(buf, 0, NULL, NULL, NULL);
    if (bios_size < 0 || bios_size > BIOS_SIZE) {
        cpu_abort(env, "qemu: could not load PowerPC bios '%s'\n", buf);
        exit(1);
    }

    /* allocate and load VGA BIOS */
    vga_bios_offset = qemu_ram_alloc(VGA_BIOS_SIZE);
    snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
    vga_bios_size = load_image(buf, phys_ram_base + vga_bios_offset + 8);
    if (vga_bios_size < 0) {
        /* if no bios is present, we can still work */
        fprintf(stderr, "qemu: warning: could not load VGA bios '%s'\n", buf);
        vga_bios_size = 0;
    } else {
        /* set a specific header (XXX: find real Apple format for NDRV
           drivers) */
        phys_ram_base[vga_bios_offset] = 'N';
        phys_ram_base[vga_bios_offset + 1] = 'D';
        phys_ram_base[vga_bios_offset + 2] = 'R';
        phys_ram_base[vga_bios_offset + 3] = 'V';
        cpu_to_be32w((uint32_t *)(phys_ram_base + vga_bios_offset + 4),
                     vga_bios_size);
        vga_bios_size += 8;
    }

    if (linux_boot) {
        kernel_base = KERNEL_LOAD_ADDR;
        /* now we can load the kernel */
        kernel_size = load_image(kernel_filename, phys_ram_base + kernel_base);
        if (kernel_size < 0) {
            cpu_abort(env, "qemu: could not load kernel '%s'\n",
                      kernel_filename);
            exit(1);
        }
        /* load initrd */
        if (initrd_filename) {
            initrd_base = INITRD_LOAD_ADDR;
            initrd_size = load_image(initrd_filename,
                                     phys_ram_base + initrd_base);
            if (initrd_size < 0) {
                cpu_abort(env, "qemu: could not load initial ram disk '%s'\n",
                          initrd_filename);
                exit(1);
            }
        } else {
            initrd_base = 0;
            initrd_size = 0;
        }
        ppc_boot_device = 'm';
    } else {
        kernel_base = 0;
        kernel_size = 0;
        initrd_base = 0;
        initrd_size = 0;
        ppc_boot_device = '\0';
        /* We consider that NewWorld PowerMac never have any floppy drive
         * For now, OHW cannot boot from the network.
         */
        for (i = 0; boot_device[i] != '\0'; i++) {
            if (boot_device[i] >= 'c' && boot_device[i] <= 'f') {
                ppc_boot_device = boot_device[i];
                break;
            }
        }
        if (ppc_boot_device == '\0') {
            fprintf(stderr, "No valid boot device for Mac99 machine\n");
            exit(1);
        }
    }

    isa_mem_base = 0x80000000;

    /* Register 8 MB of ISA IO space */
    isa_mmio_init(0xf2000000, 0x00800000);

    /* UniN init */
    unin_memory = cpu_register_io_memory(0, unin_read, unin_write, NULL);
    cpu_register_physical_memory(0xf8000000, 0x00001000, unin_memory);

    openpic_irqs = qemu_mallocz(smp_cpus * sizeof(qemu_irq *));
    openpic_irqs[0] =
        qemu_mallocz(smp_cpus * sizeof(qemu_irq) * OPENPIC_OUTPUT_NB);
    for (i = 0; i < smp_cpus; i++) {
        /* Mac99 IRQ connection between OpenPIC outputs pins
         * and PowerPC input pins
         */
        switch (PPC_INPUT(env)) {
        case PPC_FLAGS_INPUT_6xx:
            openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
            openpic_irqs[i][OPENPIC_OUTPUT_INT] =
                ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
            openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
                ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
            openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
                ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_MCP];
            /* Not connected ? */
            openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
            /* Check this */
            openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
                ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET];
            break;
#if defined(TARGET_PPC64)
        case PPC_FLAGS_INPUT_970:
            openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
            openpic_irqs[i][OPENPIC_OUTPUT_INT] =
                ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
            openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
                ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
            openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
                ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_MCP];
            /* Not connected ? */
            openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
            /* Check this */
            openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
                ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET];
            break;
#endif /* defined(TARGET_PPC64) */
        default:
            cpu_abort(env, "Bus model not supported on mac99 machine\n");
            exit(1);
        }
    }
    pic = openpic_init(NULL, &pic_mem_index, smp_cpus, openpic_irqs, NULL);
    pci_bus = pci_pmac_init(pic);
    /* init basic PC hardware */
    pci_vga_init(pci_bus, phys_ram_base + vga_ram_offset,
                 vga_ram_offset, vga_ram_size,
                 vga_bios_offset, vga_bios_size);

    /* XXX: suppress that */
    dummy_irq = i8259_init(NULL);

    escc_mem_index = escc_init(0x80013000, dummy_irq[4], dummy_irq[5],
                               serial_hds[0], serial_hds[1], ESCC_CLOCK, 4);

    for(i = 0; i < nb_nics; i++)
        pci_nic_init(pci_bus, &nd_table[i], -1, "ne2k_pci");

    if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
        fprintf(stderr, "qemu: too many IDE bus\n");
        exit(1);
    }
    for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
        index = drive_get_index(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
        if (index != -1)
            hd[i] = drives_table[index].bdrv;
        else
            hd[i] = NULL;
    }
    dbdma = DBDMA_init(&dbdma_mem_index);
    pci_cmd646_ide_init(pci_bus, hd, 0);

    /* cuda also initialize ADB */
    cuda_init(&cuda_mem_index, pic[0x19]);

    adb_kbd_init(&adb_bus);
    adb_mouse_init(&adb_bus);


    macio_init(pci_bus, PCI_DEVICE_ID_APPLE_UNI_N_KEYL, 0, pic_mem_index,
               dbdma_mem_index, cuda_mem_index, NULL, 0, NULL,
               escc_mem_index);

    if (usb_enabled) {
        usb_ohci_init_pci(pci_bus, 3, -1);
    }

    if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)
        graphic_depth = 15;

    /* The NewWorld NVRAM is not located in the MacIO device */
    nvr = macio_nvram_init(&nvram_mem_index, 0x2000, 1);
    pmac_format_nvram_partition(nvr, 0x2000);
    macio_nvram_map(nvr, 0xFFF04000);
    /* No PCI init: the BIOS will do it */

    fw_cfg = fw_cfg_init(0, 0, CFG_ADDR, CFG_ADDR + 2);
    fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
    fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
    fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, ARCH_MAC99);
}

QEMUMachine core99_machine = {
    .name = "mac99",
    .desc = "Mac99 based PowerMAC",
    .init = ppc_core99_init,
    .ram_require = BIOS_SIZE + VGA_BIOS_SIZE + VGA_RAM_SIZE,
    .max_cpus = MAX_CPUS,
};
Commit	Line	Data
64201201	1	/*
3cbee15b	2	* QEMU PowerPC CHRP (currently NewWorld PowerMac) hardware System Emulator
5fafdf24	3	*
47103572	4	* Copyright (c) 2004-2007 Fabrice Bellard
3cbee15b	5	* Copyright (c) 2007 Jocelyn Mayer
5fafdf24	6	*
64201201 FB	7	* Permission is hereby granted, free of charge, to any person obtaining a copy
	8	* of this software and associated documentation files (the "Software"), to deal
	9	* in the Software without restriction, including without limitation the rights
	10	* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
	11	* copies of the Software, and to permit persons to whom the Software is
	12	* furnished to do so, subject to the following conditions:
	13	*
	14	* The above copyright notice and this permission notice shall be included in
	15	* all copies or substantial portions of the Software.
	16	*
	17	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	18	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	19	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	20	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
	21	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
	22	* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
	23	* THE SOFTWARE.
	24	*/
87ecb68b PB	25	#include "hw.h"
87ecb68b PB	26	#include "ppc.h"
3cbee15b	27	#include "ppc_mac.h"
28ce5ce6	28	#include "mac_dbdma.h"
87ecb68b PB	29	#include "nvram.h"
	30	#include "pc.h"
	31	#include "pci.h"
	32	#include "net.h"
	33	#include "sysemu.h"
	34	#include "boards.h"
006f3a48	35	#include "fw_cfg.h"
7fa9ae1a	36	#include "escc.h"
267002cd	37
e4bcb14c	38	#define MAX_IDE_BUS 2
864c136a	39	#define VGA_BIOS_SIZE 65536
006f3a48	40	#define CFG_ADDR 0xf0000510
e4bcb14c	41
f3902383 BS	42	/* debug UniNorth */
	43	//#define DEBUG_UNIN
	44
	45	#ifdef DEBUG_UNIN
	46	#define UNIN_DPRINTF(fmt, args...) \
	47	do { printf("UNIN: " fmt , ##args); } while (0)
	48	#else
	49	#define UNIN_DPRINTF(fmt, args...)
	50	#endif
	51
0aa6a4a2 FB	52	/* UniN device */
	53	static void unin_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
	54	{
f3902383	55	UNIN_DPRINTF("writel addr " TARGET_FMT_plx " val %x\n", addr, value);
0aa6a4a2 FB	56	}
	57
	58	static uint32_t unin_readl (void *opaque, target_phys_addr_t addr)
	59	{
f3902383 BS	60	uint32_t value;
	61
	62	value = 0;
	63	UNIN_DPRINTF("readl addr " TARGET_FMT_plx " val %x\n", addr, value);
	64
	65	return value;
0aa6a4a2 FB	66	}
	67
	68	static CPUWriteMemoryFunc *unin_write[] = {
	69	&unin_writel,
	70	&unin_writel,
	71	&unin_writel,
	72	};
	73
	74	static CPUReadMemoryFunc *unin_read[] = {
	75	&unin_readl,
	76	&unin_readl,
	77	&unin_readl,
	78	};
	79
3cbee15b	80	/* PowerPC Mac99 hardware initialisation */
00f82b8a	81	static void ppc_core99_init (ram_addr_t ram_size, int vga_ram_size,
3023f332	82	const char *boot_device,
3cbee15b JM	83	const char *kernel_filename,
	84	const char *kernel_cmdline,
	85	const char *initrd_filename,
	86	const char *cpu_model)
64201201	87	{
aaed909a	88	CPUState env = NULL, envs[MAX_CPUS];
64201201	89	char buf[1024];
e9df014c	90	qemu_irq pic, *openpic_irqs;
aef445bd	91	int unin_memory;
d5295253	92	int linux_boot, i;
864c136a	93	ram_addr_t ram_offset, vga_ram_offset, bios_offset, vga_bios_offset;
b6b8bd18	94	uint32_t kernel_base, kernel_size, initrd_base, initrd_size;
46e50e9d	95	PCIBus *pci_bus;
3cbee15b JM	96	MacIONVRAMState *nvr;
3cbee15b JM	97	int nvram_mem_index;
d5295253	98	int vga_bios_size, bios_size;
d537cf6c	99	qemu_irq *dummy_irq;
7fa9ae1a	100	int pic_mem_index, dbdma_mem_index, cuda_mem_index, escc_mem_index;
28c5af54	101	int ppc_boot_device;
e4bcb14c TS	102	int index;
e4bcb14c TS	103	BlockDriverState hd[MAX_IDE_BUS MAX_IDE_DEVS];
006f3a48	104	void *fw_cfg;
28ce5ce6	105	void *dbdma;
46e50e9d	106
64201201 FB	107	linux_boot = (kernel_filename != NULL);
64201201 FB	108
c68ea704	109	/* init CPUs */
94fc95cd	110	if (cpu_model == NULL)
e6bd862b	111	cpu_model = "G4";
e9df014c	112	for (i = 0; i < smp_cpus; i++) {
aaed909a FB	113	env = cpu_init(cpu_model);
	114	if (!env) {
	115	fprintf(stderr, "Unable to find PowerPC CPU definition\n");
	116	exit(1);
	117	}
e9df014c JM	118	/* Set time-base frequency to 100 Mhz */
e9df014c JM	119	cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL);
3cbee15b	120	#if 0
e9df014c	121	env->osi_call = vga_osi_call;
3cbee15b	122	#endif
fe33cc71	123	qemu_register_reset(&cpu_ppc_reset, env);
e9df014c JM	124	envs[i] = env;
e9df014c JM	125	}
c68ea704	126
64201201	127	/* allocate RAM */
864c136a BS	128	ram_offset = qemu_ram_alloc(ram_size);
	129	cpu_register_physical_memory(0, ram_size, ram_offset);
	130
	131	/* allocate VGA RAM */
	132	vga_ram_offset = qemu_ram_alloc(vga_ram_size);
64201201 FB	133
64201201 FB	134	/* allocate and load BIOS */
864c136a	135	bios_offset = qemu_ram_alloc(BIOS_SIZE);
1192dad8	136	if (bios_name == NULL)
006f3a48	137	bios_name = PROM_FILENAME;
1192dad8	138	snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name);
006f3a48 BS	139	cpu_register_physical_memory(PROM_ADDR, BIOS_SIZE, bios_offset \| IO_MEM_ROM);
	140
	141	/* Load OpenBIOS (ELF) */
	142	bios_size = load_elf(buf, 0, NULL, NULL, NULL);
d5295253	143	if (bios_size < 0 \|\| bios_size > BIOS_SIZE) {
4a057712	144	cpu_abort(env, "qemu: could not load PowerPC bios '%s'\n", buf);
64201201 FB	145	exit(1);
64201201 FB	146	}
3b46e624	147
d5295253	148	/* allocate and load VGA BIOS */
864c136a	149	vga_bios_offset = qemu_ram_alloc(VGA_BIOS_SIZE);
d5295253 FB	150	snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
	151	vga_bios_size = load_image(buf, phys_ram_base + vga_bios_offset + 8);
	152	if (vga_bios_size < 0) {
	153	/* if no bios is present, we can still work */
	154	fprintf(stderr, "qemu: warning: could not load VGA bios '%s'\n", buf);
	155	vga_bios_size = 0;
	156	} else {
	157	/* set a specific header (XXX: find real Apple format for NDRV
	158	drivers) */
	159	phys_ram_base[vga_bios_offset] = 'N';
	160	phys_ram_base[vga_bios_offset + 1] = 'D';
	161	phys_ram_base[vga_bios_offset + 2] = 'R';
	162	phys_ram_base[vga_bios_offset + 3] = 'V';
5fafdf24	163	cpu_to_be32w((uint32_t *)(phys_ram_base + vga_bios_offset + 4),
d5295253 FB	164	vga_bios_size);
	165	vga_bios_size += 8;
	166	}
3b46e624	167
b6b8bd18 FB	168	if (linux_boot) {
	169	kernel_base = KERNEL_LOAD_ADDR;
	170	/* now we can load the kernel */
	171	kernel_size = load_image(kernel_filename, phys_ram_base + kernel_base);
	172	if (kernel_size < 0) {
4a057712 JM	173	cpu_abort(env, "qemu: could not load kernel '%s'\n",
4a057712 JM	174	kernel_filename);
b6b8bd18 FB	175	exit(1);
	176	}
	177	/* load initrd */
	178	if (initrd_filename) {
	179	initrd_base = INITRD_LOAD_ADDR;
	180	initrd_size = load_image(initrd_filename,
	181	phys_ram_base + initrd_base);
	182	if (initrd_size < 0) {
4a057712 JM	183	cpu_abort(env, "qemu: could not load initial ram disk '%s'\n",
4a057712 JM	184	initrd_filename);
b6b8bd18 FB	185	exit(1);
	186	}
	187	} else {
	188	initrd_base = 0;
	189	initrd_size = 0;
	190	}
6ac0e82d	191	ppc_boot_device = 'm';
b6b8bd18 FB	192	} else {
	193	kernel_base = 0;
	194	kernel_size = 0;
	195	initrd_base = 0;
	196	initrd_size = 0;
28c5af54 JM	197	ppc_boot_device = '\0';
	198	/* We consider that NewWorld PowerMac never have any floppy drive
	199	* For now, OHW cannot boot from the network.
	200	*/
0d913fdb JM	201	for (i = 0; boot_device[i] != '\0'; i++) {
	202	if (boot_device[i] >= 'c' && boot_device[i] <= 'f') {
	203	ppc_boot_device = boot_device[i];
28c5af54	204	break;
0d913fdb	205	}
28c5af54 JM	206	}
	207	if (ppc_boot_device == '\0') {
	208	fprintf(stderr, "No valid boot device for Mac99 machine\n");
	209	exit(1);
	210	}
b6b8bd18	211	}
0aa6a4a2	212
3cbee15b	213	isa_mem_base = 0x80000000;
aef445bd	214
3cbee15b JM	215	/* Register 8 MB of ISA IO space */
3cbee15b JM	216	isa_mmio_init(0xf2000000, 0x00800000);
3b46e624	217
3cbee15b JM	218	/* UniN init */
	219	unin_memory = cpu_register_io_memory(0, unin_read, unin_write, NULL);
	220	cpu_register_physical_memory(0xf8000000, 0x00001000, unin_memory);
47103572	221
3cbee15b JM	222	openpic_irqs = qemu_mallocz(smp_cpus * sizeof(qemu_irq *));
	223	openpic_irqs[0] =
	224	qemu_mallocz(smp_cpus * sizeof(qemu_irq) * OPENPIC_OUTPUT_NB);
	225	for (i = 0; i < smp_cpus; i++) {
	226	/* Mac99 IRQ connection between OpenPIC outputs pins
	227	* and PowerPC input pins
	228	*/
	229	switch (PPC_INPUT(env)) {
	230	case PPC_FLAGS_INPUT_6xx:
	231	openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
	232	openpic_irqs[i][OPENPIC_OUTPUT_INT] =
	233	((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
	234	openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
	235	((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
	236	openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
	237	((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_MCP];
	238	/* Not connected ? */
	239	openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
	240	/* Check this */
	241	openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
	242	((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET];
	243	break;
00af685f	244	#if defined(TARGET_PPC64)
3cbee15b JM	245	case PPC_FLAGS_INPUT_970:
	246	openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
	247	openpic_irqs[i][OPENPIC_OUTPUT_INT] =
	248	((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
	249	openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
	250	((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
	251	openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
	252	((qemu_irq *)env->irq_inputs)[PPC970_INPUT_MCP];
	253	/* Not connected ? */
	254	openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
	255	/* Check this */
	256	openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
	257	((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET];
	258	break;
00af685f	259	#endif /* defined(TARGET_PPC64) */
3cbee15b JM	260	default:
	261	cpu_abort(env, "Bus model not supported on mac99 machine\n");
	262	exit(1);
0aa6a4a2	263	}
3cbee15b JM	264	}
	265	pic = openpic_init(NULL, &pic_mem_index, smp_cpus, openpic_irqs, NULL);
	266	pci_bus = pci_pmac_init(pic);
	267	/* init basic PC hardware */
0a645949 BS	268	pci_vga_init(pci_bus, phys_ram_base + vga_ram_offset,
0a645949 BS	269	vga_ram_offset, vga_ram_size,
3cbee15b	270	vga_bios_offset, vga_bios_size);
aae9366a	271
3cbee15b JM	272	/* XXX: suppress that */
	273	dummy_irq = i8259_init(NULL);
	274
aeeb69c7 AJ	275	escc_mem_index = escc_init(0x80013000, dummy_irq[4], dummy_irq[5],
aeeb69c7 AJ	276	serial_hds[0], serial_hds[1], ESCC_CLOCK, 4);
cb457d76 AL	277
	278	for(i = 0; i < nb_nics; i++)
	279	pci_nic_init(pci_bus, &nd_table[i], -1, "ne2k_pci");
	280
e4bcb14c TS	281	if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
	282	fprintf(stderr, "qemu: too many IDE bus\n");
	283	exit(1);
	284	}
	285	for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
	286	index = drive_get_index(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
	287	if (index != -1)
	288	hd[i] = drives_table[index].bdrv;
	289	else
	290	hd[i] = NULL;
	291	}
28ce5ce6	292	dbdma = DBDMA_init(&dbdma_mem_index);
77f0435e BS	293	pci_cmd646_ide_init(pci_bus, hd, 0);
77f0435e BS	294
3cbee15b JM	295	/* cuda also initialize ADB */
3cbee15b JM	296	cuda_init(&cuda_mem_index, pic[0x19]);
aae9366a	297
3cbee15b JM	298	adb_kbd_init(&adb_bus);
3cbee15b JM	299	adb_mouse_init(&adb_bus);
3b46e624	300
3b46e624	301
4ebcf884	302	macio_init(pci_bus, PCI_DEVICE_ID_APPLE_UNI_N_KEYL, 0, pic_mem_index,
77f0435e	303	dbdma_mem_index, cuda_mem_index, NULL, 0, NULL,
4ebcf884	304	escc_mem_index);
0d92ed30 PB	305
0d92ed30 PB	306	if (usb_enabled) {
e24ad6f1	307	usb_ohci_init_pci(pci_bus, 3, -1);
0d92ed30 PB	308	}
0d92ed30 PB	309
b6b8bd18 FB	310	if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)
b6b8bd18 FB	311	graphic_depth = 15;
4f3f238b	312
3cbee15b	313	/* The NewWorld NVRAM is not located in the MacIO device */
68af3f24	314	nvr = macio_nvram_init(&nvram_mem_index, 0x2000, 1);
3cbee15b	315	pmac_format_nvram_partition(nvr, 0x2000);
74e91155	316	macio_nvram_map(nvr, 0xFFF04000);
b6b8bd18	317	/* No PCI init: the BIOS will do it */
0aa6a4a2	318
006f3a48 BS	319	fw_cfg = fw_cfg_init(0, 0, CFG_ADDR, CFG_ADDR + 2);
	320	fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
	321	fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
	322	fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, ARCH_MAC99);
aae9366a	323	}
0aa6a4a2 FB	324
0aa6a4a2 FB	325	QEMUMachine core99_machine = {
4b32e168 AL	326	.name = "mac99",
	327	.desc = "Mac99 based PowerMAC",
	328	.init = ppc_core99_init,
864c136a	329	.ram_require = BIOS_SIZE + VGA_BIOS_SIZE + VGA_RAM_SIZE,
3d878caa	330	.max_cpus = MAX_CPUS,
0aa6a4a2	331	};