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Commit | Line | Data |
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64201201 | 1 | /* |
3cbee15b | 2 | * QEMU PowerPC CHRP (currently NewWorld PowerMac) hardware System Emulator |
5fafdf24 | 3 | * |
47103572 | 4 | * Copyright (c) 2004-2007 Fabrice Bellard |
3cbee15b | 5 | * Copyright (c) 2007 Jocelyn Mayer |
5fafdf24 | 6 | * |
64201201 FB |
7 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
8 | * of this software and associated documentation files (the "Software"), to deal | |
9 | * in the Software without restriction, including without limitation the rights | |
10 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
11 | * copies of the Software, and to permit persons to whom the Software is | |
12 | * furnished to do so, subject to the following conditions: | |
13 | * | |
14 | * The above copyright notice and this permission notice shall be included in | |
15 | * all copies or substantial portions of the Software. | |
16 | * | |
17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
19 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
20 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
21 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
22 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
23 | * THE SOFTWARE. | |
24 | */ | |
87ecb68b PB |
25 | #include "hw.h" |
26 | #include "ppc.h" | |
3cbee15b | 27 | #include "ppc_mac.h" |
28ce5ce6 | 28 | #include "mac_dbdma.h" |
87ecb68b PB |
29 | #include "nvram.h" |
30 | #include "pc.h" | |
31 | #include "pci.h" | |
18e08a55 | 32 | #include "usb-ohci.h" |
87ecb68b PB |
33 | #include "net.h" |
34 | #include "sysemu.h" | |
35 | #include "boards.h" | |
006f3a48 | 36 | #include "fw_cfg.h" |
7fa9ae1a | 37 | #include "escc.h" |
b7169916 | 38 | #include "openpic.h" |
977e1244 | 39 | #include "ide.h" |
ca20cf32 BS |
40 | #include "loader.h" |
41 | #include "elf.h" | |
dc702288 | 42 | #include "kvm.h" |
267002cd | 43 | |
e4bcb14c | 44 | #define MAX_IDE_BUS 2 |
864c136a | 45 | #define VGA_BIOS_SIZE 65536 |
006f3a48 | 46 | #define CFG_ADDR 0xf0000510 |
e4bcb14c | 47 | |
f3902383 BS |
48 | /* debug UniNorth */ |
49 | //#define DEBUG_UNIN | |
50 | ||
51 | #ifdef DEBUG_UNIN | |
001faf32 BS |
52 | #define UNIN_DPRINTF(fmt, ...) \ |
53 | do { printf("UNIN: " fmt , ## __VA_ARGS__); } while (0) | |
f3902383 | 54 | #else |
001faf32 | 55 | #define UNIN_DPRINTF(fmt, ...) |
f3902383 BS |
56 | #endif |
57 | ||
0aa6a4a2 | 58 | /* UniN device */ |
c227f099 | 59 | static void unin_writel (void *opaque, target_phys_addr_t addr, uint32_t value) |
0aa6a4a2 | 60 | { |
f3902383 | 61 | UNIN_DPRINTF("writel addr " TARGET_FMT_plx " val %x\n", addr, value); |
0aa6a4a2 FB |
62 | } |
63 | ||
c227f099 | 64 | static uint32_t unin_readl (void *opaque, target_phys_addr_t addr) |
0aa6a4a2 | 65 | { |
f3902383 BS |
66 | uint32_t value; |
67 | ||
68 | value = 0; | |
69 | UNIN_DPRINTF("readl addr " TARGET_FMT_plx " val %x\n", addr, value); | |
70 | ||
71 | return value; | |
0aa6a4a2 FB |
72 | } |
73 | ||
d60efc6b | 74 | static CPUWriteMemoryFunc * const unin_write[] = { |
0aa6a4a2 FB |
75 | &unin_writel, |
76 | &unin_writel, | |
77 | &unin_writel, | |
78 | }; | |
79 | ||
d60efc6b | 80 | static CPUReadMemoryFunc * const unin_read[] = { |
0aa6a4a2 FB |
81 | &unin_readl, |
82 | &unin_readl, | |
83 | &unin_readl, | |
84 | }; | |
85 | ||
513f789f BS |
86 | static int fw_cfg_boot_set(void *opaque, const char *boot_device) |
87 | { | |
88 | fw_cfg_add_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]); | |
89 | return 0; | |
90 | } | |
91 | ||
3cbee15b | 92 | /* PowerPC Mac99 hardware initialisation */ |
c227f099 | 93 | static void ppc_core99_init (ram_addr_t ram_size, |
3023f332 | 94 | const char *boot_device, |
3cbee15b JM |
95 | const char *kernel_filename, |
96 | const char *kernel_cmdline, | |
97 | const char *initrd_filename, | |
98 | const char *cpu_model) | |
64201201 | 99 | { |
aaed909a | 100 | CPUState *env = NULL, *envs[MAX_CPUS]; |
5cea8590 | 101 | char *filename; |
e9df014c | 102 | qemu_irq *pic, **openpic_irqs; |
aef445bd | 103 | int unin_memory; |
d5295253 | 104 | int linux_boot, i; |
c227f099 | 105 | ram_addr_t ram_offset, bios_offset, vga_bios_offset; |
b6b8bd18 | 106 | uint32_t kernel_base, kernel_size, initrd_base, initrd_size; |
46e50e9d | 107 | PCIBus *pci_bus; |
3cbee15b JM |
108 | MacIONVRAMState *nvr; |
109 | int nvram_mem_index; | |
d5295253 | 110 | int vga_bios_size, bios_size; |
7fa9ae1a | 111 | int pic_mem_index, dbdma_mem_index, cuda_mem_index, escc_mem_index; |
28c5af54 | 112 | int ppc_boot_device; |
f455e98c | 113 | DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; |
006f3a48 | 114 | void *fw_cfg; |
28ce5ce6 | 115 | void *dbdma; |
44654490 | 116 | uint8_t *vga_bios_ptr; |
46e50e9d | 117 | |
64201201 FB |
118 | linux_boot = (kernel_filename != NULL); |
119 | ||
c68ea704 | 120 | /* init CPUs */ |
94fc95cd | 121 | if (cpu_model == NULL) |
46214a27 AF |
122 | #ifdef TARGET_PPC64 |
123 | cpu_model = "970fx"; | |
124 | #else | |
e6bd862b | 125 | cpu_model = "G4"; |
46214a27 | 126 | #endif |
e9df014c | 127 | for (i = 0; i < smp_cpus; i++) { |
aaed909a FB |
128 | env = cpu_init(cpu_model); |
129 | if (!env) { | |
130 | fprintf(stderr, "Unable to find PowerPC CPU definition\n"); | |
131 | exit(1); | |
132 | } | |
e9df014c JM |
133 | /* Set time-base frequency to 100 Mhz */ |
134 | cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL); | |
3cbee15b | 135 | #if 0 |
e9df014c | 136 | env->osi_call = vga_osi_call; |
3cbee15b | 137 | #endif |
d84bda46 | 138 | qemu_register_reset((QEMUResetHandler*)&cpu_reset, env); |
e9df014c JM |
139 | envs[i] = env; |
140 | } | |
c68ea704 | 141 | |
dc702288 AG |
142 | /* Make sure all register sets take effect */ |
143 | cpu_synchronize_state(env); | |
144 | ||
64201201 | 145 | /* allocate RAM */ |
864c136a BS |
146 | ram_offset = qemu_ram_alloc(ram_size); |
147 | cpu_register_physical_memory(0, ram_size, ram_offset); | |
148 | ||
64201201 | 149 | /* allocate and load BIOS */ |
864c136a | 150 | bios_offset = qemu_ram_alloc(BIOS_SIZE); |
1192dad8 | 151 | if (bios_name == NULL) |
006f3a48 | 152 | bios_name = PROM_FILENAME; |
5cea8590 | 153 | filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); |
006f3a48 BS |
154 | cpu_register_physical_memory(PROM_ADDR, BIOS_SIZE, bios_offset | IO_MEM_ROM); |
155 | ||
156 | /* Load OpenBIOS (ELF) */ | |
5cea8590 | 157 | if (filename) { |
ca20cf32 BS |
158 | bios_size = load_elf(filename, 0, NULL, NULL, NULL, 1, ELF_MACHINE, 0); |
159 | ||
5cea8590 PB |
160 | qemu_free(filename); |
161 | } else { | |
162 | bios_size = -1; | |
163 | } | |
d5295253 | 164 | if (bios_size < 0 || bios_size > BIOS_SIZE) { |
5cea8590 | 165 | hw_error("qemu: could not load PowerPC bios '%s'\n", bios_name); |
64201201 FB |
166 | exit(1); |
167 | } | |
3b46e624 | 168 | |
d5295253 | 169 | /* allocate and load VGA BIOS */ |
864c136a | 170 | vga_bios_offset = qemu_ram_alloc(VGA_BIOS_SIZE); |
44654490 | 171 | vga_bios_ptr = qemu_get_ram_ptr(vga_bios_offset); |
5cea8590 PB |
172 | filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, VGABIOS_FILENAME); |
173 | if (filename) { | |
174 | vga_bios_size = load_image(filename, vga_bios_ptr + 8); | |
175 | qemu_free(filename); | |
176 | } else { | |
177 | vga_bios_size = -1; | |
178 | } | |
d5295253 FB |
179 | if (vga_bios_size < 0) { |
180 | /* if no bios is present, we can still work */ | |
5cea8590 PB |
181 | fprintf(stderr, "qemu: warning: could not load VGA bios '%s'\n", |
182 | VGABIOS_FILENAME); | |
d5295253 FB |
183 | vga_bios_size = 0; |
184 | } else { | |
185 | /* set a specific header (XXX: find real Apple format for NDRV | |
186 | drivers) */ | |
44654490 PB |
187 | vga_bios_ptr[0] = 'N'; |
188 | vga_bios_ptr[1] = 'D'; | |
189 | vga_bios_ptr[2] = 'R'; | |
190 | vga_bios_ptr[3] = 'V'; | |
191 | cpu_to_be32w((uint32_t *)(vga_bios_ptr + 4), vga_bios_size); | |
d5295253 | 192 | vga_bios_size += 8; |
a7b022e0 AG |
193 | |
194 | /* Round to page boundary */ | |
195 | vga_bios_size = (vga_bios_size + TARGET_PAGE_SIZE - 1) & | |
196 | TARGET_PAGE_MASK; | |
d5295253 | 197 | } |
3b46e624 | 198 | |
b6b8bd18 | 199 | if (linux_boot) { |
513f789f | 200 | uint64_t lowaddr = 0; |
ca20cf32 BS |
201 | int bswap_needed; |
202 | ||
203 | #ifdef BSWAP_NEEDED | |
204 | bswap_needed = 1; | |
205 | #else | |
206 | bswap_needed = 0; | |
207 | #endif | |
b6b8bd18 | 208 | kernel_base = KERNEL_LOAD_ADDR; |
513f789f BS |
209 | |
210 | /* Now we can load the kernel. The first step tries to load the kernel | |
211 | supposing PhysAddr = 0x00000000. If that was wrong the kernel is | |
212 | loaded again, the new PhysAddr being computed from lowaddr. */ | |
ca20cf32 BS |
213 | kernel_size = load_elf(kernel_filename, kernel_base, NULL, &lowaddr, NULL, |
214 | 1, ELF_MACHINE, 0); | |
513f789f BS |
215 | if (kernel_size > 0 && lowaddr != KERNEL_LOAD_ADDR) { |
216 | kernel_size = load_elf(kernel_filename, (2 * kernel_base) - lowaddr, | |
ca20cf32 | 217 | NULL, NULL, NULL, 1, ELF_MACHINE, 0); |
513f789f BS |
218 | } |
219 | if (kernel_size < 0) | |
220 | kernel_size = load_aout(kernel_filename, kernel_base, | |
ca20cf32 BS |
221 | ram_size - kernel_base, bswap_needed, |
222 | TARGET_PAGE_SIZE); | |
513f789f BS |
223 | if (kernel_size < 0) |
224 | kernel_size = load_image_targphys(kernel_filename, | |
225 | kernel_base, | |
226 | ram_size - kernel_base); | |
b6b8bd18 | 227 | if (kernel_size < 0) { |
2ac71179 | 228 | hw_error("qemu: could not load kernel '%s'\n", kernel_filename); |
b6b8bd18 FB |
229 | exit(1); |
230 | } | |
231 | /* load initrd */ | |
232 | if (initrd_filename) { | |
233 | initrd_base = INITRD_LOAD_ADDR; | |
44654490 PB |
234 | initrd_size = load_image_targphys(initrd_filename, initrd_base, |
235 | ram_size - initrd_base); | |
b6b8bd18 | 236 | if (initrd_size < 0) { |
2ac71179 PB |
237 | hw_error("qemu: could not load initial ram disk '%s'\n", |
238 | initrd_filename); | |
b6b8bd18 FB |
239 | exit(1); |
240 | } | |
241 | } else { | |
242 | initrd_base = 0; | |
243 | initrd_size = 0; | |
244 | } | |
6ac0e82d | 245 | ppc_boot_device = 'm'; |
b6b8bd18 FB |
246 | } else { |
247 | kernel_base = 0; | |
248 | kernel_size = 0; | |
249 | initrd_base = 0; | |
250 | initrd_size = 0; | |
28c5af54 JM |
251 | ppc_boot_device = '\0'; |
252 | /* We consider that NewWorld PowerMac never have any floppy drive | |
253 | * For now, OHW cannot boot from the network. | |
254 | */ | |
0d913fdb JM |
255 | for (i = 0; boot_device[i] != '\0'; i++) { |
256 | if (boot_device[i] >= 'c' && boot_device[i] <= 'f') { | |
257 | ppc_boot_device = boot_device[i]; | |
28c5af54 | 258 | break; |
0d913fdb | 259 | } |
28c5af54 JM |
260 | } |
261 | if (ppc_boot_device == '\0') { | |
262 | fprintf(stderr, "No valid boot device for Mac99 machine\n"); | |
263 | exit(1); | |
264 | } | |
b6b8bd18 | 265 | } |
0aa6a4a2 | 266 | |
3cbee15b | 267 | isa_mem_base = 0x80000000; |
aef445bd | 268 | |
3cbee15b JM |
269 | /* Register 8 MB of ISA IO space */ |
270 | isa_mmio_init(0xf2000000, 0x00800000); | |
3b46e624 | 271 | |
3cbee15b | 272 | /* UniN init */ |
1eed09cb | 273 | unin_memory = cpu_register_io_memory(unin_read, unin_write, NULL); |
3cbee15b | 274 | cpu_register_physical_memory(0xf8000000, 0x00001000, unin_memory); |
47103572 | 275 | |
3cbee15b JM |
276 | openpic_irqs = qemu_mallocz(smp_cpus * sizeof(qemu_irq *)); |
277 | openpic_irqs[0] = | |
278 | qemu_mallocz(smp_cpus * sizeof(qemu_irq) * OPENPIC_OUTPUT_NB); | |
279 | for (i = 0; i < smp_cpus; i++) { | |
280 | /* Mac99 IRQ connection between OpenPIC outputs pins | |
281 | * and PowerPC input pins | |
282 | */ | |
283 | switch (PPC_INPUT(env)) { | |
284 | case PPC_FLAGS_INPUT_6xx: | |
285 | openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB); | |
286 | openpic_irqs[i][OPENPIC_OUTPUT_INT] = | |
287 | ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT]; | |
288 | openpic_irqs[i][OPENPIC_OUTPUT_CINT] = | |
289 | ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT]; | |
290 | openpic_irqs[i][OPENPIC_OUTPUT_MCK] = | |
291 | ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_MCP]; | |
292 | /* Not connected ? */ | |
293 | openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL; | |
294 | /* Check this */ | |
295 | openpic_irqs[i][OPENPIC_OUTPUT_RESET] = | |
296 | ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET]; | |
297 | break; | |
00af685f | 298 | #if defined(TARGET_PPC64) |
3cbee15b JM |
299 | case PPC_FLAGS_INPUT_970: |
300 | openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB); | |
301 | openpic_irqs[i][OPENPIC_OUTPUT_INT] = | |
302 | ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT]; | |
303 | openpic_irqs[i][OPENPIC_OUTPUT_CINT] = | |
304 | ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT]; | |
305 | openpic_irqs[i][OPENPIC_OUTPUT_MCK] = | |
306 | ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_MCP]; | |
307 | /* Not connected ? */ | |
308 | openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL; | |
309 | /* Check this */ | |
310 | openpic_irqs[i][OPENPIC_OUTPUT_RESET] = | |
311 | ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET]; | |
312 | break; | |
00af685f | 313 | #endif /* defined(TARGET_PPC64) */ |
3cbee15b | 314 | default: |
2ac71179 | 315 | hw_error("Bus model not supported on mac99 machine\n"); |
3cbee15b | 316 | exit(1); |
0aa6a4a2 | 317 | } |
3cbee15b JM |
318 | } |
319 | pic = openpic_init(NULL, &pic_mem_index, smp_cpus, openpic_irqs, NULL); | |
320 | pci_bus = pci_pmac_init(pic); | |
321 | /* init basic PC hardware */ | |
fbe1b595 | 322 | pci_vga_init(pci_bus, vga_bios_offset, vga_bios_size); |
aae9366a | 323 | |
b4b784fe | 324 | escc_mem_index = escc_init(0x80013000, pic[0x25], pic[0x24], |
aeeb69c7 | 325 | serial_hds[0], serial_hds[1], ESCC_CLOCK, 4); |
cb457d76 AL |
326 | |
327 | for(i = 0; i < nb_nics; i++) | |
07caea31 | 328 | pci_nic_init_nofail(&nd_table[i], "ne2k_pci", NULL); |
cb457d76 | 329 | |
e4bcb14c TS |
330 | if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) { |
331 | fprintf(stderr, "qemu: too many IDE bus\n"); | |
332 | exit(1); | |
333 | } | |
334 | for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) { | |
f455e98c | 335 | hd[i] = drive_get(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS); |
e4bcb14c | 336 | } |
28ce5ce6 | 337 | dbdma = DBDMA_init(&dbdma_mem_index); |
77f0435e BS |
338 | pci_cmd646_ide_init(pci_bus, hd, 0); |
339 | ||
3cbee15b JM |
340 | /* cuda also initialize ADB */ |
341 | cuda_init(&cuda_mem_index, pic[0x19]); | |
aae9366a | 342 | |
3cbee15b JM |
343 | adb_kbd_init(&adb_bus); |
344 | adb_mouse_init(&adb_bus); | |
3b46e624 | 345 | |
3b46e624 | 346 | |
4ebcf884 | 347 | macio_init(pci_bus, PCI_DEVICE_ID_APPLE_UNI_N_KEYL, 0, pic_mem_index, |
77f0435e | 348 | dbdma_mem_index, cuda_mem_index, NULL, 0, NULL, |
4ebcf884 | 349 | escc_mem_index); |
0d92ed30 PB |
350 | |
351 | if (usb_enabled) { | |
5b19d9a2 | 352 | usb_ohci_init_pci(pci_bus, -1); |
0d92ed30 PB |
353 | } |
354 | ||
b6b8bd18 FB |
355 | if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8) |
356 | graphic_depth = 15; | |
4f3f238b | 357 | |
3cbee15b | 358 | /* The NewWorld NVRAM is not located in the MacIO device */ |
68af3f24 | 359 | nvr = macio_nvram_init(&nvram_mem_index, 0x2000, 1); |
3cbee15b | 360 | pmac_format_nvram_partition(nvr, 0x2000); |
74e91155 | 361 | macio_nvram_map(nvr, 0xFFF04000); |
b6b8bd18 | 362 | /* No PCI init: the BIOS will do it */ |
0aa6a4a2 | 363 | |
006f3a48 BS |
364 | fw_cfg = fw_cfg_init(0, 0, CFG_ADDR, CFG_ADDR + 2); |
365 | fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1); | |
366 | fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size); | |
367 | fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, ARCH_MAC99); | |
513f789f BS |
368 | fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base); |
369 | fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size); | |
370 | if (kernel_cmdline) { | |
371 | fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, CMDLINE_ADDR); | |
3c178e72 | 372 | pstrcpy_targphys("cmdline", CMDLINE_ADDR, TARGET_PAGE_SIZE, kernel_cmdline); |
513f789f BS |
373 | } else { |
374 | fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0); | |
375 | } | |
376 | fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base); | |
377 | fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size); | |
378 | fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device); | |
10696b4f BS |
379 | |
380 | fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_WIDTH, graphic_width); | |
381 | fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_HEIGHT, graphic_height); | |
382 | fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_DEPTH, graphic_depth); | |
383 | ||
513f789f | 384 | qemu_register_boot_set(fw_cfg_boot_set, fw_cfg); |
aae9366a | 385 | } |
0aa6a4a2 | 386 | |
f80f9ec9 | 387 | static QEMUMachine core99_machine = { |
4b32e168 AL |
388 | .name = "mac99", |
389 | .desc = "Mac99 based PowerMAC", | |
390 | .init = ppc_core99_init, | |
3d878caa | 391 | .max_cpus = MAX_CPUS, |
46214a27 AF |
392 | #ifdef TARGET_PPC64 |
393 | .is_default = 1, | |
394 | #endif | |
0aa6a4a2 | 395 | }; |
f80f9ec9 AL |
396 | |
397 | static void core99_machine_init(void) | |
398 | { | |
399 | qemu_register_machine(&core99_machine); | |
400 | } | |
401 | ||
402 | machine_init(core99_machine_init); |