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Commit | Line | Data |
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64201201 | 1 | /* |
3cbee15b | 2 | * QEMU PowerPC CHRP (currently NewWorld PowerMac) hardware System Emulator |
5fafdf24 | 3 | * |
47103572 | 4 | * Copyright (c) 2004-2007 Fabrice Bellard |
3cbee15b | 5 | * Copyright (c) 2007 Jocelyn Mayer |
5fafdf24 | 6 | * |
64201201 FB |
7 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
8 | * of this software and associated documentation files (the "Software"), to deal | |
9 | * in the Software without restriction, including without limitation the rights | |
10 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
11 | * copies of the Software, and to permit persons to whom the Software is | |
12 | * furnished to do so, subject to the following conditions: | |
13 | * | |
14 | * The above copyright notice and this permission notice shall be included in | |
15 | * all copies or substantial portions of the Software. | |
16 | * | |
17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
19 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
20 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
21 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
22 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
23 | * THE SOFTWARE. | |
24 | */ | |
87ecb68b PB |
25 | #include "hw.h" |
26 | #include "ppc.h" | |
3cbee15b | 27 | #include "ppc_mac.h" |
28ce5ce6 | 28 | #include "mac_dbdma.h" |
87ecb68b PB |
29 | #include "nvram.h" |
30 | #include "pc.h" | |
31 | #include "pci.h" | |
32 | #include "net.h" | |
33 | #include "sysemu.h" | |
34 | #include "boards.h" | |
006f3a48 | 35 | #include "fw_cfg.h" |
7fa9ae1a | 36 | #include "escc.h" |
b7169916 | 37 | #include "openpic.h" |
267002cd | 38 | |
e4bcb14c | 39 | #define MAX_IDE_BUS 2 |
864c136a | 40 | #define VGA_BIOS_SIZE 65536 |
006f3a48 | 41 | #define CFG_ADDR 0xf0000510 |
e4bcb14c | 42 | |
f3902383 BS |
43 | /* debug UniNorth */ |
44 | //#define DEBUG_UNIN | |
45 | ||
46 | #ifdef DEBUG_UNIN | |
47 | #define UNIN_DPRINTF(fmt, args...) \ | |
48 | do { printf("UNIN: " fmt , ##args); } while (0) | |
49 | #else | |
50 | #define UNIN_DPRINTF(fmt, args...) | |
51 | #endif | |
52 | ||
0aa6a4a2 FB |
53 | /* UniN device */ |
54 | static void unin_writel (void *opaque, target_phys_addr_t addr, uint32_t value) | |
55 | { | |
f3902383 | 56 | UNIN_DPRINTF("writel addr " TARGET_FMT_plx " val %x\n", addr, value); |
0aa6a4a2 FB |
57 | } |
58 | ||
59 | static uint32_t unin_readl (void *opaque, target_phys_addr_t addr) | |
60 | { | |
f3902383 BS |
61 | uint32_t value; |
62 | ||
63 | value = 0; | |
64 | UNIN_DPRINTF("readl addr " TARGET_FMT_plx " val %x\n", addr, value); | |
65 | ||
66 | return value; | |
0aa6a4a2 FB |
67 | } |
68 | ||
69 | static CPUWriteMemoryFunc *unin_write[] = { | |
70 | &unin_writel, | |
71 | &unin_writel, | |
72 | &unin_writel, | |
73 | }; | |
74 | ||
75 | static CPUReadMemoryFunc *unin_read[] = { | |
76 | &unin_readl, | |
77 | &unin_readl, | |
78 | &unin_readl, | |
79 | }; | |
80 | ||
513f789f BS |
81 | static int fw_cfg_boot_set(void *opaque, const char *boot_device) |
82 | { | |
83 | fw_cfg_add_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]); | |
84 | return 0; | |
85 | } | |
86 | ||
3cbee15b | 87 | /* PowerPC Mac99 hardware initialisation */ |
fbe1b595 | 88 | static void ppc_core99_init (ram_addr_t ram_size, |
3023f332 | 89 | const char *boot_device, |
3cbee15b JM |
90 | const char *kernel_filename, |
91 | const char *kernel_cmdline, | |
92 | const char *initrd_filename, | |
93 | const char *cpu_model) | |
64201201 | 94 | { |
aaed909a | 95 | CPUState *env = NULL, *envs[MAX_CPUS]; |
64201201 | 96 | char buf[1024]; |
e9df014c | 97 | qemu_irq *pic, **openpic_irqs; |
aef445bd | 98 | int unin_memory; |
d5295253 | 99 | int linux_boot, i; |
b584726d | 100 | ram_addr_t ram_offset, bios_offset, vga_bios_offset; |
b6b8bd18 | 101 | uint32_t kernel_base, kernel_size, initrd_base, initrd_size; |
46e50e9d | 102 | PCIBus *pci_bus; |
3cbee15b JM |
103 | MacIONVRAMState *nvr; |
104 | int nvram_mem_index; | |
d5295253 | 105 | int vga_bios_size, bios_size; |
d537cf6c | 106 | qemu_irq *dummy_irq; |
7fa9ae1a | 107 | int pic_mem_index, dbdma_mem_index, cuda_mem_index, escc_mem_index; |
28c5af54 | 108 | int ppc_boot_device; |
e4bcb14c TS |
109 | int index; |
110 | BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; | |
006f3a48 | 111 | void *fw_cfg; |
28ce5ce6 | 112 | void *dbdma; |
44654490 | 113 | uint8_t *vga_bios_ptr; |
46e50e9d | 114 | |
64201201 FB |
115 | linux_boot = (kernel_filename != NULL); |
116 | ||
c68ea704 | 117 | /* init CPUs */ |
94fc95cd | 118 | if (cpu_model == NULL) |
e6bd862b | 119 | cpu_model = "G4"; |
e9df014c | 120 | for (i = 0; i < smp_cpus; i++) { |
aaed909a FB |
121 | env = cpu_init(cpu_model); |
122 | if (!env) { | |
123 | fprintf(stderr, "Unable to find PowerPC CPU definition\n"); | |
124 | exit(1); | |
125 | } | |
e9df014c JM |
126 | /* Set time-base frequency to 100 Mhz */ |
127 | cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL); | |
3cbee15b | 128 | #if 0 |
e9df014c | 129 | env->osi_call = vga_osi_call; |
3cbee15b | 130 | #endif |
fe33cc71 | 131 | qemu_register_reset(&cpu_ppc_reset, env); |
e9df014c JM |
132 | envs[i] = env; |
133 | } | |
c68ea704 | 134 | |
64201201 | 135 | /* allocate RAM */ |
864c136a BS |
136 | ram_offset = qemu_ram_alloc(ram_size); |
137 | cpu_register_physical_memory(0, ram_size, ram_offset); | |
138 | ||
64201201 | 139 | /* allocate and load BIOS */ |
864c136a | 140 | bios_offset = qemu_ram_alloc(BIOS_SIZE); |
1192dad8 | 141 | if (bios_name == NULL) |
006f3a48 | 142 | bios_name = PROM_FILENAME; |
1192dad8 | 143 | snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name); |
006f3a48 BS |
144 | cpu_register_physical_memory(PROM_ADDR, BIOS_SIZE, bios_offset | IO_MEM_ROM); |
145 | ||
146 | /* Load OpenBIOS (ELF) */ | |
147 | bios_size = load_elf(buf, 0, NULL, NULL, NULL); | |
d5295253 | 148 | if (bios_size < 0 || bios_size > BIOS_SIZE) { |
2ac71179 | 149 | hw_error("qemu: could not load PowerPC bios '%s'\n", buf); |
64201201 FB |
150 | exit(1); |
151 | } | |
3b46e624 | 152 | |
d5295253 | 153 | /* allocate and load VGA BIOS */ |
864c136a | 154 | vga_bios_offset = qemu_ram_alloc(VGA_BIOS_SIZE); |
44654490 | 155 | vga_bios_ptr = qemu_get_ram_ptr(vga_bios_offset); |
d5295253 | 156 | snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME); |
44654490 | 157 | vga_bios_size = load_image(buf, vga_bios_ptr + 8); |
d5295253 FB |
158 | if (vga_bios_size < 0) { |
159 | /* if no bios is present, we can still work */ | |
160 | fprintf(stderr, "qemu: warning: could not load VGA bios '%s'\n", buf); | |
161 | vga_bios_size = 0; | |
162 | } else { | |
163 | /* set a specific header (XXX: find real Apple format for NDRV | |
164 | drivers) */ | |
44654490 PB |
165 | vga_bios_ptr[0] = 'N'; |
166 | vga_bios_ptr[1] = 'D'; | |
167 | vga_bios_ptr[2] = 'R'; | |
168 | vga_bios_ptr[3] = 'V'; | |
169 | cpu_to_be32w((uint32_t *)(vga_bios_ptr + 4), vga_bios_size); | |
d5295253 FB |
170 | vga_bios_size += 8; |
171 | } | |
3b46e624 | 172 | |
b6b8bd18 | 173 | if (linux_boot) { |
513f789f | 174 | uint64_t lowaddr = 0; |
b6b8bd18 | 175 | kernel_base = KERNEL_LOAD_ADDR; |
513f789f BS |
176 | |
177 | /* Now we can load the kernel. The first step tries to load the kernel | |
178 | supposing PhysAddr = 0x00000000. If that was wrong the kernel is | |
179 | loaded again, the new PhysAddr being computed from lowaddr. */ | |
180 | kernel_size = load_elf(kernel_filename, kernel_base, NULL, &lowaddr, NULL); | |
181 | if (kernel_size > 0 && lowaddr != KERNEL_LOAD_ADDR) { | |
182 | kernel_size = load_elf(kernel_filename, (2 * kernel_base) - lowaddr, | |
183 | NULL, 0, NULL); | |
184 | } | |
185 | if (kernel_size < 0) | |
186 | kernel_size = load_aout(kernel_filename, kernel_base, | |
187 | ram_size - kernel_base); | |
188 | if (kernel_size < 0) | |
189 | kernel_size = load_image_targphys(kernel_filename, | |
190 | kernel_base, | |
191 | ram_size - kernel_base); | |
b6b8bd18 | 192 | if (kernel_size < 0) { |
2ac71179 | 193 | hw_error("qemu: could not load kernel '%s'\n", kernel_filename); |
b6b8bd18 FB |
194 | exit(1); |
195 | } | |
196 | /* load initrd */ | |
197 | if (initrd_filename) { | |
198 | initrd_base = INITRD_LOAD_ADDR; | |
44654490 PB |
199 | initrd_size = load_image_targphys(initrd_filename, initrd_base, |
200 | ram_size - initrd_base); | |
b6b8bd18 | 201 | if (initrd_size < 0) { |
2ac71179 PB |
202 | hw_error("qemu: could not load initial ram disk '%s'\n", |
203 | initrd_filename); | |
b6b8bd18 FB |
204 | exit(1); |
205 | } | |
206 | } else { | |
207 | initrd_base = 0; | |
208 | initrd_size = 0; | |
209 | } | |
6ac0e82d | 210 | ppc_boot_device = 'm'; |
b6b8bd18 FB |
211 | } else { |
212 | kernel_base = 0; | |
213 | kernel_size = 0; | |
214 | initrd_base = 0; | |
215 | initrd_size = 0; | |
28c5af54 JM |
216 | ppc_boot_device = '\0'; |
217 | /* We consider that NewWorld PowerMac never have any floppy drive | |
218 | * For now, OHW cannot boot from the network. | |
219 | */ | |
0d913fdb JM |
220 | for (i = 0; boot_device[i] != '\0'; i++) { |
221 | if (boot_device[i] >= 'c' && boot_device[i] <= 'f') { | |
222 | ppc_boot_device = boot_device[i]; | |
28c5af54 | 223 | break; |
0d913fdb | 224 | } |
28c5af54 JM |
225 | } |
226 | if (ppc_boot_device == '\0') { | |
227 | fprintf(stderr, "No valid boot device for Mac99 machine\n"); | |
228 | exit(1); | |
229 | } | |
b6b8bd18 | 230 | } |
0aa6a4a2 | 231 | |
3cbee15b | 232 | isa_mem_base = 0x80000000; |
aef445bd | 233 | |
3cbee15b JM |
234 | /* Register 8 MB of ISA IO space */ |
235 | isa_mmio_init(0xf2000000, 0x00800000); | |
3b46e624 | 236 | |
3cbee15b JM |
237 | /* UniN init */ |
238 | unin_memory = cpu_register_io_memory(0, unin_read, unin_write, NULL); | |
239 | cpu_register_physical_memory(0xf8000000, 0x00001000, unin_memory); | |
47103572 | 240 | |
3cbee15b JM |
241 | openpic_irqs = qemu_mallocz(smp_cpus * sizeof(qemu_irq *)); |
242 | openpic_irqs[0] = | |
243 | qemu_mallocz(smp_cpus * sizeof(qemu_irq) * OPENPIC_OUTPUT_NB); | |
244 | for (i = 0; i < smp_cpus; i++) { | |
245 | /* Mac99 IRQ connection between OpenPIC outputs pins | |
246 | * and PowerPC input pins | |
247 | */ | |
248 | switch (PPC_INPUT(env)) { | |
249 | case PPC_FLAGS_INPUT_6xx: | |
250 | openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB); | |
251 | openpic_irqs[i][OPENPIC_OUTPUT_INT] = | |
252 | ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT]; | |
253 | openpic_irqs[i][OPENPIC_OUTPUT_CINT] = | |
254 | ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT]; | |
255 | openpic_irqs[i][OPENPIC_OUTPUT_MCK] = | |
256 | ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_MCP]; | |
257 | /* Not connected ? */ | |
258 | openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL; | |
259 | /* Check this */ | |
260 | openpic_irqs[i][OPENPIC_OUTPUT_RESET] = | |
261 | ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET]; | |
262 | break; | |
00af685f | 263 | #if defined(TARGET_PPC64) |
3cbee15b JM |
264 | case PPC_FLAGS_INPUT_970: |
265 | openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB); | |
266 | openpic_irqs[i][OPENPIC_OUTPUT_INT] = | |
267 | ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT]; | |
268 | openpic_irqs[i][OPENPIC_OUTPUT_CINT] = | |
269 | ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT]; | |
270 | openpic_irqs[i][OPENPIC_OUTPUT_MCK] = | |
271 | ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_MCP]; | |
272 | /* Not connected ? */ | |
273 | openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL; | |
274 | /* Check this */ | |
275 | openpic_irqs[i][OPENPIC_OUTPUT_RESET] = | |
276 | ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET]; | |
277 | break; | |
00af685f | 278 | #endif /* defined(TARGET_PPC64) */ |
3cbee15b | 279 | default: |
2ac71179 | 280 | hw_error("Bus model not supported on mac99 machine\n"); |
3cbee15b | 281 | exit(1); |
0aa6a4a2 | 282 | } |
3cbee15b JM |
283 | } |
284 | pic = openpic_init(NULL, &pic_mem_index, smp_cpus, openpic_irqs, NULL); | |
285 | pci_bus = pci_pmac_init(pic); | |
286 | /* init basic PC hardware */ | |
fbe1b595 | 287 | pci_vga_init(pci_bus, vga_bios_offset, vga_bios_size); |
aae9366a | 288 | |
3cbee15b JM |
289 | /* XXX: suppress that */ |
290 | dummy_irq = i8259_init(NULL); | |
291 | ||
aeeb69c7 AJ |
292 | escc_mem_index = escc_init(0x80013000, dummy_irq[4], dummy_irq[5], |
293 | serial_hds[0], serial_hds[1], ESCC_CLOCK, 4); | |
cb457d76 AL |
294 | |
295 | for(i = 0; i < nb_nics; i++) | |
296 | pci_nic_init(pci_bus, &nd_table[i], -1, "ne2k_pci"); | |
297 | ||
e4bcb14c TS |
298 | if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) { |
299 | fprintf(stderr, "qemu: too many IDE bus\n"); | |
300 | exit(1); | |
301 | } | |
302 | for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) { | |
303 | index = drive_get_index(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS); | |
304 | if (index != -1) | |
305 | hd[i] = drives_table[index].bdrv; | |
306 | else | |
307 | hd[i] = NULL; | |
308 | } | |
28ce5ce6 | 309 | dbdma = DBDMA_init(&dbdma_mem_index); |
77f0435e BS |
310 | pci_cmd646_ide_init(pci_bus, hd, 0); |
311 | ||
3cbee15b JM |
312 | /* cuda also initialize ADB */ |
313 | cuda_init(&cuda_mem_index, pic[0x19]); | |
aae9366a | 314 | |
3cbee15b JM |
315 | adb_kbd_init(&adb_bus); |
316 | adb_mouse_init(&adb_bus); | |
3b46e624 | 317 | |
3b46e624 | 318 | |
4ebcf884 | 319 | macio_init(pci_bus, PCI_DEVICE_ID_APPLE_UNI_N_KEYL, 0, pic_mem_index, |
77f0435e | 320 | dbdma_mem_index, cuda_mem_index, NULL, 0, NULL, |
4ebcf884 | 321 | escc_mem_index); |
0d92ed30 PB |
322 | |
323 | if (usb_enabled) { | |
e24ad6f1 | 324 | usb_ohci_init_pci(pci_bus, 3, -1); |
0d92ed30 PB |
325 | } |
326 | ||
b6b8bd18 FB |
327 | if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8) |
328 | graphic_depth = 15; | |
4f3f238b | 329 | |
3cbee15b | 330 | /* The NewWorld NVRAM is not located in the MacIO device */ |
68af3f24 | 331 | nvr = macio_nvram_init(&nvram_mem_index, 0x2000, 1); |
3cbee15b | 332 | pmac_format_nvram_partition(nvr, 0x2000); |
74e91155 | 333 | macio_nvram_map(nvr, 0xFFF04000); |
b6b8bd18 | 334 | /* No PCI init: the BIOS will do it */ |
0aa6a4a2 | 335 | |
006f3a48 BS |
336 | fw_cfg = fw_cfg_init(0, 0, CFG_ADDR, CFG_ADDR + 2); |
337 | fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1); | |
338 | fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size); | |
339 | fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, ARCH_MAC99); | |
513f789f BS |
340 | fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base); |
341 | fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size); | |
342 | if (kernel_cmdline) { | |
343 | fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, CMDLINE_ADDR); | |
344 | pstrcpy_targphys(CMDLINE_ADDR, TARGET_PAGE_SIZE, kernel_cmdline); | |
345 | } else { | |
346 | fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0); | |
347 | } | |
348 | fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base); | |
349 | fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size); | |
350 | fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device); | |
351 | qemu_register_boot_set(fw_cfg_boot_set, fw_cfg); | |
aae9366a | 352 | } |
0aa6a4a2 FB |
353 | |
354 | QEMUMachine core99_machine = { | |
4b32e168 AL |
355 | .name = "mac99", |
356 | .desc = "Mac99 based PowerMAC", | |
357 | .init = ppc_core99_init, | |
3d878caa | 358 | .max_cpus = MAX_CPUS, |
0aa6a4a2 | 359 | }; |