[qemu.git] / hw / ppc_newworld.c

/*
 * QEMU PowerPC CHRP (currently NewWorld PowerMac) hardware System Emulator
 *
 * Copyright (c) 2004-2007 Fabrice Bellard
 * Copyright (c) 2007 Jocelyn Mayer
 *
 * Permission is hereby granted, free of charge, to any person obtaining a copy
 * of this software and associated documentation files (the "Software"), to deal
 * in the Software without restriction, including without limitation the rights
 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
 * copies of the Software, and to permit persons to whom the Software is
 * furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
 * THE SOFTWARE.
 */
#include "hw.h"
#include "ppc.h"
#include "ppc_mac.h"
#include "mac_dbdma.h"
#include "nvram.h"
#include "pc.h"
#include "pci.h"
#include "usb-ohci.h"
#include "net.h"
#include "sysemu.h"
#include "boards.h"
#include "fw_cfg.h"
#include "escc.h"
#include "openpic.h"
#include "ide.h"
#include "loader.h"
#include "elf.h"
#include "kvm.h"

#define MAX_IDE_BUS 2
#define VGA_BIOS_SIZE 65536
#define CFG_ADDR 0xf0000510

/* debug UniNorth */
//#define DEBUG_UNIN

#ifdef DEBUG_UNIN
#define UNIN_DPRINTF(fmt, ...)                                  \
    do { printf("UNIN: " fmt , ## __VA_ARGS__); } while (0)
#else
#define UNIN_DPRINTF(fmt, ...)
#endif

/* UniN device */
static void unin_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
{
    UNIN_DPRINTF("writel addr " TARGET_FMT_plx " val %x\n", addr, value);
}

static uint32_t unin_readl (void *opaque, target_phys_addr_t addr)
{
    uint32_t value;

    value = 0;
    UNIN_DPRINTF("readl addr " TARGET_FMT_plx " val %x\n", addr, value);

    return value;
}

static CPUWriteMemoryFunc * const unin_write[] = {
    &unin_writel,
    &unin_writel,
    &unin_writel,
};

static CPUReadMemoryFunc * const unin_read[] = {
    &unin_readl,
    &unin_readl,
    &unin_readl,
};

static int fw_cfg_boot_set(void *opaque, const char *boot_device)
{
    fw_cfg_add_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]);
    return 0;
}

/* PowerPC Mac99 hardware initialisation */
static void ppc_core99_init (ram_addr_t ram_size,
                             const char *boot_device,
                             const char *kernel_filename,
                             const char *kernel_cmdline,
                             const char *initrd_filename,
                             const char *cpu_model)
{
    CPUState *env = NULL, *envs[MAX_CPUS];
    char *filename;
    qemu_irq *pic, **openpic_irqs;
    int unin_memory;
    int linux_boot, i;
    ram_addr_t ram_offset, bios_offset, vga_bios_offset;
    uint32_t kernel_base, kernel_size, initrd_base, initrd_size;
    PCIBus *pci_bus;
    MacIONVRAMState *nvr;
    int nvram_mem_index;
    int vga_bios_size, bios_size;
    qemu_irq *dummy_irq;
    int pic_mem_index, dbdma_mem_index, cuda_mem_index, escc_mem_index;
    int ppc_boot_device;
    DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
    void *fw_cfg;
    void *dbdma;
    uint8_t *vga_bios_ptr;

    linux_boot = (kernel_filename != NULL);

    /* init CPUs */
    if (cpu_model == NULL)
        cpu_model = "G4";
    for (i = 0; i < smp_cpus; i++) {
        env = cpu_init(cpu_model);
        if (!env) {
            fprintf(stderr, "Unable to find PowerPC CPU definition\n");
            exit(1);
        }
        /* Set time-base frequency to 100 Mhz */
        cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL);
#if 0
        env->osi_call = vga_osi_call;
#endif
        qemu_register_reset((QEMUResetHandler*)&cpu_reset, env);
        envs[i] = env;
    }

    /* Make sure all register sets take effect */
    cpu_synchronize_state(env);

    /* allocate RAM */
    ram_offset = qemu_ram_alloc(ram_size);
    cpu_register_physical_memory(0, ram_size, ram_offset);

    /* allocate and load BIOS */
    bios_offset = qemu_ram_alloc(BIOS_SIZE);
    if (bios_name == NULL)
        bios_name = PROM_FILENAME;
    filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
    cpu_register_physical_memory(PROM_ADDR, BIOS_SIZE, bios_offset | IO_MEM_ROM);

    /* Load OpenBIOS (ELF) */
    if (filename) {
        bios_size = load_elf(filename, 0, NULL, NULL, NULL, 1, ELF_MACHINE, 0);

        qemu_free(filename);
    } else {
        bios_size = -1;
    }
    if (bios_size < 0 || bios_size > BIOS_SIZE) {
        hw_error("qemu: could not load PowerPC bios '%s'\n", bios_name);
        exit(1);
    }

    /* allocate and load VGA BIOS */
    vga_bios_offset = qemu_ram_alloc(VGA_BIOS_SIZE);
    vga_bios_ptr = qemu_get_ram_ptr(vga_bios_offset);
    filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, VGABIOS_FILENAME);
    if (filename) {
        vga_bios_size = load_image(filename, vga_bios_ptr + 8);
        qemu_free(filename);
    } else {
        vga_bios_size = -1;
    }
    if (vga_bios_size < 0) {
        /* if no bios is present, we can still work */
        fprintf(stderr, "qemu: warning: could not load VGA bios '%s'\n",
                VGABIOS_FILENAME);
        vga_bios_size = 0;
    } else {
        /* set a specific header (XXX: find real Apple format for NDRV
           drivers) */
        vga_bios_ptr[0] = 'N';
        vga_bios_ptr[1] = 'D';
        vga_bios_ptr[2] = 'R';
        vga_bios_ptr[3] = 'V';
        cpu_to_be32w((uint32_t *)(vga_bios_ptr + 4), vga_bios_size);
        vga_bios_size += 8;

        /* Round to page boundary */
        vga_bios_size = (vga_bios_size + TARGET_PAGE_SIZE - 1) &
            TARGET_PAGE_MASK;
    }

    if (linux_boot) {
        uint64_t lowaddr = 0;
        int bswap_needed;

#ifdef BSWAP_NEEDED
        bswap_needed = 1;
#else
        bswap_needed = 0;
#endif
        kernel_base = KERNEL_LOAD_ADDR;

        /* Now we can load the kernel. The first step tries to load the kernel
           supposing PhysAddr = 0x00000000. If that was wrong the kernel is
           loaded again, the new PhysAddr being computed from lowaddr. */
        kernel_size = load_elf(kernel_filename, kernel_base, NULL, &lowaddr, NULL,
                               1, ELF_MACHINE, 0);
        if (kernel_size > 0 && lowaddr != KERNEL_LOAD_ADDR) {
            kernel_size = load_elf(kernel_filename, (2 * kernel_base) - lowaddr,
                                   NULL, NULL, NULL, 1, ELF_MACHINE, 0);
        }
        if (kernel_size < 0)
            kernel_size = load_aout(kernel_filename, kernel_base,
                                    ram_size - kernel_base, bswap_needed,
                                    TARGET_PAGE_SIZE);
        if (kernel_size < 0)
            kernel_size = load_image_targphys(kernel_filename,
                                              kernel_base,
                                              ram_size - kernel_base);
        if (kernel_size < 0) {
            hw_error("qemu: could not load kernel '%s'\n", kernel_filename);
            exit(1);
        }
        /* load initrd */
        if (initrd_filename) {
            initrd_base = INITRD_LOAD_ADDR;
            initrd_size = load_image_targphys(initrd_filename, initrd_base,
                                              ram_size - initrd_base);
            if (initrd_size < 0) {
                hw_error("qemu: could not load initial ram disk '%s'\n",
                         initrd_filename);
                exit(1);
            }
        } else {
            initrd_base = 0;
            initrd_size = 0;
        }
        ppc_boot_device = 'm';
    } else {
        kernel_base = 0;
        kernel_size = 0;
        initrd_base = 0;
        initrd_size = 0;
        ppc_boot_device = '\0';
        /* We consider that NewWorld PowerMac never have any floppy drive
         * For now, OHW cannot boot from the network.
         */
        for (i = 0; boot_device[i] != '\0'; i++) {
            if (boot_device[i] >= 'c' && boot_device[i] <= 'f') {
                ppc_boot_device = boot_device[i];
                break;
            }
        }
        if (ppc_boot_device == '\0') {
            fprintf(stderr, "No valid boot device for Mac99 machine\n");
            exit(1);
        }
    }

    isa_mem_base = 0x80000000;

    /* Register 8 MB of ISA IO space */
    isa_mmio_init(0xf2000000, 0x00800000);

    /* UniN init */
    unin_memory = cpu_register_io_memory(unin_read, unin_write, NULL);
    cpu_register_physical_memory(0xf8000000, 0x00001000, unin_memory);

    openpic_irqs = qemu_mallocz(smp_cpus * sizeof(qemu_irq *));
    openpic_irqs[0] =
        qemu_mallocz(smp_cpus * sizeof(qemu_irq) * OPENPIC_OUTPUT_NB);
    for (i = 0; i < smp_cpus; i++) {
        /* Mac99 IRQ connection between OpenPIC outputs pins
         * and PowerPC input pins
         */
        switch (PPC_INPUT(env)) {
        case PPC_FLAGS_INPUT_6xx:
            openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
            openpic_irqs[i][OPENPIC_OUTPUT_INT] =
                ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
            openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
                ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
            openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
                ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_MCP];
            /* Not connected ? */
            openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
            /* Check this */
            openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
                ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET];
            break;
#if defined(TARGET_PPC64)
        case PPC_FLAGS_INPUT_970:
            openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
            openpic_irqs[i][OPENPIC_OUTPUT_INT] =
                ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
            openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
                ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
            openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
                ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_MCP];
            /* Not connected ? */
            openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
            /* Check this */
            openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
                ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET];
            break;
#endif /* defined(TARGET_PPC64) */
        default:
            hw_error("Bus model not supported on mac99 machine\n");
            exit(1);
        }
    }
    pic = openpic_init(NULL, &pic_mem_index, smp_cpus, openpic_irqs, NULL);
    pci_bus = pci_pmac_init(pic);
    /* init basic PC hardware */
    pci_vga_init(pci_bus, vga_bios_offset, vga_bios_size);

    /* XXX: suppress that */
    dummy_irq = i8259_init(NULL);

    escc_mem_index = escc_init(0x80013000, dummy_irq[4], dummy_irq[5],
                               serial_hds[0], serial_hds[1], ESCC_CLOCK, 4);

    for(i = 0; i < nb_nics; i++)
        pci_nic_init_nofail(&nd_table[i], "ne2k_pci", NULL);

    if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
        fprintf(stderr, "qemu: too many IDE bus\n");
        exit(1);
    }
    for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
        hd[i] = drive_get(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
    }
    dbdma = DBDMA_init(&dbdma_mem_index);
    pci_cmd646_ide_init(pci_bus, hd, 0);

    /* cuda also initialize ADB */
    cuda_init(&cuda_mem_index, pic[0x19]);

    adb_kbd_init(&adb_bus);
    adb_mouse_init(&adb_bus);


    macio_init(pci_bus, PCI_DEVICE_ID_APPLE_UNI_N_KEYL, 0, pic_mem_index,
               dbdma_mem_index, cuda_mem_index, NULL, 0, NULL,
               escc_mem_index);

    if (usb_enabled) {
        usb_ohci_init_pci(pci_bus, -1);
    }

    if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)
        graphic_depth = 15;

    /* The NewWorld NVRAM is not located in the MacIO device */
    nvr = macio_nvram_init(&nvram_mem_index, 0x2000, 1);
    pmac_format_nvram_partition(nvr, 0x2000);
    macio_nvram_map(nvr, 0xFFF04000);
    /* No PCI init: the BIOS will do it */

    fw_cfg = fw_cfg_init(0, 0, CFG_ADDR, CFG_ADDR + 2);
    fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
    fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
    fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, ARCH_MAC99);
    fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base);
    fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
    if (kernel_cmdline) {
        fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, CMDLINE_ADDR);
        pstrcpy_targphys("cmdline", CMDLINE_ADDR, TARGET_PAGE_SIZE, kernel_cmdline);
    } else {
        fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
    }
    fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base);
    fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
    fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device);

    fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_WIDTH, graphic_width);
    fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_HEIGHT, graphic_height);
    fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_DEPTH, graphic_depth);

    qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
}

static QEMUMachine core99_machine = {
    .name = "mac99",
    .desc = "Mac99 based PowerMAC",
    .init = ppc_core99_init,
    .max_cpus = MAX_CPUS,
};

static void core99_machine_init(void)
{
    qemu_register_machine(&core99_machine);
}

machine_init(core99_machine_init);
Commit	Line	Data
64201201	1	/*
3cbee15b	2	* QEMU PowerPC CHRP (currently NewWorld PowerMac) hardware System Emulator
5fafdf24	3	*
47103572	4	* Copyright (c) 2004-2007 Fabrice Bellard
3cbee15b	5	* Copyright (c) 2007 Jocelyn Mayer
5fafdf24	6	*
64201201 FB	7	* Permission is hereby granted, free of charge, to any person obtaining a copy
	8	* of this software and associated documentation files (the "Software"), to deal
	9	* in the Software without restriction, including without limitation the rights
	10	* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
	11	* copies of the Software, and to permit persons to whom the Software is
	12	* furnished to do so, subject to the following conditions:
	13	*
	14	* The above copyright notice and this permission notice shall be included in
	15	* all copies or substantial portions of the Software.
	16	*
	17	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	18	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	19	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	20	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
	21	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
	22	* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
	23	* THE SOFTWARE.
	24	*/
87ecb68b PB	25	#include "hw.h"
87ecb68b PB	26	#include "ppc.h"
3cbee15b	27	#include "ppc_mac.h"
28ce5ce6	28	#include "mac_dbdma.h"
87ecb68b PB	29	#include "nvram.h"
	30	#include "pc.h"
	31	#include "pci.h"
18e08a55	32	#include "usb-ohci.h"
87ecb68b PB	33	#include "net.h"
	34	#include "sysemu.h"
	35	#include "boards.h"
006f3a48	36	#include "fw_cfg.h"
7fa9ae1a	37	#include "escc.h"
b7169916	38	#include "openpic.h"
977e1244	39	#include "ide.h"
ca20cf32 BS	40	#include "loader.h"
ca20cf32 BS	41	#include "elf.h"
dc702288	42	#include "kvm.h"
267002cd	43
e4bcb14c	44	#define MAX_IDE_BUS 2
864c136a	45	#define VGA_BIOS_SIZE 65536
006f3a48	46	#define CFG_ADDR 0xf0000510
e4bcb14c	47
f3902383 BS	48	/* debug UniNorth */
	49	//#define DEBUG_UNIN
	50
	51	#ifdef DEBUG_UNIN
001faf32 BS	52	#define UNIN_DPRINTF(fmt, ...) \
001faf32 BS	53	do { printf("UNIN: " fmt , ## __VA_ARGS__); } while (0)
f3902383	54	#else
001faf32	55	#define UNIN_DPRINTF(fmt, ...)
f3902383 BS	56	#endif
f3902383 BS	57
0aa6a4a2	58	/* UniN device */
c227f099	59	static void unin_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
0aa6a4a2	60	{
f3902383	61	UNIN_DPRINTF("writel addr " TARGET_FMT_plx " val %x\n", addr, value);
0aa6a4a2 FB	62	}
0aa6a4a2 FB	63
c227f099	64	static uint32_t unin_readl (void *opaque, target_phys_addr_t addr)
0aa6a4a2	65	{
f3902383 BS	66	uint32_t value;
	67
	68	value = 0;
	69	UNIN_DPRINTF("readl addr " TARGET_FMT_plx " val %x\n", addr, value);
	70
	71	return value;
0aa6a4a2 FB	72	}
0aa6a4a2 FB	73
d60efc6b	74	static CPUWriteMemoryFunc * const unin_write[] = {
0aa6a4a2 FB	75	&unin_writel,
	76	&unin_writel,
	77	&unin_writel,
	78	};
	79
d60efc6b	80	static CPUReadMemoryFunc * const unin_read[] = {
0aa6a4a2 FB	81	&unin_readl,
	82	&unin_readl,
	83	&unin_readl,
	84	};
	85
513f789f BS	86	static int fw_cfg_boot_set(void opaque, const char boot_device)
	87	{
	88	fw_cfg_add_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]);
	89	return 0;
	90	}
	91
3cbee15b	92	/* PowerPC Mac99 hardware initialisation */
c227f099	93	static void ppc_core99_init (ram_addr_t ram_size,
3023f332	94	const char *boot_device,
3cbee15b JM	95	const char *kernel_filename,
	96	const char *kernel_cmdline,
	97	const char *initrd_filename,
	98	const char *cpu_model)
64201201	99	{
aaed909a	100	CPUState env = NULL, envs[MAX_CPUS];
5cea8590	101	char *filename;
e9df014c	102	qemu_irq pic, *openpic_irqs;
aef445bd	103	int unin_memory;
d5295253	104	int linux_boot, i;
c227f099	105	ram_addr_t ram_offset, bios_offset, vga_bios_offset;
b6b8bd18	106	uint32_t kernel_base, kernel_size, initrd_base, initrd_size;
46e50e9d	107	PCIBus *pci_bus;
3cbee15b JM	108	MacIONVRAMState *nvr;
3cbee15b JM	109	int nvram_mem_index;
d5295253	110	int vga_bios_size, bios_size;
d537cf6c	111	qemu_irq *dummy_irq;
7fa9ae1a	112	int pic_mem_index, dbdma_mem_index, cuda_mem_index, escc_mem_index;
28c5af54	113	int ppc_boot_device;
f455e98c	114	DriveInfo hd[MAX_IDE_BUS MAX_IDE_DEVS];
006f3a48	115	void *fw_cfg;
28ce5ce6	116	void *dbdma;
44654490	117	uint8_t *vga_bios_ptr;
46e50e9d	118
64201201 FB	119	linux_boot = (kernel_filename != NULL);
64201201 FB	120
c68ea704	121	/* init CPUs */
94fc95cd	122	if (cpu_model == NULL)
e6bd862b	123	cpu_model = "G4";
e9df014c	124	for (i = 0; i < smp_cpus; i++) {
aaed909a FB	125	env = cpu_init(cpu_model);
	126	if (!env) {
	127	fprintf(stderr, "Unable to find PowerPC CPU definition\n");
	128	exit(1);
	129	}
e9df014c JM	130	/* Set time-base frequency to 100 Mhz */
e9df014c JM	131	cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL);
3cbee15b	132	#if 0
e9df014c	133	env->osi_call = vga_osi_call;
3cbee15b	134	#endif
d84bda46	135	qemu_register_reset((QEMUResetHandler*)&cpu_reset, env);
e9df014c JM	136	envs[i] = env;
e9df014c JM	137	}
c68ea704	138
dc702288 AG	139	/* Make sure all register sets take effect */
	140	cpu_synchronize_state(env);
	141
64201201	142	/* allocate RAM */
864c136a BS	143	ram_offset = qemu_ram_alloc(ram_size);
	144	cpu_register_physical_memory(0, ram_size, ram_offset);
	145
64201201	146	/* allocate and load BIOS */
864c136a	147	bios_offset = qemu_ram_alloc(BIOS_SIZE);
1192dad8	148	if (bios_name == NULL)
006f3a48	149	bios_name = PROM_FILENAME;
5cea8590	150	filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
006f3a48 BS	151	cpu_register_physical_memory(PROM_ADDR, BIOS_SIZE, bios_offset \| IO_MEM_ROM);
	152
	153	/* Load OpenBIOS (ELF) */
5cea8590	154	if (filename) {
ca20cf32 BS	155	bios_size = load_elf(filename, 0, NULL, NULL, NULL, 1, ELF_MACHINE, 0);
ca20cf32 BS	156
5cea8590 PB	157	qemu_free(filename);
	158	} else {
	159	bios_size = -1;
	160	}
d5295253	161	if (bios_size < 0 \|\| bios_size > BIOS_SIZE) {
5cea8590	162	hw_error("qemu: could not load PowerPC bios '%s'\n", bios_name);
64201201 FB	163	exit(1);
64201201 FB	164	}
3b46e624	165
d5295253	166	/* allocate and load VGA BIOS */
864c136a	167	vga_bios_offset = qemu_ram_alloc(VGA_BIOS_SIZE);
44654490	168	vga_bios_ptr = qemu_get_ram_ptr(vga_bios_offset);
5cea8590 PB	169	filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, VGABIOS_FILENAME);
	170	if (filename) {
	171	vga_bios_size = load_image(filename, vga_bios_ptr + 8);
	172	qemu_free(filename);
	173	} else {
	174	vga_bios_size = -1;
	175	}
d5295253 FB	176	if (vga_bios_size < 0) {
d5295253 FB	177	/* if no bios is present, we can still work */
5cea8590 PB	178	fprintf(stderr, "qemu: warning: could not load VGA bios '%s'\n",
5cea8590 PB	179	VGABIOS_FILENAME);
d5295253 FB	180	vga_bios_size = 0;
	181	} else {
	182	/* set a specific header (XXX: find real Apple format for NDRV
	183	drivers) */
44654490 PB	184	vga_bios_ptr[0] = 'N';
	185	vga_bios_ptr[1] = 'D';
	186	vga_bios_ptr[2] = 'R';
	187	vga_bios_ptr[3] = 'V';
	188	cpu_to_be32w((uint32_t *)(vga_bios_ptr + 4), vga_bios_size);
d5295253	189	vga_bios_size += 8;
a7b022e0 AG	190
	191	/* Round to page boundary */
	192	vga_bios_size = (vga_bios_size + TARGET_PAGE_SIZE - 1) &
	193	TARGET_PAGE_MASK;
d5295253	194	}
3b46e624	195
b6b8bd18	196	if (linux_boot) {
513f789f	197	uint64_t lowaddr = 0;
ca20cf32 BS	198	int bswap_needed;
	199
	200	#ifdef BSWAP_NEEDED
	201	bswap_needed = 1;
	202	#else
	203	bswap_needed = 0;
	204	#endif
b6b8bd18	205	kernel_base = KERNEL_LOAD_ADDR;
513f789f BS	206
	207	/* Now we can load the kernel. The first step tries to load the kernel
	208	supposing PhysAddr = 0x00000000. If that was wrong the kernel is
	209	loaded again, the new PhysAddr being computed from lowaddr. */
ca20cf32 BS	210	kernel_size = load_elf(kernel_filename, kernel_base, NULL, &lowaddr, NULL,
ca20cf32 BS	211	1, ELF_MACHINE, 0);
513f789f BS	212	if (kernel_size > 0 && lowaddr != KERNEL_LOAD_ADDR) {
513f789f BS	213	kernel_size = load_elf(kernel_filename, (2 * kernel_base) - lowaddr,
ca20cf32	214	NULL, NULL, NULL, 1, ELF_MACHINE, 0);
513f789f BS	215	}
	216	if (kernel_size < 0)
	217	kernel_size = load_aout(kernel_filename, kernel_base,
ca20cf32 BS	218	ram_size - kernel_base, bswap_needed,
ca20cf32 BS	219	TARGET_PAGE_SIZE);
513f789f BS	220	if (kernel_size < 0)
	221	kernel_size = load_image_targphys(kernel_filename,
	222	kernel_base,
	223	ram_size - kernel_base);
b6b8bd18	224	if (kernel_size < 0) {
2ac71179	225	hw_error("qemu: could not load kernel '%s'\n", kernel_filename);
b6b8bd18 FB	226	exit(1);
	227	}
	228	/* load initrd */
	229	if (initrd_filename) {
	230	initrd_base = INITRD_LOAD_ADDR;
44654490 PB	231	initrd_size = load_image_targphys(initrd_filename, initrd_base,
44654490 PB	232	ram_size - initrd_base);
b6b8bd18	233	if (initrd_size < 0) {
2ac71179 PB	234	hw_error("qemu: could not load initial ram disk '%s'\n",
2ac71179 PB	235	initrd_filename);
b6b8bd18 FB	236	exit(1);
	237	}
	238	} else {
	239	initrd_base = 0;
	240	initrd_size = 0;
	241	}
6ac0e82d	242	ppc_boot_device = 'm';
b6b8bd18 FB	243	} else {
	244	kernel_base = 0;
	245	kernel_size = 0;
	246	initrd_base = 0;
	247	initrd_size = 0;
28c5af54 JM	248	ppc_boot_device = '\0';
	249	/* We consider that NewWorld PowerMac never have any floppy drive
	250	* For now, OHW cannot boot from the network.
	251	*/
0d913fdb JM	252	for (i = 0; boot_device[i] != '\0'; i++) {
	253	if (boot_device[i] >= 'c' && boot_device[i] <= 'f') {
	254	ppc_boot_device = boot_device[i];
28c5af54	255	break;
0d913fdb	256	}
28c5af54 JM	257	}
	258	if (ppc_boot_device == '\0') {
	259	fprintf(stderr, "No valid boot device for Mac99 machine\n");
	260	exit(1);
	261	}
b6b8bd18	262	}
0aa6a4a2	263
3cbee15b	264	isa_mem_base = 0x80000000;
aef445bd	265
3cbee15b JM	266	/* Register 8 MB of ISA IO space */
3cbee15b JM	267	isa_mmio_init(0xf2000000, 0x00800000);
3b46e624	268
3cbee15b	269	/* UniN init */
1eed09cb	270	unin_memory = cpu_register_io_memory(unin_read, unin_write, NULL);
3cbee15b	271	cpu_register_physical_memory(0xf8000000, 0x00001000, unin_memory);
47103572	272
3cbee15b JM	273	openpic_irqs = qemu_mallocz(smp_cpus * sizeof(qemu_irq *));
	274	openpic_irqs[0] =
	275	qemu_mallocz(smp_cpus * sizeof(qemu_irq) * OPENPIC_OUTPUT_NB);
	276	for (i = 0; i < smp_cpus; i++) {
	277	/* Mac99 IRQ connection between OpenPIC outputs pins
	278	* and PowerPC input pins
	279	*/
	280	switch (PPC_INPUT(env)) {
	281	case PPC_FLAGS_INPUT_6xx:
	282	openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
	283	openpic_irqs[i][OPENPIC_OUTPUT_INT] =
	284	((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
	285	openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
	286	((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
	287	openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
	288	((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_MCP];
	289	/* Not connected ? */
	290	openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
	291	/* Check this */
	292	openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
	293	((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET];
	294	break;
00af685f	295	#if defined(TARGET_PPC64)
3cbee15b JM	296	case PPC_FLAGS_INPUT_970:
	297	openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
	298	openpic_irqs[i][OPENPIC_OUTPUT_INT] =
	299	((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
	300	openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
	301	((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
	302	openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
	303	((qemu_irq *)env->irq_inputs)[PPC970_INPUT_MCP];
	304	/* Not connected ? */
	305	openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
	306	/* Check this */
	307	openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
	308	((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET];
	309	break;
00af685f	310	#endif /* defined(TARGET_PPC64) */
3cbee15b	311	default:
2ac71179	312	hw_error("Bus model not supported on mac99 machine\n");
3cbee15b	313	exit(1);
0aa6a4a2	314	}
3cbee15b JM	315	}
	316	pic = openpic_init(NULL, &pic_mem_index, smp_cpus, openpic_irqs, NULL);
	317	pci_bus = pci_pmac_init(pic);
	318	/* init basic PC hardware */
fbe1b595	319	pci_vga_init(pci_bus, vga_bios_offset, vga_bios_size);
aae9366a	320
3cbee15b JM	321	/* XXX: suppress that */
	322	dummy_irq = i8259_init(NULL);
	323
aeeb69c7 AJ	324	escc_mem_index = escc_init(0x80013000, dummy_irq[4], dummy_irq[5],
aeeb69c7 AJ	325	serial_hds[0], serial_hds[1], ESCC_CLOCK, 4);
cb457d76 AL	326
cb457d76 AL	327	for(i = 0; i < nb_nics; i++)
07caea31	328	pci_nic_init_nofail(&nd_table[i], "ne2k_pci", NULL);
cb457d76	329
e4bcb14c TS	330	if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
	331	fprintf(stderr, "qemu: too many IDE bus\n");
	332	exit(1);
	333	}
	334	for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
f455e98c	335	hd[i] = drive_get(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
e4bcb14c	336	}
28ce5ce6	337	dbdma = DBDMA_init(&dbdma_mem_index);
77f0435e BS	338	pci_cmd646_ide_init(pci_bus, hd, 0);
77f0435e BS	339
3cbee15b JM	340	/* cuda also initialize ADB */
3cbee15b JM	341	cuda_init(&cuda_mem_index, pic[0x19]);
aae9366a	342
3cbee15b JM	343	adb_kbd_init(&adb_bus);
3cbee15b JM	344	adb_mouse_init(&adb_bus);
3b46e624	345
3b46e624	346
4ebcf884	347	macio_init(pci_bus, PCI_DEVICE_ID_APPLE_UNI_N_KEYL, 0, pic_mem_index,
77f0435e	348	dbdma_mem_index, cuda_mem_index, NULL, 0, NULL,
4ebcf884	349	escc_mem_index);
0d92ed30 PB	350
0d92ed30 PB	351	if (usb_enabled) {
5b19d9a2	352	usb_ohci_init_pci(pci_bus, -1);
0d92ed30 PB	353	}
0d92ed30 PB	354
b6b8bd18 FB	355	if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)
b6b8bd18 FB	356	graphic_depth = 15;
4f3f238b	357
3cbee15b	358	/* The NewWorld NVRAM is not located in the MacIO device */
68af3f24	359	nvr = macio_nvram_init(&nvram_mem_index, 0x2000, 1);
3cbee15b	360	pmac_format_nvram_partition(nvr, 0x2000);
74e91155	361	macio_nvram_map(nvr, 0xFFF04000);
b6b8bd18	362	/* No PCI init: the BIOS will do it */
0aa6a4a2	363
006f3a48 BS	364	fw_cfg = fw_cfg_init(0, 0, CFG_ADDR, CFG_ADDR + 2);
	365	fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
	366	fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
	367	fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, ARCH_MAC99);
513f789f BS	368	fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base);
	369	fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
	370	if (kernel_cmdline) {
	371	fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, CMDLINE_ADDR);
3c178e72	372	pstrcpy_targphys("cmdline", CMDLINE_ADDR, TARGET_PAGE_SIZE, kernel_cmdline);
513f789f BS	373	} else {
	374	fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
	375	}
	376	fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base);
	377	fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
	378	fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device);
10696b4f BS	379
	380	fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_WIDTH, graphic_width);
	381	fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_HEIGHT, graphic_height);
	382	fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_DEPTH, graphic_depth);
	383
513f789f	384	qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
aae9366a	385	}
0aa6a4a2	386
f80f9ec9	387	static QEMUMachine core99_machine = {
4b32e168 AL	388	.name = "mac99",
	389	.desc = "Mac99 based PowerMAC",
	390	.init = ppc_core99_init,
3d878caa	391	.max_cpus = MAX_CPUS,
0aa6a4a2	392	};
f80f9ec9 AL	393
	394	static void core99_machine_init(void)
	395	{
	396	qemu_register_machine(&core99_machine);
	397	}
	398
	399	machine_init(core99_machine_init);