[qemu.git] / hw / pxa2xx_keypad.c

/*
 * Intel PXA27X Keypad Controller emulation.
 *
 * Copyright (c) 2007 MontaVista Software, Inc
 * Written by Armin Kuster <akuster@kama-aina.net>
 *              or  <Akuster@mvista.com>
 *
 * This code is licensed under the GPLv2.
 */

#include "hw.h"
#include "pxa.h"
#include "console.h"

/*
 * Keypad
 */
#define KPC         0x00    /* Keypad Interface Control register */
#define KPDK        0x08    /* Keypad Interface Direct Key register */
#define KPREC       0x10    /* Keypad Interface Rotary Encoder register */
#define KPMK        0x18    /* Keypad Interface Matrix Key register */
#define KPAS        0x20    /* Keypad Interface Automatic Scan register */
#define KPASMKP0    0x28    /* Keypad Interface Automatic Scan Multiple
                                Key Presser register 0 */
#define KPASMKP1    0x30    /* Keypad Interface Automatic Scan Multiple
                                Key Presser register 1 */
#define KPASMKP2    0x38    /* Keypad Interface Automatic Scan Multiple
                                Key Presser register 2 */
#define KPASMKP3    0x40    /* Keypad Interface Automatic Scan Multiple
                                Key Presser register 3 */
#define KPKDI       0x48    /* Keypad Interface Key Debounce Interval
                                register */

/* Keypad defines */
#define KPC_AS          (0x1 << 30)  /* Automatic Scan bit */
#define KPC_ASACT       (0x1 << 29)  /* Automatic Scan on Activity */
#define KPC_MI          (0x1 << 22)  /* Matrix interrupt bit */
#define KPC_IMKP        (0x1 << 21)  /* Ignore Multiple Key Press */
#define KPC_MS7         (0x1 << 20)  /* Matrix scan line 7 */
#define KPC_MS6         (0x1 << 19)  /* Matrix scan line 6 */
#define KPC_MS5         (0x1 << 18)  /* Matrix scan line 5 */
#define KPC_MS4         (0x1 << 17)  /* Matrix scan line 4 */
#define KPC_MS3         (0x1 << 16)  /* Matrix scan line 3 */
#define KPC_MS2         (0x1 << 15)  /* Matrix scan line 2 */
#define KPC_MS1         (0x1 << 14)  /* Matrix scan line 1 */
#define KPC_MS0         (0x1 << 13)  /* Matrix scan line 0 */
#define KPC_ME          (0x1 << 12)  /* Matrix Keypad Enable */
#define KPC_MIE         (0x1 << 11)  /* Matrix Interrupt Enable */
#define KPC_DK_DEB_SEL  (0x1 <<  9)  /* Direct Keypad Debounce Select */
#define KPC_DI          (0x1 <<  5)  /* Direct key interrupt bit */
#define KPC_RE_ZERO_DEB (0x1 <<  4)  /* Rotary Encoder Zero Debounce */
#define KPC_REE1        (0x1 <<  3)  /* Rotary Encoder1 Enable */
#define KPC_REE0        (0x1 <<  2)  /* Rotary Encoder0 Enable */
#define KPC_DE          (0x1 <<  1)  /* Direct Keypad Enable */
#define KPC_DIE         (0x1 <<  0)  /* Direct Keypad interrupt Enable */

#define KPDK_DKP        (0x1 << 31)
#define KPDK_DK7        (0x1 <<  7)
#define KPDK_DK6        (0x1 <<  6)
#define KPDK_DK5        (0x1 <<  5)
#define KPDK_DK4        (0x1 <<  4)
#define KPDK_DK3        (0x1 <<  3)
#define KPDK_DK2        (0x1 <<  2)
#define KPDK_DK1        (0x1 <<  1)
#define KPDK_DK0        (0x1 <<  0)

#define KPREC_OF1       (0x1 << 31)
#define KPREC_UF1       (0x1 << 30)
#define KPREC_OF0       (0x1 << 15)
#define KPREC_UF0       (0x1 << 14)

#define KPMK_MKP        (0x1 << 31)
#define KPAS_SO         (0x1 << 31)
#define KPASMKPx_SO     (0x1 << 31)


#define KPASMKPx_MKC(row, col)  (1 << (row + 16 * (col % 2)))

#define PXAKBD_MAXROW   8
#define PXAKBD_MAXCOL   8

struct pxa2xx_keypad_s{
    target_phys_addr_t base;
    qemu_irq    irq;
    struct  keymap *map;

    uint32_t    kpc;
    uint32_t    kpdk;
    uint32_t    kprec;
    uint32_t    kpmk;
    uint32_t    kpas;
    uint32_t    kpasmkp0;
    uint32_t    kpasmkp1;
    uint32_t    kpasmkp2;
    uint32_t    kpasmkp3;
    uint32_t    kpkdi;
};

static void pxa27x_keyboard_event (struct  pxa2xx_keypad_s *kp, int keycode)
{
    int row, col,rel;

    if(!(kp->kpc & KPC_ME)) /* skip if not enabled */
        return;

    if(kp->kpc & KPC_AS || kp->kpc & KPC_ASACT) {
        if(kp->kpc & KPC_AS)
            kp->kpc &= ~(KPC_AS);

        rel = (keycode & 0x80) ? 1 : 0; /* key release from qemu */
        keycode &= ~(0x80); /* strip qemu key release bit */
        row = kp->map[keycode].row;
        col = kp->map[keycode].column;
        if(row == -1 || col == -1)
            return;
        switch (col) {
        case 0:
        case 1:
            if(rel)
                kp->kpasmkp0 = ~(0xffffffff);
            else
                kp->kpasmkp0 |= KPASMKPx_MKC(row,col);
            break;
        case 2:
        case 3:
            if(rel)
                kp->kpasmkp1 = ~(0xffffffff);
            else
                kp->kpasmkp1 |= KPASMKPx_MKC(row,col);
            break;
        case 4:
        case 5:
            if(rel)
                kp->kpasmkp2 = ~(0xffffffff);
            else
                kp->kpasmkp2 |= KPASMKPx_MKC(row,col);
            break;
        case 6:
        case 7:
            if(rel)
                kp->kpasmkp3 = ~(0xffffffff);
            else
                kp->kpasmkp3 |= KPASMKPx_MKC(row,col);
            break;
        } /* switch */
        goto out;
    }
    return;

out:
    if(kp->kpc & KPC_MIE) {
        kp->kpc |= KPC_MI;
        qemu_irq_raise(kp->irq);
    }
    return;
}

static uint32_t pxa2xx_keypad_read(void *opaque, target_phys_addr_t offset)
{
    struct pxa2xx_keypad_s *s = (struct pxa2xx_keypad_s *) opaque;
    uint32_t tmp;
    offset -= s->base;

    switch (offset) {
    case KPC:
        tmp = s->kpc;
        if(tmp & KPC_MI)
            s->kpc &= ~(KPC_MI);
        if(tmp & KPC_DI)
            s->kpc &= ~(KPC_DI);
        qemu_irq_lower(s->irq);
        return tmp;
        break;
    case KPDK:
        return s->kpdk;
        break;
    case KPREC:
        tmp = s->kprec;
        if(tmp & KPREC_OF1)
            s->kprec &= ~(KPREC_OF1);
        if(tmp & KPREC_UF1)
            s->kprec &= ~(KPREC_UF1);
        if(tmp & KPREC_OF0)
            s->kprec &= ~(KPREC_OF0);
        if(tmp & KPREC_UF0)
            s->kprec &= ~(KPREC_UF0);
        return tmp;
        break;
    case KPMK:
        tmp = s->kpmk;
        if(tmp & KPMK_MKP)
            s->kpmk &= ~(KPMK_MKP);
        return tmp;
        break;
    case KPAS:
        return s->kpas;
        break;
    case KPASMKP0:
        return s->kpasmkp0;
        break;
    case KPASMKP1:
        return s->kpasmkp1;
        break;
    case KPASMKP2:
        return s->kpasmkp2;
        break;
    case KPASMKP3:
        return s->kpasmkp3;
        break;
    case KPKDI:
        return s->kpkdi;
        break;
    default:
        cpu_abort(cpu_single_env, "%s: Bad offset " REG_FMT "\n",
                        __FUNCTION__, offset);
    }

    return 0;
}

static void pxa2xx_keypad_write(void *opaque,
                target_phys_addr_t offset, uint32_t value)
{
    struct pxa2xx_keypad_s *s = (struct pxa2xx_keypad_s *) opaque;
    offset -= s->base;

    switch (offset) {
    case KPC:
        s->kpc = value;
        break;
    case KPDK:
        s->kpdk = value;
        break;
    case KPREC:
        s->kprec = value;
        break;
    case KPMK:
        s->kpmk = value;
        break;
    case KPAS:
        s->kpas = value;
        break;
    case KPASMKP0:
        s->kpasmkp0 = value;
        break;
    case KPASMKP1:
        s->kpasmkp1 = value;
        break;
    case KPASMKP2:
        s->kpasmkp2 = value;
        break;
    case KPASMKP3:
        s->kpasmkp3 = value;
        break;
    case KPKDI:
        s->kpkdi = value;
        break;

    default:
        cpu_abort(cpu_single_env, "%s: Bad offset " REG_FMT "\n",
                        __FUNCTION__, offset);
    }
}

static CPUReadMemoryFunc *pxa2xx_keypad_readfn[] = {
    pxa2xx_keypad_read,
    pxa2xx_keypad_read,
    pxa2xx_keypad_read
};

static CPUWriteMemoryFunc *pxa2xx_keypad_writefn[] = {
    pxa2xx_keypad_write,
    pxa2xx_keypad_write,
    pxa2xx_keypad_write
};

static void pxa2xx_keypad_save(QEMUFile *f, void *opaque)
{
    struct pxa2xx_keypad_s *s = (struct pxa2xx_keypad_s *) opaque;

    qemu_put_be32s(f, &s->kpc);
    qemu_put_be32s(f, &s->kpdk);
    qemu_put_be32s(f, &s->kprec);
    qemu_put_be32s(f, &s->kpmk);
    qemu_put_be32s(f, &s->kpas);
    qemu_put_be32s(f, &s->kpasmkp0);
    qemu_put_be32s(f, &s->kpasmkp1);
    qemu_put_be32s(f, &s->kpasmkp2);
    qemu_put_be32s(f, &s->kpasmkp3);
    qemu_put_be32s(f, &s->kpkdi);

}

static int pxa2xx_keypad_load(QEMUFile *f, void *opaque, int version_id)
{
    struct pxa2xx_keypad_s *s = (struct pxa2xx_keypad_s *) opaque;

    qemu_get_be32s(f, &s->kpc);
    qemu_get_be32s(f, &s->kpdk);
    qemu_get_be32s(f, &s->kprec);
    qemu_get_be32s(f, &s->kpmk);
    qemu_get_be32s(f, &s->kpas);
    qemu_get_be32s(f, &s->kpasmkp0);
    qemu_get_be32s(f, &s->kpasmkp1);
    qemu_get_be32s(f, &s->kpasmkp2);
    qemu_get_be32s(f, &s->kpasmkp3);
    qemu_get_be32s(f, &s->kpkdi);

    return 0;
}

struct pxa2xx_keypad_s *pxa27x_keypad_init(target_phys_addr_t base,
        qemu_irq irq)
{
    int iomemtype;
    struct pxa2xx_keypad_s *s;

    s = (struct pxa2xx_keypad_s *) qemu_mallocz(sizeof(struct pxa2xx_keypad_s));
    s->base = base;
    s->irq = irq;

    iomemtype = cpu_register_io_memory(0, pxa2xx_keypad_readfn,
                    pxa2xx_keypad_writefn, s);
    cpu_register_physical_memory(base, 0x00100000, iomemtype);

    register_savevm("pxa2xx_keypad", 0, 0,
                    pxa2xx_keypad_save, pxa2xx_keypad_load, s);

    return s;
}

void pxa27x_register_keypad(struct pxa2xx_keypad_s *kp, struct keymap *map,
        int size)
{
    if(!map || size < 0x80) {
        fprintf(stderr, "%s - No PXA keypad map defined\n", __FUNCTION__);
        exit(-1);
    }

    kp->map = map;
    qemu_add_kbd_event_handler((QEMUPutKBDEvent *) pxa27x_keyboard_event, kp);
}
Commit	Line	Data
31b87f2e AZ	1	/*
	2	* Intel PXA27X Keypad Controller emulation.
	3	*
	4	* Copyright (c) 2007 MontaVista Software, Inc
	5	* Written by Armin Kuster <akuster@kama-aina.net>
	6	* or <Akuster@mvista.com>
	7	*
	8	* This code is licensed under the GPLv2.
	9	*/
	10
	11	#include "hw.h"
	12	#include "pxa.h"
	13	#include "console.h"
	14
	15	/*
	16	* Keypad
	17	*/
	18	#define KPC 0x00 /* Keypad Interface Control register */
	19	#define KPDK 0x08 /* Keypad Interface Direct Key register */
	20	#define KPREC 0x10 /* Keypad Interface Rotary Encoder register */
	21	#define KPMK 0x18 /* Keypad Interface Matrix Key register */
	22	#define KPAS 0x20 /* Keypad Interface Automatic Scan register */
	23	#define KPASMKP0 0x28 /* Keypad Interface Automatic Scan Multiple
	24	Key Presser register 0 */
	25	#define KPASMKP1 0x30 /* Keypad Interface Automatic Scan Multiple
	26	Key Presser register 1 */
	27	#define KPASMKP2 0x38 /* Keypad Interface Automatic Scan Multiple
	28	Key Presser register 2 */
	29	#define KPASMKP3 0x40 /* Keypad Interface Automatic Scan Multiple
	30	Key Presser register 3 */
	31	#define KPKDI 0x48 /* Keypad Interface Key Debounce Interval
	32	register */
	33
	34	/* Keypad defines */
	35	#define KPC_AS (0x1 << 30) /* Automatic Scan bit */
	36	#define KPC_ASACT (0x1 << 29) /* Automatic Scan on Activity */
	37	#define KPC_MI (0x1 << 22) /* Matrix interrupt bit */
	38	#define KPC_IMKP (0x1 << 21) /* Ignore Multiple Key Press */
	39	#define KPC_MS7 (0x1 << 20) /* Matrix scan line 7 */
	40	#define KPC_MS6 (0x1 << 19) /* Matrix scan line 6 */
	41	#define KPC_MS5 (0x1 << 18) /* Matrix scan line 5 */
	42	#define KPC_MS4 (0x1 << 17) /* Matrix scan line 4 */
	43	#define KPC_MS3 (0x1 << 16) /* Matrix scan line 3 */
	44	#define KPC_MS2 (0x1 << 15) /* Matrix scan line 2 */
	45	#define KPC_MS1 (0x1 << 14) /* Matrix scan line 1 */
	46	#define KPC_MS0 (0x1 << 13) /* Matrix scan line 0 */
	47	#define KPC_ME (0x1 << 12) /* Matrix Keypad Enable */
	48	#define KPC_MIE (0x1 << 11) /* Matrix Interrupt Enable */
	49	#define KPC_DK_DEB_SEL (0x1 << 9) /* Direct Keypad Debounce Select */
	50	#define KPC_DI (0x1 << 5) /* Direct key interrupt bit */
	51	#define KPC_RE_ZERO_DEB (0x1 << 4) /* Rotary Encoder Zero Debounce */
	52	#define KPC_REE1 (0x1 << 3) /* Rotary Encoder1 Enable */
	53	#define KPC_REE0 (0x1 << 2) /* Rotary Encoder0 Enable */
	54	#define KPC_DE (0x1 << 1) /* Direct Keypad Enable */
	55	#define KPC_DIE (0x1 << 0) /* Direct Keypad interrupt Enable */
	56
	57	#define KPDK_DKP (0x1 << 31)
	58	#define KPDK_DK7 (0x1 << 7)
	59	#define KPDK_DK6 (0x1 << 6)
	60	#define KPDK_DK5 (0x1 << 5)
	61	#define KPDK_DK4 (0x1 << 4)
	62	#define KPDK_DK3 (0x1 << 3)
	63	#define KPDK_DK2 (0x1 << 2)
	64	#define KPDK_DK1 (0x1 << 1)
65	#define KPDK_DK0 (0x1 << 0)
66
67	#define KPREC_OF1 (0x1 << 31)
68	#define KPREC_UF1 (0x1 << 30)
69	#define KPREC_OF0 (0x1 << 15)
70	#define KPREC_UF0 (0x1 << 14)
71
72	#define KPMK_MKP (0x1 << 31)
73	#define KPAS_SO (0x1 << 31)
74	#define KPASMKPx_SO (0x1 << 31)
75
76
77	#define KPASMKPx_MKC(row, col) (1 << (row + 16 * (col % 2)))
78
79	#define PXAKBD_MAXROW 8
80	#define PXAKBD_MAXCOL 8
81
82	struct pxa2xx_keypad_s{
83	target_phys_addr_t base;
84	qemu_irq irq;
85	struct keymap *map;
86
87	uint32_t kpc;
88	uint32_t kpdk;
89	uint32_t kprec;
90	uint32_t kpmk;
91	uint32_t kpas;
92	uint32_t kpasmkp0;
93	uint32_t kpasmkp1;
94	uint32_t kpasmkp2;
95	uint32_t kpasmkp3;
96	uint32_t kpkdi;
97	};
98
99	static void pxa27x_keyboard_event (struct pxa2xx_keypad_s *kp, int keycode)
100	{
101	int row, col,rel;
102
103	if(!(kp->kpc & KPC_ME)) /* skip if not enabled */
104	return;
105
106	if(kp->kpc & KPC_AS \|\| kp->kpc & KPC_ASACT) {
107	if(kp->kpc & KPC_AS)
108	kp->kpc &= ~(KPC_AS);
109
110	rel = (keycode & 0x80) ? 1 : 0; /* key release from qemu */
111	keycode &= ~(0x80); /* strip qemu key release bit */
112	row = kp->map[keycode].row;
113	col = kp->map[keycode].column;
114	if(row == -1 \|\| col == -1)
115	return;
116	switch (col) {
117	case 0:
118	case 1:
119	if(rel)
120	kp->kpasmkp0 = ~(0xffffffff);
121	else
122	kp->kpasmkp0 \|= KPASMKPx_MKC(row,col);
123	break;
124	case 2:
125	case 3:
126	if(rel)
127	kp->kpasmkp1 = ~(0xffffffff);
128	else
129	kp->kpasmkp1 \|= KPASMKPx_MKC(row,col);
130	break;
131	case 4:
132	case 5:
133	if(rel)
134	kp->kpasmkp2 = ~(0xffffffff);
135	else
136	kp->kpasmkp2 \|= KPASMKPx_MKC(row,col);
137	break;
138	case 6:
139	case 7:
140	if(rel)
141	kp->kpasmkp3 = ~(0xffffffff);
142	else
143	kp->kpasmkp3 \|= KPASMKPx_MKC(row,col);
144	break;
145	} /* switch */
146	goto out;
147	}
148	return;
149
150	out:
151	if(kp->kpc & KPC_MIE) {
152	kp->kpc \|= KPC_MI;
153	qemu_irq_raise(kp->irq);
154	}
155	return;
156	}
157
158	static uint32_t pxa2xx_keypad_read(void *opaque, target_phys_addr_t offset)
159	{
160	struct pxa2xx_keypad_s s = (struct pxa2xx_keypad_s ) opaque;
161	uint32_t tmp;
162	offset -= s->base;
163
164	switch (offset) {
165	case KPC:
166	tmp = s->kpc;
167	if(tmp & KPC_MI)
168	s->kpc &= ~(KPC_MI);
169	if(tmp & KPC_DI)
170	s->kpc &= ~(KPC_DI);
171	qemu_irq_lower(s->irq);
172	return tmp;
173	break;
174	case KPDK:
175	return s->kpdk;
176	break;
177	case KPREC:
178	tmp = s->kprec;
179	if(tmp & KPREC_OF1)
180	s->kprec &= ~(KPREC_OF1);
181	if(tmp & KPREC_UF1)
182	s->kprec &= ~(KPREC_UF1);
183	if(tmp & KPREC_OF0)
184	s->kprec &= ~(KPREC_OF0);
185	if(tmp & KPREC_UF0)
186	s->kprec &= ~(KPREC_UF0);
187	return tmp;
188	break;
189	case KPMK:
190	tmp = s->kpmk;
191	if(tmp & KPMK_MKP)
192	s->kpmk &= ~(KPMK_MKP);
193	return tmp;
194	break;
195	case KPAS:
196	return s->kpas;
197	break;
198	case KPASMKP0:
199	return s->kpasmkp0;
200	break;
201	case KPASMKP1:
202	return s->kpasmkp1;
203	break;
204	case KPASMKP2:
205	return s->kpasmkp2;
206	break;
207	case KPASMKP3:
208	return s->kpasmkp3;
209	break;
210	case KPKDI:
211	return s->kpkdi;
212	break;
213	default:
214	cpu_abort(cpu_single_env, "%s: Bad offset " REG_FMT "\n",
215	__FUNCTION__, offset);
216	}
217
218	return 0;
219	}
220
221	static void pxa2xx_keypad_write(void *opaque,
222	target_phys_addr_t offset, uint32_t value)
223	{
224	struct pxa2xx_keypad_s s = (struct pxa2xx_keypad_s ) opaque;
225	offset -= s->base;
226
227	switch (offset) {
228	case KPC:
229	s->kpc = value;
230	break;
231	case KPDK:
232	s->kpdk = value;
233	break;
234	case KPREC:
235	s->kprec = value;
236	break;
237	case KPMK:
238	s->kpmk = value;
239	break;
240	case KPAS:
241	s->kpas = value;
242	break;
243	case KPASMKP0:
244	s->kpasmkp0 = value;
245	break;
246	case KPASMKP1:
247	s->kpasmkp1 = value;
248	break;
249	case KPASMKP2:
250	s->kpasmkp2 = value;
251	break;
252	case KPASMKP3:
253	s->kpasmkp3 = value;
254	break;
255	case KPKDI:
256	s->kpkdi = value;
257	break;
258
259	default:
260	cpu_abort(cpu_single_env, "%s: Bad offset " REG_FMT "\n",
261	__FUNCTION__, offset);
262	}
263	}
264
265	static CPUReadMemoryFunc *pxa2xx_keypad_readfn[] = {
266	pxa2xx_keypad_read,
267	pxa2xx_keypad_read,
268	pxa2xx_keypad_read
269	};
270
271	static CPUWriteMemoryFunc *pxa2xx_keypad_writefn[] = {
272	pxa2xx_keypad_write,
273	pxa2xx_keypad_write,
274	pxa2xx_keypad_write
275	};
276
277	static void pxa2xx_keypad_save(QEMUFile f, void opaque)
278	{
279	struct pxa2xx_keypad_s s = (struct pxa2xx_keypad_s ) opaque;
280
281	qemu_put_be32s(f, &s->kpc);
282	qemu_put_be32s(f, &s->kpdk);
283	qemu_put_be32s(f, &s->kprec);
284	qemu_put_be32s(f, &s->kpmk);
285	qemu_put_be32s(f, &s->kpas);
286	qemu_put_be32s(f, &s->kpasmkp0);
287	qemu_put_be32s(f, &s->kpasmkp1);
288	qemu_put_be32s(f, &s->kpasmkp2);
289	qemu_put_be32s(f, &s->kpasmkp3);
290	qemu_put_be32s(f, &s->kpkdi);
291
292	}
293
294	static int pxa2xx_keypad_load(QEMUFile f, void opaque, int version_id)
295	{
296	struct pxa2xx_keypad_s s = (struct pxa2xx_keypad_s ) opaque;
297
298	qemu_get_be32s(f, &s->kpc);
299	qemu_get_be32s(f, &s->kpdk);
300	qemu_get_be32s(f, &s->kprec);
301	qemu_get_be32s(f, &s->kpmk);
302	qemu_get_be32s(f, &s->kpas);
303	qemu_get_be32s(f, &s->kpasmkp0);
304	qemu_get_be32s(f, &s->kpasmkp1);
305	qemu_get_be32s(f, &s->kpasmkp2);
306	qemu_get_be32s(f, &s->kpasmkp3);
307	qemu_get_be32s(f, &s->kpkdi);
308
309	return 0;
310	}
311
312	struct pxa2xx_keypad_s *pxa27x_keypad_init(target_phys_addr_t base,
313	qemu_irq irq)
314	{
315	int iomemtype;
316	struct pxa2xx_keypad_s *s;
317
318	s = (struct pxa2xx_keypad_s *) qemu_mallocz(sizeof(struct pxa2xx_keypad_s));
319	s->base = base;
320	s->irq = irq;
321
322	iomemtype = cpu_register_io_memory(0, pxa2xx_keypad_readfn,
323	pxa2xx_keypad_writefn, s);
bd464c2e	324	cpu_register_physical_memory(base, 0x00100000, iomemtype);
31b87f2e AZ	325
	326	register_savevm("pxa2xx_keypad", 0, 0,
	327	pxa2xx_keypad_save, pxa2xx_keypad_load, s);
	328
	329	return s;
	330	}
	331
	332	void pxa27x_register_keypad(struct pxa2xx_keypad_s kp, struct keymap map,
	333	int size)
	334	{
bd464c2e	335	if(!map \|\| size < 0x80) {
31b87f2e AZ	336	fprintf(stderr, "%s - No PXA keypad map defined\n", __FUNCTION__);
	337	exit(-1);
	338	}
	339
	340	kp->map = map;
	341	qemu_add_kbd_event_handler((QEMUPutKBDEvent *) pxa27x_keyboard_event, kp);
	342	}