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5fafdf24 1/*
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2 * ARM RealView Baseboard System emulation.
3 *
a1bb27b1 4 * Copyright (c) 2006-2007 CodeSourcery.
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5 * Written by Paul Brook
6 *
7 * This code is licenced under the GPL.
8 */
9
2e9bdce5 10#include "sysbus.h"
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11#include "arm-misc.h"
12#include "primecell.h"
13#include "devices.h"
14#include "pci.h"
15#include "net.h"
16#include "sysemu.h"
17#include "boards.h"
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18
19/* Board init. */
20
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21static struct arm_boot_info realview_binfo = {
22 .loader_start = 0x0,
52b43737 23 .smp_loader_start = 0x80000000,
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24 .board_id = 0x33b,
25};
26
fbe1b595 27static void realview_init(ram_addr_t ram_size,
3023f332 28 const char *boot_device,
e69954b9 29 const char *kernel_filename, const char *kernel_cmdline,
94fc95cd 30 const char *initrd_filename, const char *cpu_model)
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31{
32 CPUState *env;
7ffab4d7 33 ram_addr_t ram_offset;
d537cf6c 34 qemu_irq *pic;
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35 PCIBus *pci_bus;
36 NICInfo *nd;
37 int n;
38 int done_smc = 0;
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39 qemu_irq cpu_irq[4];
40 int ncpu;
e4bcb14c 41 int index;
e69954b9 42
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43 if (!cpu_model)
44 cpu_model = "arm926";
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45 /* FIXME: obey smp_cpus. */
46 if (strcmp(cpu_model, "arm11mpcore") == 0) {
47 ncpu = 4;
48 } else {
49 ncpu = 1;
50 }
51
52 for (n = 0; n < ncpu; n++) {
53 env = cpu_init(cpu_model);
54 if (!env) {
55 fprintf(stderr, "Unable to find CPU definition\n");
56 exit(1);
57 }
58 pic = arm_pic_init_cpu(env);
59 cpu_irq[n] = pic[ARM_PIC_CPU_IRQ];
60 if (n > 0) {
61 /* Set entry point for secondary CPUs. This assumes we're using
62 the init code from arm_boot.c. Real hardware resets all CPUs
63 the same. */
64 env->regs[15] = 0x80000000;
65 }
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66 }
67
7ffab4d7 68 ram_offset = qemu_ram_alloc(ram_size);
1235fc06 69 /* ??? RAM should repeat to fill physical memory space. */
e69954b9 70 /* SDRAM at address zero. */
7ffab4d7 71 cpu_register_physical_memory(0, ram_size, ram_offset | IO_MEM_RAM);
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72
73 arm_sysctl_init(0x10000000, 0xc1400400);
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74
75 if (ncpu == 1) {
76 /* ??? The documentation says GIC1 is nFIQ and either GIC2 or GIC3
77 is nIRQ (there are inconsistencies). However Linux 2.6.17 expects
78 GIC1 to be nIRQ and ignores all the others, so do that for now. */
79 pic = realview_gic_init(0x10040000, cpu_irq[0]);
80 } else {
81 pic = mpcore_irq_init(cpu_irq);
82 }
83
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84 sysbus_create_simple("pl050_keyboard", 0x10006000, pic[20]);
85 sysbus_create_simple("pl050_mouse", 0x10007000, pic[21]);
e69954b9 86
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87 sysbus_create_simple("pl011", 0x10009000, pic[12]);
88 sysbus_create_simple("pl011", 0x1000a000, pic[13]);
89 sysbus_create_simple("pl011", 0x1000b000, pic[14]);
90 sysbus_create_simple("pl011", 0x1000c000, pic[15]);
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91
92 /* DMA controller is optional, apparently. */
d537cf6c 93 pl080_init(0x10030000, pic[24], 2);
e69954b9 94
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95 sp804_init(0x10011000, pic[4]);
96 sp804_init(0x10012000, pic[5]);
e69954b9 97
2e9bdce5 98 sysbus_create_simple("pl110_versatile", 0x10020000, pic[23]);
e69954b9 99
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100 index = drive_get_index(IF_SD, 0, 0);
101 if (index == -1) {
102 fprintf(stderr, "qemu: missing SecureDigital card\n");
103 exit(1);
104 }
105 pl181_init(0x10005000, drives_table[index].bdrv, pic[17], pic[18]);
a1bb27b1 106
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107 pl031_init(0x10017000, pic[10]);
108
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109 pci_bus = pci_vpb_init(pic, 48, 1);
110 if (usb_enabled) {
e24ad6f1 111 usb_ohci_init_pci(pci_bus, 3, -1);
e69954b9 112 }
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113 n = drive_get_max_bus(IF_SCSI);
114 while (n >= 0) {
115 pci_create_simple(pci_bus, -1, "lsi53c895a");
116 n--;
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117 }
118 for(n = 0; n < nb_nics; n++) {
119 nd = &nd_table[n];
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120
121 if ((!nd->model && !done_smc) || strcmp(nd->model, "smc91c111") == 0) {
d537cf6c 122 smc91c111_init(nd, 0x4e000000, pic[28]);
0ae18cee 123 done_smc = 1;
e69954b9 124 } else {
cb457d76 125 pci_nic_init(pci_bus, nd, -1, "rtl8139");
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126 }
127 }
128
129 /* Memory map for RealView Emulation Baseboard: */
130 /* 0x10000000 System registers. */
131 /* 0x10001000 System controller. */
132 /* 0x10002000 Two-Wire Serial Bus. */
133 /* 0x10003000 Reserved. */
134 /* 0x10004000 AACI. */
135 /* 0x10005000 MCI. */
136 /* 0x10006000 KMI0. */
137 /* 0x10007000 KMI1. */
138 /* 0x10008000 Character LCD. */
139 /* 0x10009000 UART0. */
140 /* 0x1000a000 UART1. */
141 /* 0x1000b000 UART2. */
142 /* 0x1000c000 UART3. */
143 /* 0x1000d000 SSPI. */
144 /* 0x1000e000 SCI. */
145 /* 0x1000f000 Reserved. */
146 /* 0x10010000 Watchdog. */
147 /* 0x10011000 Timer 0+1. */
148 /* 0x10012000 Timer 2+3. */
149 /* 0x10013000 GPIO 0. */
150 /* 0x10014000 GPIO 1. */
151 /* 0x10015000 GPIO 2. */
152 /* 0x10016000 Reserved. */
7e1543c2 153 /* 0x10017000 RTC. */
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154 /* 0x10018000 DMC. */
155 /* 0x10019000 PCI controller config. */
156 /* 0x10020000 CLCD. */
157 /* 0x10030000 DMA Controller. */
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158 /* 0x10040000 GIC1. */
159 /* 0x10050000 GIC2. */
160 /* 0x10060000 GIC3. */
161 /* 0x10070000 GIC4. */
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162 /* 0x10080000 SMC. */
163 /* 0x40000000 NOR flash. */
164 /* 0x44000000 DoC flash. */
165 /* 0x48000000 SRAM. */
166 /* 0x4c000000 Configuration flash. */
167 /* 0x4e000000 Ethernet. */
168 /* 0x4f000000 USB. */
169 /* 0x50000000 PISMO. */
170 /* 0x54000000 PISMO. */
171 /* 0x58000000 PISMO. */
172 /* 0x5c000000 PISMO. */
173 /* 0x60000000 PCI. */
174 /* 0x61000000 PCI Self Config. */
175 /* 0x62000000 PCI Config. */
176 /* 0x63000000 PCI IO. */
177 /* 0x64000000 PCI mem 0. */
178 /* 0x68000000 PCI mem 1. */
179 /* 0x6c000000 PCI mem 2. */
180
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181 /* ??? Hack to map an additional page of ram for the secondary CPU
182 startup code. I guess this works on real hardware because the
183 BootROM happens to be in ROM/flash or in memory that isn't clobbered
184 until after Linux boots the secondary CPUs. */
185 ram_offset = qemu_ram_alloc(0x1000);
186 cpu_register_physical_memory(0x80000000, 0x1000, ram_offset | IO_MEM_RAM);
187
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188 realview_binfo.ram_size = ram_size;
189 realview_binfo.kernel_filename = kernel_filename;
190 realview_binfo.kernel_cmdline = kernel_cmdline;
191 realview_binfo.initrd_filename = initrd_filename;
192 realview_binfo.nb_cpus = ncpu;
193 arm_load_kernel(first_cpu, &realview_binfo);
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194}
195
196QEMUMachine realview_machine = {
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197 .name = "realview",
198 .desc = "ARM RealView Emulation Baseboard (ARM926EJ-S)",
199 .init = realview_init,
c9b1ae2c 200 .use_scsi = 1,
e69954b9 201};