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CommitLineData
27503323
FB
1/*
2 * QEMU Soundblaster 16 emulation
1d14ffa9
FB
3 *
4 * Copyright (c) 2003-2005 Vassili Karpov (malc)
5 *
27503323
FB
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
87ecb68b
PB
24#include "hw.h"
25#include "audiodev.h"
26#include "audio/audio.h"
27#include "isa.h"
f7b4f61f 28#include "qdev.h"
87ecb68b 29#include "qemu-timer.h"
057fa65c 30#include "host-utils.h"
27503323 31
fb065187 32#define dolog(...) AUD_log ("sb16", __VA_ARGS__)
15b61470
FB
33
34/* #define DEBUG */
35/* #define DEBUG_SB16_MOST */
36
fb065187
FB
37#ifdef DEBUG
38#define ldebug(...) dolog (__VA_ARGS__)
39#else
40#define ldebug(...)
41#endif
42
85571bc7 43#define IO_READ_PROTO(name) \
7d977de7 44 uint32_t name (void *opaque, uint32_t nport)
85571bc7 45#define IO_WRITE_PROTO(name) \
7d977de7 46 void name (void *opaque, uint32_t nport, uint32_t val)
27503323 47
85571bc7 48static const char e3[] = "COPYRIGHT (C) CREATIVE TECHNOLOGY LTD, 1992.";
d329a6fb 49
5e2a6443 50typedef struct SB16State {
f7b4f61f 51 ISADevice dev;
c0fe3827 52 QEMUSoundCard card;
3a38d437 53 qemu_irq pic;
f7b4f61f
GH
54 uint32_t irq;
55 uint32_t dma;
56 uint32_t hdma;
57 uint32_t port;
58 uint32_t ver;
85571bc7 59
27503323
FB
60 int in_index;
61 int out_data_len;
62 int fmt_stereo;
63 int fmt_signed;
64 int fmt_bits;
85571bc7 65 audfmt_e fmt;
27503323 66 int dma_auto;
85571bc7 67 int block_size;
27503323
FB
68 int fifo;
69 int freq;
70 int time_const;
71 int speaker;
72 int needed_bytes;
73 int cmd;
27503323 74 int use_hdma;
85571bc7
FB
75 int highspeed;
76 int can_write;
27503323
FB
77
78 int v2x6;
79
85571bc7
FB
80 uint8_t csp_param;
81 uint8_t csp_value;
82 uint8_t csp_mode;
83 uint8_t csp_regs[256];
84 uint8_t csp_index;
85 uint8_t csp_reg83[4];
86 int csp_reg83r;
87 int csp_reg83w;
88
d75d9f6b 89 uint8_t in2_data[10];
85571bc7
FB
90 uint8_t out_data[50];
91 uint8_t test_reg;
92 uint8_t last_read_byte;
93 int nzero;
27503323
FB
94
95 int left_till_irq;
27503323 96
85571bc7
FB
97 int dma_running;
98 int bytes_per_second;
99 int align;
1d14ffa9
FB
100 int audio_free;
101 SWVoiceOut *voice;
85571bc7 102
1d14ffa9 103 QEMUTimer *aux_ts;
5e2a6443
FB
104 /* mixer state */
105 int mixer_nreg;
202a456a 106 uint8_t mixer_regs[256];
5e2a6443 107} SB16State;
27503323 108
1d14ffa9
FB
109static void SB_audio_callback (void *opaque, int free);
110
85571bc7
FB
111static int magic_of_irq (int irq)
112{
113 switch (irq) {
114 case 5:
115 return 2;
116 case 7:
117 return 4;
118 case 9:
119 return 1;
120 case 10:
121 return 8;
122 default:
123 dolog ("bad irq %d\n", irq);
124 return 2;
125 }
126}
127
128static int irq_of_magic (int magic)
129{
130 switch (magic) {
131 case 1:
132 return 9;
133 case 2:
134 return 5;
135 case 4:
136 return 7;
137 case 8:
138 return 10;
139 default:
140 dolog ("bad irq magic %d\n", magic);
141 return -1;
142 }
143}
144
145#if 0
5e2a6443
FB
146static void log_dsp (SB16State *dsp)
147{
85571bc7
FB
148 ldebug ("%s:%s:%d:%s:dmasize=%d:freq=%d:const=%d:speaker=%d\n",
149 dsp->fmt_stereo ? "Stereo" : "Mono",
150 dsp->fmt_signed ? "Signed" : "Unsigned",
151 dsp->fmt_bits,
152 dsp->dma_auto ? "Auto" : "Single",
153 dsp->block_size,
154 dsp->freq,
155 dsp->time_const,
156 dsp->speaker);
157}
158#endif
159
160static void speaker (SB16State *s, int on)
161{
162 s->speaker = on;
163 /* AUD_enable (s->voice, on); */
27503323
FB
164}
165
85571bc7 166static void control (SB16State *s, int hold)
27503323 167{
85571bc7
FB
168 int dma = s->use_hdma ? s->hdma : s->dma;
169 s->dma_running = hold;
170
171 ldebug ("hold %d high %d dma %d\n", hold, s->use_hdma, dma);
172
27503323 173 if (hold) {
85571bc7 174 DMA_hold_DREQ (dma);
1d14ffa9 175 AUD_set_active_out (s->voice, 1);
27503323
FB
176 }
177 else {
85571bc7 178 DMA_release_DREQ (dma);
1d14ffa9 179 AUD_set_active_out (s->voice, 0);
27503323
FB
180 }
181}
182
85571bc7 183static void aux_timer (void *opaque)
27503323 184{
85571bc7
FB
185 SB16State *s = opaque;
186 s->can_write = 1;
3a38d437 187 qemu_irq_raise (s->pic);
85571bc7
FB
188}
189
190#define DMA8_AUTO 1
191#define DMA8_HIGH 2
192
feea13e1
FB
193static void continue_dma8 (SB16State *s)
194{
195 if (s->freq > 0) {
1ea879e5 196 struct audsettings as;
feea13e1
FB
197
198 s->audio_free = 0;
199
200 as.freq = s->freq;
201 as.nchannels = 1 << s->fmt_stereo;
202 as.fmt = s->fmt;
d929eba5 203 as.endianness = 0;
feea13e1
FB
204
205 s->voice = AUD_open_out (
206 &s->card,
207 s->voice,
208 "sb16",
209 s,
210 SB_audio_callback,
d929eba5 211 &as
feea13e1
FB
212 );
213 }
214
215 control (s, 1);
216}
217
85571bc7
FB
218static void dma_cmd8 (SB16State *s, int mask, int dma_len)
219{
220 s->fmt = AUD_FMT_U8;
221 s->use_hdma = 0;
222 s->fmt_bits = 8;
223 s->fmt_signed = 0;
224 s->fmt_stereo = (s->mixer_regs[0x0e] & 2) != 0;
225 if (-1 == s->time_const) {
feea13e1
FB
226 if (s->freq <= 0)
227 s->freq = 11025;
85571bc7
FB
228 }
229 else {
230 int tmp = (256 - s->time_const);
231 s->freq = (1000000 + (tmp / 2)) / tmp;
232 }
233
1d14ffa9 234 if (dma_len != -1) {
15b61470 235 s->block_size = dma_len << s->fmt_stereo;
1d14ffa9 236 }
15b61470
FB
237 else {
238 /* This is apparently the only way to make both Act1/PL
239 and SecondReality/FC work
240
241 Act1 sets block size via command 0x48 and it's an odd number
242 SR does the same with even number
243 Both use stereo, and Creatives own documentation states that
244 0x48 sets block size in bytes less one.. go figure */
245 s->block_size &= ~s->fmt_stereo;
246 }
85571bc7
FB
247
248 s->freq >>= s->fmt_stereo;
249 s->left_till_irq = s->block_size;
250 s->bytes_per_second = (s->freq << s->fmt_stereo);
251 /* s->highspeed = (mask & DMA8_HIGH) != 0; */
252 s->dma_auto = (mask & DMA8_AUTO) != 0;
253 s->align = (1 << s->fmt_stereo) - 1;
254
1d14ffa9
FB
255 if (s->block_size & s->align) {
256 dolog ("warning: misaligned block size %d, alignment %d\n",
257 s->block_size, s->align + 1);
258 }
15b61470 259
85571bc7
FB
260 ldebug ("freq %d, stereo %d, sign %d, bits %d, "
261 "dma %d, auto %d, fifo %d, high %d\n",
262 s->freq, s->fmt_stereo, s->fmt_signed, s->fmt_bits,
263 s->block_size, s->dma_auto, s->fifo, s->highspeed);
264
feea13e1 265 continue_dma8 (s);
85571bc7
FB
266 speaker (s, 1);
267}
27503323 268
85571bc7
FB
269static void dma_cmd (SB16State *s, uint8_t cmd, uint8_t d0, int dma_len)
270{
271 s->use_hdma = cmd < 0xc0;
272 s->fifo = (cmd >> 1) & 1;
273 s->dma_auto = (cmd >> 2) & 1;
274 s->fmt_signed = (d0 >> 4) & 1;
275 s->fmt_stereo = (d0 >> 5) & 1;
27503323
FB
276
277 switch (cmd >> 4) {
278 case 11:
85571bc7 279 s->fmt_bits = 16;
27503323
FB
280 break;
281
282 case 12:
85571bc7 283 s->fmt_bits = 8;
27503323
FB
284 break;
285 }
286
85571bc7
FB
287 if (-1 != s->time_const) {
288#if 1
289 int tmp = 256 - s->time_const;
290 s->freq = (1000000 + (tmp / 2)) / tmp;
291#else
292 /* s->freq = 1000000 / ((255 - s->time_const) << s->fmt_stereo); */
293 s->freq = 1000000 / ((255 - s->time_const));
294#endif
295 s->time_const = -1;
27503323 296 }
27503323 297
85571bc7
FB
298 s->block_size = dma_len + 1;
299 s->block_size <<= (s->fmt_bits == 16);
15b61470
FB
300 if (!s->dma_auto) {
301 /* It is clear that for DOOM and auto-init this value
302 shouldn't take stereo into account, while Miles Sound Systems
303 setsound.exe with single transfer mode wouldn't work without it
304 wonders of SB16 yet again */
85571bc7 305 s->block_size <<= s->fmt_stereo;
15b61470 306 }
27503323 307
85571bc7
FB
308 ldebug ("freq %d, stereo %d, sign %d, bits %d, "
309 "dma %d, auto %d, fifo %d, high %d\n",
310 s->freq, s->fmt_stereo, s->fmt_signed, s->fmt_bits,
311 s->block_size, s->dma_auto, s->fifo, s->highspeed);
27503323 312
85571bc7
FB
313 if (16 == s->fmt_bits) {
314 if (s->fmt_signed) {
315 s->fmt = AUD_FMT_S16;
27503323
FB
316 }
317 else {
85571bc7 318 s->fmt = AUD_FMT_U16;
27503323
FB
319 }
320 }
321 else {
85571bc7
FB
322 if (s->fmt_signed) {
323 s->fmt = AUD_FMT_S8;
27503323
FB
324 }
325 else {
85571bc7 326 s->fmt = AUD_FMT_U8;
27503323
FB
327 }
328 }
329
85571bc7 330 s->left_till_irq = s->block_size;
27503323 331
85571bc7
FB
332 s->bytes_per_second = (s->freq << s->fmt_stereo) << (s->fmt_bits == 16);
333 s->highspeed = 0;
334 s->align = (1 << (s->fmt_stereo + (s->fmt_bits == 16))) - 1;
1d14ffa9
FB
335 if (s->block_size & s->align) {
336 dolog ("warning: misaligned block size %d, alignment %d\n",
337 s->block_size, s->align + 1);
338 }
27503323 339
1d14ffa9 340 if (s->freq) {
1ea879e5 341 struct audsettings as;
c0fe3827 342
1d14ffa9 343 s->audio_free = 0;
c0fe3827
FB
344
345 as.freq = s->freq;
346 as.nchannels = 1 << s->fmt_stereo;
347 as.fmt = s->fmt;
d929eba5 348 as.endianness = 0;
c0fe3827 349
1d14ffa9 350 s->voice = AUD_open_out (
c0fe3827 351 &s->card,
1d14ffa9
FB
352 s->voice,
353 "sb16",
354 s,
355 SB_audio_callback,
d929eba5 356 &as
1d14ffa9
FB
357 );
358 }
27503323 359
85571bc7
FB
360 control (s, 1);
361 speaker (s, 1);
27503323
FB
362}
363
85571bc7 364static inline void dsp_out_data (SB16State *s, uint8_t val)
202a456a 365{
85571bc7 366 ldebug ("outdata %#x\n", val);
c0fe3827 367 if ((size_t) s->out_data_len < sizeof (s->out_data)) {
85571bc7 368 s->out_data[s->out_data_len++] = val;
1d14ffa9 369 }
202a456a
FB
370}
371
85571bc7 372static inline uint8_t dsp_get_data (SB16State *s)
d75d9f6b 373{
1d14ffa9 374 if (s->in_index) {
85571bc7 375 return s->in2_data[--s->in_index];
1d14ffa9 376 }
85571bc7
FB
377 else {
378 dolog ("buffer underflow\n");
d75d9f6b 379 return 0;
85571bc7 380 }
d75d9f6b
FB
381}
382
85571bc7 383static void command (SB16State *s, uint8_t cmd)
27503323 384{
85571bc7 385 ldebug ("command %#x\n", cmd);
27503323
FB
386
387 if (cmd > 0xaf && cmd < 0xd0) {
85571bc7
FB
388 if (cmd & 8) {
389 dolog ("ADC not yet supported (command %#x)\n", cmd);
390 }
27503323
FB
391
392 switch (cmd >> 4) {
393 case 11:
394 case 12:
395 break;
396 default:
85571bc7 397 dolog ("%#x wrong bits\n", cmd);
27503323 398 }
85571bc7 399 s->needed_bytes = 3;
27503323
FB
400 }
401 else {
1d14ffa9
FB
402 s->needed_bytes = 0;
403
27503323 404 switch (cmd) {
d75d9f6b 405 case 0x03:
85571bc7
FB
406 dsp_out_data (s, 0x10); /* s->csp_param); */
407 goto warn;
408
d329a6fb 409 case 0x04:
85571bc7
FB
410 s->needed_bytes = 1;
411 goto warn;
d329a6fb
FB
412
413 case 0x05:
85571bc7
FB
414 s->needed_bytes = 2;
415 goto warn;
416
417 case 0x08:
418 /* __asm__ ("int3"); */
419 goto warn;
d75d9f6b 420
d329a6fb 421 case 0x0e:
85571bc7
FB
422 s->needed_bytes = 2;
423 goto warn;
424
425 case 0x09:
426 dsp_out_data (s, 0xf8);
427 goto warn;
d329a6fb
FB
428
429 case 0x0f:
85571bc7
FB
430 s->needed_bytes = 1;
431 goto warn;
d329a6fb 432
27503323 433 case 0x10:
85571bc7
FB
434 s->needed_bytes = 1;
435 goto warn;
27503323
FB
436
437 case 0x14:
85571bc7
FB
438 s->needed_bytes = 2;
439 s->block_size = 0;
27503323
FB
440 break;
441
15b61470 442 case 0x1c: /* Auto-Initialize DMA DAC, 8-bit */
feea13e1 443 dma_cmd8 (s, DMA8_AUTO, -1);
15b61470
FB
444 break;
445
85571bc7
FB
446 case 0x20: /* Direct ADC, Juice/PL */
447 dsp_out_data (s, 0xff);
448 goto warn;
27503323
FB
449
450 case 0x35:
1d14ffa9 451 dolog ("0x35 - MIDI command not implemented\n");
27503323
FB
452 break;
453
454 case 0x40:
85571bc7
FB
455 s->freq = -1;
456 s->time_const = -1;
457 s->needed_bytes = 1;
27503323
FB
458 break;
459
460 case 0x41:
85571bc7
FB
461 s->freq = -1;
462 s->time_const = -1;
463 s->needed_bytes = 2;
27503323
FB
464 break;
465
85571bc7
FB
466 case 0x42:
467 s->freq = -1;
468 s->time_const = -1;
469 s->needed_bytes = 2;
470 goto warn;
471
d75d9f6b 472 case 0x45:
85571bc7
FB
473 dsp_out_data (s, 0xaa);
474 goto warn;
475
27503323
FB
476 case 0x47: /* Continue Auto-Initialize DMA 16bit */
477 break;
478
479 case 0x48:
85571bc7 480 s->needed_bytes = 2;
27503323
FB
481 break;
482
1d14ffa9
FB
483 case 0x74:
484 s->needed_bytes = 2; /* DMA DAC, 4-bit ADPCM */
485 dolog ("0x75 - DMA DAC, 4-bit ADPCM not implemented\n");
486 break;
487
488 case 0x75: /* DMA DAC, 4-bit ADPCM Reference */
489 s->needed_bytes = 2;
490 dolog ("0x74 - DMA DAC, 4-bit ADPCM Reference not implemented\n");
491 break;
492
493 case 0x76: /* DMA DAC, 2.6-bit ADPCM */
494 s->needed_bytes = 2;
495 dolog ("0x74 - DMA DAC, 2.6-bit ADPCM not implemented\n");
496 break;
497
498 case 0x77: /* DMA DAC, 2.6-bit ADPCM Reference */
499 s->needed_bytes = 2;
500 dolog ("0x74 - DMA DAC, 2.6-bit ADPCM Reference not implemented\n");
501 break;
502
503 case 0x7d:
504 dolog ("0x7d - Autio-Initialize DMA DAC, 4-bit ADPCM Reference\n");
505 dolog ("not implemented\n");
506 break;
507
508 case 0x7f:
509 dolog (
510 "0x7d - Autio-Initialize DMA DAC, 2.6-bit ADPCM Reference\n"
511 );
512 dolog ("not implemented\n");
513 break;
514
27503323 515 case 0x80:
85571bc7 516 s->needed_bytes = 2;
27503323
FB
517 break;
518
519 case 0x90:
520 case 0x91:
85571bc7
FB
521 dma_cmd8 (s, ((cmd & 1) == 0) | DMA8_HIGH, -1);
522 break;
27503323 523
85571bc7
FB
524 case 0xd0: /* halt DMA operation. 8bit */
525 control (s, 0);
526 break;
27503323 527
85571bc7
FB
528 case 0xd1: /* speaker on */
529 speaker (s, 1);
27503323
FB
530 break;
531
85571bc7
FB
532 case 0xd3: /* speaker off */
533 speaker (s, 0);
534 break;
27503323 535
85571bc7 536 case 0xd4: /* continue DMA operation. 8bit */
feea13e1
FB
537 /* KQ6 (or maybe Sierras audblst.drv in general) resets
538 the frequency between halt/continue */
539 continue_dma8 (s);
27503323
FB
540 break;
541
85571bc7
FB
542 case 0xd5: /* halt DMA operation. 16bit */
543 control (s, 0);
27503323
FB
544 break;
545
85571bc7
FB
546 case 0xd6: /* continue DMA operation. 16bit */
547 control (s, 1);
27503323
FB
548 break;
549
85571bc7
FB
550 case 0xd9: /* exit auto-init DMA after this block. 16bit */
551 s->dma_auto = 0;
552 break;
27503323 553
85571bc7
FB
554 case 0xda: /* exit auto-init DMA after this block. 8bit */
555 s->dma_auto = 0;
27503323
FB
556 break;
557
1d14ffa9 558 case 0xe0: /* DSP identification */
85571bc7 559 s->needed_bytes = 1;
1d14ffa9 560 break;
27503323
FB
561
562 case 0xe1:
85571bc7
FB
563 dsp_out_data (s, s->ver & 0xff);
564 dsp_out_data (s, s->ver >> 8);
565 break;
566
567 case 0xe2:
568 s->needed_bytes = 1;
569 goto warn;
27503323 570
d329a6fb
FB
571 case 0xe3:
572 {
573 int i;
85571bc7
FB
574 for (i = sizeof (e3) - 1; i >= 0; --i)
575 dsp_out_data (s, e3[i]);
d329a6fb 576 }
85571bc7 577 break;
d329a6fb 578
d75d9f6b 579 case 0xe4: /* write test reg */
85571bc7 580 s->needed_bytes = 1;
d75d9f6b
FB
581 break;
582
85571bc7
FB
583 case 0xe7:
584 dolog ("Attempt to probe for ESS (0xe7)?\n");
1d14ffa9 585 break;
85571bc7 586
d75d9f6b 587 case 0xe8: /* read test reg */
85571bc7 588 dsp_out_data (s, s->test_reg);
d75d9f6b
FB
589 break;
590
27503323 591 case 0xf2:
85571bc7
FB
592 case 0xf3:
593 dsp_out_data (s, 0xaa);
594 s->mixer_regs[0x82] |= (cmd == 0xf2) ? 1 : 2;
3a38d437 595 qemu_irq_raise (s->pic);
85571bc7 596 break;
27503323 597
d75d9f6b 598 case 0xf9:
85571bc7
FB
599 s->needed_bytes = 1;
600 goto warn;
d75d9f6b
FB
601
602 case 0xfa:
85571bc7
FB
603 dsp_out_data (s, 0);
604 goto warn;
d75d9f6b
FB
605
606 case 0xfc: /* FIXME */
85571bc7
FB
607 dsp_out_data (s, 0);
608 goto warn;
d75d9f6b 609
27503323 610 default:
1d14ffa9
FB
611 dolog ("Unrecognized command %#x\n", cmd);
612 break;
27503323
FB
613 }
614 }
85571bc7 615
1d14ffa9 616 if (!s->needed_bytes) {
85571bc7 617 ldebug ("\n");
1d14ffa9
FB
618 }
619
620 exit:
621 if (!s->needed_bytes) {
622 s->cmd = -1;
623 }
624 else {
625 s->cmd = cmd;
626 }
27503323
FB
627 return;
628
85571bc7 629 warn:
81eea5eb 630 dolog ("warning: command %#x,%d is not truly understood yet\n",
85571bc7 631 cmd, s->needed_bytes);
1d14ffa9
FB
632 goto exit;
633
27503323
FB
634}
635
85571bc7
FB
636static uint16_t dsp_get_lohi (SB16State *s)
637{
638 uint8_t hi = dsp_get_data (s);
639 uint8_t lo = dsp_get_data (s);
640 return (hi << 8) | lo;
641}
642
643static uint16_t dsp_get_hilo (SB16State *s)
644{
645 uint8_t lo = dsp_get_data (s);
646 uint8_t hi = dsp_get_data (s);
647 return (hi << 8) | lo;
648}
649
650static void complete (SB16State *s)
27503323 651{
d75d9f6b 652 int d0, d1, d2;
85571bc7
FB
653 ldebug ("complete command %#x, in_index %d, needed_bytes %d\n",
654 s->cmd, s->in_index, s->needed_bytes);
27503323 655
85571bc7
FB
656 if (s->cmd > 0xaf && s->cmd < 0xd0) {
657 d2 = dsp_get_data (s);
658 d1 = dsp_get_data (s);
659 d0 = dsp_get_data (s);
27503323 660
85571bc7
FB
661 if (s->cmd & 8) {
662 dolog ("ADC params cmd = %#x d0 = %d, d1 = %d, d2 = %d\n",
663 s->cmd, d0, d1, d2);
664 }
665 else {
666 ldebug ("cmd = %#x d0 = %d, d1 = %d, d2 = %d\n",
667 s->cmd, d0, d1, d2);
668 dma_cmd (s, s->cmd, d0, d1 + (d2 << 8));
669 }
27503323
FB
670 }
671 else {
85571bc7 672 switch (s->cmd) {
d329a6fb 673 case 0x04:
85571bc7
FB
674 s->csp_mode = dsp_get_data (s);
675 s->csp_reg83r = 0;
676 s->csp_reg83w = 0;
677 ldebug ("CSP command 0x04: mode=%#x\n", s->csp_mode);
d75d9f6b
FB
678 break;
679
85571bc7
FB
680 case 0x05:
681 s->csp_param = dsp_get_data (s);
682 s->csp_value = dsp_get_data (s);
683 ldebug ("CSP command 0x05: param=%#x value=%#x\n",
684 s->csp_param,
685 s->csp_value);
d329a6fb 686 break;
27503323 687
d75d9f6b 688 case 0x0e:
85571bc7
FB
689 d0 = dsp_get_data (s);
690 d1 = dsp_get_data (s);
691 ldebug ("write CSP register %d <- %#x\n", d1, d0);
692 if (d1 == 0x83) {
693 ldebug ("0x83[%d] <- %#x\n", s->csp_reg83r, d0);
694 s->csp_reg83[s->csp_reg83r % 4] = d0;
695 s->csp_reg83r += 1;
696 }
1d14ffa9 697 else {
85571bc7 698 s->csp_regs[d1] = d0;
1d14ffa9 699 }
27503323
FB
700 break;
701
85571bc7
FB
702 case 0x0f:
703 d0 = dsp_get_data (s);
704 ldebug ("read CSP register %#x -> %#x, mode=%#x\n",
705 d0, s->csp_regs[d0], s->csp_mode);
706 if (d0 == 0x83) {
707 ldebug ("0x83[%d] -> %#x\n",
708 s->csp_reg83w,
709 s->csp_reg83[s->csp_reg83w % 4]);
710 dsp_out_data (s, s->csp_reg83[s->csp_reg83w % 4]);
711 s->csp_reg83w += 1;
712 }
1d14ffa9 713 else {
85571bc7 714 dsp_out_data (s, s->csp_regs[d0]);
1d14ffa9 715 }
85571bc7 716 break;
27503323 717
85571bc7
FB
718 case 0x10:
719 d0 = dsp_get_data (s);
720 dolog ("cmd 0x10 d0=%#x\n", d0);
721 break;
27503323 722
85571bc7 723 case 0x14:
15b61470 724 dma_cmd8 (s, 0, dsp_get_lohi (s) + 1);
85571bc7 725 break;
27503323
FB
726
727 case 0x40:
85571bc7
FB
728 s->time_const = dsp_get_data (s);
729 ldebug ("set time const %d\n", s->time_const);
27503323
FB
730 break;
731
85571bc7 732 case 0x42: /* FT2 sets output freq with this, go figure */
1d14ffa9 733#if 0
85571bc7 734 dolog ("cmd 0x42 might not do what it think it should\n");
1d14ffa9 735#endif
85571bc7
FB
736 case 0x41:
737 s->freq = dsp_get_hilo (s);
738 ldebug ("set freq %d\n", s->freq);
27503323
FB
739 break;
740
741 case 0x48:
15b61470 742 s->block_size = dsp_get_lohi (s) + 1;
85571bc7
FB
743 ldebug ("set dma block len %d\n", s->block_size);
744 break;
745
1d14ffa9
FB
746 case 0x74:
747 case 0x75:
748 case 0x76:
749 case 0x77:
750 /* ADPCM stuff, ignore */
751 break;
752
85571bc7
FB
753 case 0x80:
754 {
15b61470 755 int freq, samples, bytes;
85571bc7
FB
756 int64_t ticks;
757
15b61470
FB
758 freq = s->freq > 0 ? s->freq : 11025;
759 samples = dsp_get_lohi (s) + 1;
85571bc7 760 bytes = samples << s->fmt_stereo << (s->fmt_bits == 16);
4f4cc0ef 761 ticks = muldiv64 (bytes, get_ticks_per_sec (), freq);
762 if (ticks < get_ticks_per_sec () / 1024) {
3a38d437 763 qemu_irq_raise (s->pic);
1d14ffa9
FB
764 }
765 else {
766 if (s->aux_ts) {
767 qemu_mod_timer (
768 s->aux_ts,
74475455 769 qemu_get_clock_ns (vm_clock) + ticks
1d14ffa9
FB
770 );
771 }
772 }
26a76461 773 ldebug ("mix silence %d %d %" PRId64 "\n", samples, bytes, ticks);
85571bc7 774 }
27503323
FB
775 break;
776
777 case 0xe0:
85571bc7
FB
778 d0 = dsp_get_data (s);
779 s->out_data_len = 0;
780 ldebug ("E0 data = %#x\n", d0);
1d14ffa9 781 dsp_out_data (s, ~d0);
d75d9f6b
FB
782 break;
783
85571bc7 784 case 0xe2:
514d97de 785#ifdef DEBUG
85571bc7 786 d0 = dsp_get_data (s);
514d97de 787 dolog ("E2 = %#x\n", d0);
788#endif
d75d9f6b
FB
789 break;
790
85571bc7
FB
791 case 0xe4:
792 s->test_reg = dsp_get_data (s);
793 break;
d75d9f6b
FB
794
795 case 0xf9:
85571bc7
FB
796 d0 = dsp_get_data (s);
797 ldebug ("command 0xf9 with %#x\n", d0);
d75d9f6b 798 switch (d0) {
85571bc7
FB
799 case 0x0e:
800 dsp_out_data (s, 0xff);
801 break;
802
803 case 0x0f:
804 dsp_out_data (s, 0x07);
805 break;
806
d75d9f6b 807 case 0x37:
85571bc7
FB
808 dsp_out_data (s, 0x38);
809 break;
810
d75d9f6b 811 default:
85571bc7
FB
812 dsp_out_data (s, 0x00);
813 break;
d75d9f6b 814 }
27503323
FB
815 break;
816
817 default:
85571bc7 818 dolog ("complete: unrecognized command %#x\n", s->cmd);
5e2a6443 819 return;
27503323
FB
820 }
821 }
822
85571bc7
FB
823 ldebug ("\n");
824 s->cmd = -1;
27503323 825 return;
27503323
FB
826}
827
feea13e1
FB
828static void legacy_reset (SB16State *s)
829{
1ea879e5 830 struct audsettings as;
feea13e1
FB
831
832 s->freq = 11025;
833 s->fmt_signed = 0;
834 s->fmt_bits = 8;
835 s->fmt_stereo = 0;
836
837 as.freq = s->freq;
838 as.nchannels = 1;
839 as.fmt = AUD_FMT_U8;
d929eba5 840 as.endianness = 0;
feea13e1
FB
841
842 s->voice = AUD_open_out (
843 &s->card,
844 s->voice,
845 "sb16",
846 s,
847 SB_audio_callback,
d929eba5 848 &as
feea13e1
FB
849 );
850
851 /* Not sure about that... */
852 /* AUD_set_active_out (s->voice, 1); */
853}
854
85571bc7
FB
855static void reset (SB16State *s)
856{
3a38d437 857 qemu_irq_lower (s->pic);
85571bc7 858 if (s->dma_auto) {
3a38d437
JS
859 qemu_irq_raise (s->pic);
860 qemu_irq_lower (s->pic);
85571bc7
FB
861 }
862
863 s->mixer_regs[0x82] = 0;
864 s->dma_auto = 0;
865 s->in_index = 0;
866 s->out_data_len = 0;
867 s->left_till_irq = 0;
868 s->needed_bytes = 0;
869 s->block_size = -1;
870 s->nzero = 0;
871 s->highspeed = 0;
872 s->v2x6 = 0;
1d14ffa9 873 s->cmd = -1;
85571bc7 874
31226166 875 dsp_out_data (s, 0xaa);
85571bc7
FB
876 speaker (s, 0);
877 control (s, 0);
feea13e1 878 legacy_reset (s);
85571bc7
FB
879}
880
27503323
FB
881static IO_WRITE_PROTO (dsp_write)
882{
85571bc7 883 SB16State *s = opaque;
27503323
FB
884 int iport;
885
85571bc7 886 iport = nport - s->port;
27503323 887
85571bc7 888 ldebug ("write %#x <- %#x\n", nport, val);
27503323 889 switch (iport) {
85571bc7
FB
890 case 0x06:
891 switch (val) {
892 case 0x00:
893 if (s->v2x6 == 1) {
cd7aafcb 894 reset (s);
85571bc7
FB
895 }
896 s->v2x6 = 0;
897 break;
898
899 case 0x01:
900 case 0x03: /* FreeBSD kludge */
901 s->v2x6 = 1;
902 break;
903
904 case 0xc6:
905 s->v2x6 = 0; /* Prince of Persia, csp.sys, diagnose.exe */
906 break;
907
908 case 0xb8: /* Panic */
909 reset (s);
910 break;
911
912 case 0x39:
913 dsp_out_data (s, 0x38);
914 reset (s);
915 s->v2x6 = 0x39;
916 break;
917
918 default:
919 s->v2x6 = val;
920 break;
27503323 921 }
27503323
FB
922 break;
923
85571bc7
FB
924 case 0x0c: /* write data or command | write status */
925/* if (s->highspeed) */
926/* break; */
927
928 if (0 == s->needed_bytes) {
929 command (s, val);
930#if 0
931 if (0 == s->needed_bytes) {
932 log_dsp (s);
27503323 933 }
85571bc7 934#endif
27503323
FB
935 }
936 else {
85571bc7 937 if (s->in_index == sizeof (s->in2_data)) {
d75d9f6b
FB
938 dolog ("in data overrun\n");
939 }
940 else {
85571bc7
FB
941 s->in2_data[s->in_index++] = val;
942 if (s->in_index == s->needed_bytes) {
943 s->needed_bytes = 0;
944 complete (s);
945#if 0
946 log_dsp (s);
947#endif
948 }
27503323
FB
949 }
950 }
951 break;
952
953 default:
85571bc7 954 ldebug ("(nport=%#x, val=%#x)\n", nport, val);
5e2a6443 955 break;
27503323
FB
956 }
957}
958
959static IO_READ_PROTO (dsp_read)
960{
85571bc7
FB
961 SB16State *s = opaque;
962 int iport, retval, ack = 0;
27503323 963
85571bc7 964 iport = nport - s->port;
27503323
FB
965
966 switch (iport) {
85571bc7
FB
967 case 0x06: /* reset */
968 retval = 0xff;
d75d9f6b 969 break;
27503323 970
85571bc7
FB
971 case 0x0a: /* read data */
972 if (s->out_data_len) {
973 retval = s->out_data[--s->out_data_len];
974 s->last_read_byte = retval;
975 }
976 else {
1d14ffa9
FB
977 if (s->cmd != -1) {
978 dolog ("empty output buffer for command %#x\n",
979 s->cmd);
980 }
85571bc7 981 retval = s->last_read_byte;
d75d9f6b 982 /* goto error; */
27503323
FB
983 }
984 break;
985
85571bc7
FB
986 case 0x0c: /* 0 can write */
987 retval = s->can_write ? 0 : 0x80;
27503323
FB
988 break;
989
85571bc7
FB
990 case 0x0d: /* timer interrupt clear */
991 /* dolog ("timer interrupt clear\n"); */
992 retval = 0;
993 break;
27503323 994
85571bc7
FB
995 case 0x0e: /* data available status | irq 8 ack */
996 retval = (!s->out_data_len || s->highspeed) ? 0 : 0x80;
997 if (s->mixer_regs[0x82] & 1) {
998 ack = 1;
999 s->mixer_regs[0x82] &= 1;
3a38d437 1000 qemu_irq_lower (s->pic);
85571bc7 1001 }
27503323
FB
1002 break;
1003
85571bc7 1004 case 0x0f: /* irq 16 ack */
bc0b1dc1 1005 retval = 0xff;
85571bc7
FB
1006 if (s->mixer_regs[0x82] & 2) {
1007 ack = 1;
1008 s->mixer_regs[0x82] &= 2;
3a38d437 1009 qemu_irq_lower (s->pic);
85571bc7 1010 }
27503323
FB
1011 break;
1012
1013 default:
1014 goto error;
1015 }
1016
1d14ffa9 1017 if (!ack) {
85571bc7 1018 ldebug ("read %#x -> %#x\n", nport, retval);
1d14ffa9 1019 }
27503323
FB
1020
1021 return retval;
1022
1023 error:
1d14ffa9 1024 dolog ("warning: dsp_read %#x error\n", nport);
d75d9f6b 1025 return 0xff;
27503323
FB
1026}
1027
85571bc7
FB
1028static void reset_mixer (SB16State *s)
1029{
1030 int i;
1031
1032 memset (s->mixer_regs, 0xff, 0x7f);
1033 memset (s->mixer_regs + 0x83, 0xff, sizeof (s->mixer_regs) - 0x83);
1034
1035 s->mixer_regs[0x02] = 4; /* master volume 3bits */
1036 s->mixer_regs[0x06] = 4; /* MIDI volume 3bits */
1037 s->mixer_regs[0x08] = 0; /* CD volume 3bits */
1038 s->mixer_regs[0x0a] = 0; /* voice volume 2bits */
1039
1040 /* d5=input filt, d3=lowpass filt, d1,d2=input source */
1041 s->mixer_regs[0x0c] = 0;
1042
1043 /* d5=output filt, d1=stereo switch */
1044 s->mixer_regs[0x0e] = 0;
1045
1046 /* voice volume L d5,d7, R d1,d3 */
1047 s->mixer_regs[0x04] = (4 << 5) | (4 << 1);
1048 /* master ... */
1049 s->mixer_regs[0x22] = (4 << 5) | (4 << 1);
1050 /* MIDI ... */
1051 s->mixer_regs[0x26] = (4 << 5) | (4 << 1);
1052
1053 for (i = 0x30; i < 0x48; i++) {
1054 s->mixer_regs[i] = 0x20;
1055 }
1056}
1057
d999f7e0 1058static IO_WRITE_PROTO (mixer_write_indexb)
27503323 1059{
85571bc7 1060 SB16State *s = opaque;
c0fe3827 1061 (void) nport;
85571bc7 1062 s->mixer_nreg = val;
27503323
FB
1063}
1064
d999f7e0 1065static IO_WRITE_PROTO (mixer_write_datab)
27503323 1066{
85571bc7
FB
1067 SB16State *s = opaque;
1068
c0fe3827 1069 (void) nport;
85571bc7 1070 ldebug ("mixer_write [%#x] <- %#x\n", s->mixer_nreg, val);
202a456a 1071
85571bc7 1072 switch (s->mixer_nreg) {
d75d9f6b 1073 case 0x00:
85571bc7 1074 reset_mixer (s);
d75d9f6b
FB
1075 break;
1076
d75d9f6b 1077 case 0x80:
85571bc7
FB
1078 {
1079 int irq = irq_of_magic (val);
1080 ldebug ("setting irq to %d (val=%#x)\n", irq, val);
1d14ffa9 1081 if (irq > 0) {
85571bc7 1082 s->irq = irq;
1d14ffa9 1083 }
85571bc7 1084 }
d75d9f6b 1085 break;
27503323 1086
85571bc7
FB
1087 case 0x81:
1088 {
1089 int dma, hdma;
d75d9f6b 1090
057fa65c 1091 dma = ctz32 (val & 0xf);
1092 hdma = ctz32 (val & 0xf0);
1d14ffa9
FB
1093 if (dma != s->dma || hdma != s->hdma) {
1094 dolog (
1095 "attempt to change DMA "
1096 "8bit %d(%d), 16bit %d(%d) (val=%#x)\n",
1097 dma, s->dma, hdma, s->hdma, val);
1098 }
85571bc7
FB
1099#if 0
1100 s->dma = dma;
1101 s->hdma = hdma;
1102#endif
1103 }
1104 break;
d75d9f6b 1105
85571bc7
FB
1106 case 0x82:
1107 dolog ("attempt to write into IRQ status register (val=%#x)\n",
1108 val);
1109 return;
d75d9f6b 1110
85571bc7 1111 default:
1d14ffa9
FB
1112 if (s->mixer_nreg >= 0x80) {
1113 ldebug ("attempt to write mixer[%#x] <- %#x\n", s->mixer_nreg, val);
1114 }
85571bc7
FB
1115 break;
1116 }
1117
1118 s->mixer_regs[s->mixer_nreg] = val;
d75d9f6b
FB
1119}
1120
d999f7e0 1121static IO_WRITE_PROTO (mixer_write_indexw)
27503323 1122{
7d977de7
FB
1123 mixer_write_indexb (opaque, nport, val & 0xff);
1124 mixer_write_datab (opaque, nport, (val >> 8) & 0xff);
27503323
FB
1125}
1126
d999f7e0 1127static IO_READ_PROTO (mixer_read)
27503323 1128{
85571bc7 1129 SB16State *s = opaque;
c0fe3827
FB
1130
1131 (void) nport;
15b61470 1132#ifndef DEBUG_SB16_MOST
1d14ffa9
FB
1133 if (s->mixer_nreg != 0x82) {
1134 ldebug ("mixer_read[%#x] -> %#x\n",
1135 s->mixer_nreg, s->mixer_regs[s->mixer_nreg]);
1136 }
1137#else
85571bc7
FB
1138 ldebug ("mixer_read[%#x] -> %#x\n",
1139 s->mixer_nreg, s->mixer_regs[s->mixer_nreg]);
1d14ffa9 1140#endif
85571bc7 1141 return s->mixer_regs[s->mixer_nreg];
27503323
FB
1142}
1143
85571bc7
FB
1144static int write_audio (SB16State *s, int nchan, int dma_pos,
1145 int dma_len, int len)
27503323
FB
1146{
1147 int temp, net;
f9e92e97 1148 uint8_t tmpbuf[4096];
27503323 1149
85571bc7 1150 temp = len;
27503323
FB
1151 net = 0;
1152
1153 while (temp) {
85571bc7 1154 int left = dma_len - dma_pos;
c0fe3827
FB
1155 int copied;
1156 size_t to_copy;
27503323 1157
85571bc7 1158 to_copy = audio_MIN (temp, left);
c0fe3827
FB
1159 if (to_copy > sizeof (tmpbuf)) {
1160 to_copy = sizeof (tmpbuf);
1d14ffa9 1161 }
27503323 1162
85571bc7
FB
1163 copied = DMA_read_memory (nchan, tmpbuf, dma_pos, to_copy);
1164 copied = AUD_write (s->voice, tmpbuf, copied);
27503323 1165
85571bc7
FB
1166 temp -= copied;
1167 dma_pos = (dma_pos + copied) % dma_len;
27503323
FB
1168 net += copied;
1169
1d14ffa9 1170 if (!copied) {
85571bc7 1171 break;
1d14ffa9 1172 }
27503323
FB
1173 }
1174
1175 return net;
1176}
1177
85571bc7 1178static int SB_read_DMA (void *opaque, int nchan, int dma_pos, int dma_len)
27503323 1179{
85571bc7 1180 SB16State *s = opaque;
1d14ffa9 1181 int till, copy, written, free;
27503323 1182
ca9cc28c
AZ
1183 if (s->block_size <= 0) {
1184 dolog ("invalid block size=%d nchan=%d dma_pos=%d dma_len=%d\n",
1185 s->block_size, nchan, dma_pos, dma_len);
1186 return dma_pos;
1187 }
1188
85571bc7
FB
1189 if (s->left_till_irq < 0) {
1190 s->left_till_irq = s->block_size;
27503323
FB
1191 }
1192
1d14ffa9
FB
1193 if (s->voice) {
1194 free = s->audio_free & ~s->align;
1195 if ((free <= 0) || !dma_len) {
1196 return dma_pos;
1197 }
1198 }
1199 else {
1200 free = dma_len;
27503323
FB
1201 }
1202
85571bc7
FB
1203 copy = free;
1204 till = s->left_till_irq;
27503323 1205
d75d9f6b 1206#ifdef DEBUG_SB16_MOST
1d14ffa9
FB
1207 dolog ("pos:%06d %d till:%d len:%d\n",
1208 dma_pos, free, till, dma_len);
d75d9f6b
FB
1209#endif
1210
27503323 1211 if (till <= copy) {
85571bc7 1212 if (0 == s->dma_auto) {
27503323
FB
1213 copy = till;
1214 }
1215 }
1216
85571bc7
FB
1217 written = write_audio (s, nchan, dma_pos, dma_len, copy);
1218 dma_pos = (dma_pos + written) % dma_len;
1219 s->left_till_irq -= written;
27503323 1220
85571bc7
FB
1221 if (s->left_till_irq <= 0) {
1222 s->mixer_regs[0x82] |= (nchan & 4) ? 2 : 1;
3a38d437 1223 qemu_irq_raise (s->pic);
85571bc7
FB
1224 if (0 == s->dma_auto) {
1225 control (s, 0);
1226 speaker (s, 0);
27503323
FB
1227 }
1228 }
1229
d75d9f6b 1230#ifdef DEBUG_SB16_MOST
15b61470
FB
1231 ldebug ("pos %5d free %5d size %5d till % 5d copy %5d written %5d size %5d\n",
1232 dma_pos, free, dma_len, s->left_till_irq, copy, written,
1233 s->block_size);
d75d9f6b 1234#endif
27503323 1235
85571bc7
FB
1236 while (s->left_till_irq <= 0) {
1237 s->left_till_irq = s->block_size + s->left_till_irq;
27503323
FB
1238 }
1239
85571bc7 1240 return dma_pos;
27503323
FB
1241}
1242
1d14ffa9 1243static void SB_audio_callback (void *opaque, int free)
27503323 1244{
85571bc7 1245 SB16State *s = opaque;
1d14ffa9 1246 s->audio_free = free;
27503323
FB
1247}
1248
ebfd6f4d 1249static int sb16_post_load (void *opaque, int version_id)
d75d9f6b 1250{
85571bc7
FB
1251 SB16State *s = opaque;
1252
fb065187 1253 if (s->voice) {
c0fe3827 1254 AUD_close_out (&s->card, s->voice);
fb065187
FB
1255 s->voice = NULL;
1256 }
85571bc7
FB
1257
1258 if (s->dma_running) {
1d14ffa9 1259 if (s->freq) {
1ea879e5 1260 struct audsettings as;
c0fe3827 1261
1d14ffa9 1262 s->audio_free = 0;
c0fe3827
FB
1263
1264 as.freq = s->freq;
1265 as.nchannels = 1 << s->fmt_stereo;
1266 as.fmt = s->fmt;
d929eba5 1267 as.endianness = 0;
c0fe3827 1268
1d14ffa9 1269 s->voice = AUD_open_out (
c0fe3827 1270 &s->card,
1d14ffa9
FB
1271 s->voice,
1272 "sb16",
1273 s,
1274 SB_audio_callback,
d929eba5 1275 &as
1d14ffa9
FB
1276 );
1277 }
85571bc7
FB
1278
1279 control (s, 1);
1280 speaker (s, s->speaker);
d75d9f6b 1281 }
85571bc7 1282 return 0;
d75d9f6b 1283}
d75d9f6b 1284
ebfd6f4d
JQ
1285static const VMStateDescription vmstate_sb16 = {
1286 .name = "sb16",
1287 .version_id = 1,
1288 .minimum_version_id = 1,
1289 .minimum_version_id_old = 1,
1290 .post_load = sb16_post_load,
1291 .fields = (VMStateField []) {
1292 VMSTATE_UINT32(irq, SB16State),
1293 VMSTATE_UINT32(dma, SB16State),
1294 VMSTATE_UINT32(hdma, SB16State),
1295 VMSTATE_UINT32(port, SB16State),
1296 VMSTATE_UINT32(ver, SB16State),
1297 VMSTATE_INT32(in_index, SB16State),
1298 VMSTATE_INT32(out_data_len, SB16State),
1299 VMSTATE_INT32(fmt_stereo, SB16State),
1300 VMSTATE_INT32(fmt_signed, SB16State),
1301 VMSTATE_INT32(fmt_bits, SB16State),
1302 VMSTATE_UINT32(fmt, SB16State),
1303 VMSTATE_INT32(dma_auto, SB16State),
1304 VMSTATE_INT32(block_size, SB16State),
1305 VMSTATE_INT32(fifo, SB16State),
1306 VMSTATE_INT32(freq, SB16State),
1307 VMSTATE_INT32(time_const, SB16State),
1308 VMSTATE_INT32(speaker, SB16State),
1309 VMSTATE_INT32(needed_bytes, SB16State),
1310 VMSTATE_INT32(cmd, SB16State),
1311 VMSTATE_INT32(use_hdma, SB16State),
1312 VMSTATE_INT32(highspeed, SB16State),
1313 VMSTATE_INT32(can_write, SB16State),
1314 VMSTATE_INT32(v2x6, SB16State),
1315
1316 VMSTATE_UINT8(csp_param, SB16State),
1317 VMSTATE_UINT8(csp_value, SB16State),
1318 VMSTATE_UINT8(csp_mode, SB16State),
1319 VMSTATE_UINT8(csp_param, SB16State),
1320 VMSTATE_BUFFER(csp_regs, SB16State),
1321 VMSTATE_UINT8(csp_index, SB16State),
1322 VMSTATE_BUFFER(csp_reg83, SB16State),
1323 VMSTATE_INT32(csp_reg83r, SB16State),
1324 VMSTATE_INT32(csp_reg83w, SB16State),
1325
1326 VMSTATE_BUFFER(in2_data, SB16State),
1327 VMSTATE_BUFFER(out_data, SB16State),
1328 VMSTATE_UINT8(test_reg, SB16State),
1329 VMSTATE_UINT8(last_read_byte, SB16State),
1330
1331 VMSTATE_INT32(nzero, SB16State),
1332 VMSTATE_INT32(left_till_irq, SB16State),
1333 VMSTATE_INT32(dma_running, SB16State),
1334 VMSTATE_INT32(bytes_per_second, SB16State),
1335 VMSTATE_INT32(align, SB16State),
1336
1337 VMSTATE_INT32(mixer_nreg, SB16State),
1338 VMSTATE_BUFFER(mixer_regs, SB16State),
1339
1340 VMSTATE_END_OF_LIST()
1341 }
1342};
1343
f7b4f61f 1344static int sb16_initfn (ISADevice *dev)
27503323 1345{
27503323
FB
1346 static const uint8_t dsp_write_ports[] = {0x6, 0xc};
1347 static const uint8_t dsp_read_ports[] = {0x6, 0xa, 0xc, 0xd, 0xe, 0xf};
f7b4f61f
GH
1348 SB16State *s;
1349 int i;
27503323 1350
f7b4f61f 1351 s = DO_UPCAST (SB16State, dev, dev);
c0fe3827 1352
1d14ffa9 1353 s->cmd = -1;
f7b4f61f 1354 isa_init_irq (dev, &s->pic, s->irq);
202a456a 1355
85571bc7
FB
1356 s->mixer_regs[0x80] = magic_of_irq (s->irq);
1357 s->mixer_regs[0x81] = (1 << s->dma) | (1 << s->hdma);
1358 s->mixer_regs[0x82] = 2 << 5;
1359
1360 s->csp_regs[5] = 1;
1361 s->csp_regs[9] = 0xf8;
1362
1363 reset_mixer (s);
74475455 1364 s->aux_ts = qemu_new_timer_ns (vm_clock, aux_timer, s);
1d14ffa9 1365 if (!s->aux_ts) {
c0fe3827 1366 dolog ("warning: Could not create auxiliary timer\n");
1d14ffa9 1367 }
27503323 1368
b1503cda 1369 for (i = 0; i < ARRAY_SIZE (dsp_write_ports); i++) {
85571bc7 1370 register_ioport_write (s->port + dsp_write_ports[i], 1, 1, dsp_write, s);
dee41d58 1371 isa_init_ioport(dev, s->port + dsp_write_ports[i]);
27503323
FB
1372 }
1373
b1503cda 1374 for (i = 0; i < ARRAY_SIZE (dsp_read_ports); i++) {
85571bc7 1375 register_ioport_read (s->port + dsp_read_ports[i], 1, 1, dsp_read, s);
dee41d58 1376 isa_init_ioport(dev, s->port + dsp_read_ports[i]);
27503323
FB
1377 }
1378
85571bc7
FB
1379 register_ioport_write (s->port + 0x4, 1, 1, mixer_write_indexb, s);
1380 register_ioport_write (s->port + 0x4, 1, 2, mixer_write_indexw, s);
dee41d58 1381 isa_init_ioport(dev, s->port + 0x4);
85571bc7
FB
1382 register_ioport_read (s->port + 0x5, 1, 1, mixer_read, s);
1383 register_ioport_write (s->port + 0x5, 1, 1, mixer_write_datab, s);
dee41d58 1384 isa_init_ioport(dev, s->port + 0x5);
27503323 1385
85571bc7
FB
1386 DMA_register_channel (s->hdma, SB_read_DMA, s);
1387 DMA_register_channel (s->dma, SB_read_DMA, s);
1388 s->can_write = 1;
d75d9f6b 1389
1a7dafce 1390 AUD_register_card ("sb16", &s->card);
c0fe3827 1391 return 0;
27503323 1392}
f7b4f61f
GH
1393
1394int SB16_init (qemu_irq *pic)
1395{
31226166 1396 isa_create_simple ("sb16");
f7b4f61f
GH
1397 return 0;
1398}
1399
1400static ISADeviceInfo sb16_info = {
1401 .qdev.name = "sb16",
1402 .qdev.desc = "Creative Sound Blaster 16",
1403 .qdev.size = sizeof (SB16State),
be73cfe2 1404 .qdev.vmsd = &vmstate_sb16,
f7b4f61f
GH
1405 .init = sb16_initfn,
1406 .qdev.props = (Property[]) {
1407 DEFINE_PROP_HEX32 ("version", SB16State, ver, 0x0405), /* 4.5 */
1408 DEFINE_PROP_HEX32 ("iobase", SB16State, port, 0x220),
1409 DEFINE_PROP_UINT32 ("irq", SB16State, irq, 5),
1410 DEFINE_PROP_UINT32 ("dma", SB16State, dma, 1),
1411 DEFINE_PROP_UINT32 ("dma16", SB16State, hdma, 5),
1412 DEFINE_PROP_END_OF_LIST (),
1413 },
1414};
1415
31226166 1416static void sb16_register (void)
f7b4f61f 1417{
31226166 1418 isa_qdev_register (&sb16_info);
f7b4f61f 1419}
31226166 1420device_init (sb16_register)