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1/*
2 * SHIX 2.0 board description
5fafdf24 3 *
27c7ca7e 4 * Copyright (c) 2005 Samuel Tardieu
5fafdf24 5 *
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6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
5fafdf24 24/*
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25 Shix 2.0 board by Alexis Polti, described at
26 http://perso.enst.fr/~polti/realisations/shix20/
27
28 More information in target-sh4/README.sh4
29*/
83c9f4ca 30#include "hw/hw.h"
0d09e41a 31#include "hw/sh4/sh.h"
9c17d615 32#include "sysemu/sysemu.h"
d32f7d25 33#include "sysemu/qtest.h"
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34#include "hw/boards.h"
35#include "hw/loader.h"
022c62cb 36#include "exec/address-spaces.h"
d32f7d25 37#include "qemu/error-report.h"
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38
39#define BIOS_FILENAME "shix_bios.bin"
40#define BIOS_ADDRESS 0xA0000000
41
5f072e1f 42static void shix_init(QEMUMachineInitArgs *args)
27c7ca7e 43{
5f072e1f 44 const char *cpu_model = args->cpu_model;
27c7ca7e 45 int ret;
2f493fee 46 SuperHCPU *cpu;
27c7ca7e 47 struct SH7750State *s;
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48 MemoryRegion *sysmem = get_system_memory();
49 MemoryRegion *rom = g_new(MemoryRegion, 1);
50 MemoryRegion *sdram = g_new(MemoryRegion, 2);
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51
52 if (!cpu_model)
53 cpu_model = "any";
27c7ca7e 54
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55 cpu = cpu_sh4_init(cpu_model);
56 if (cpu == NULL) {
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57 fprintf(stderr, "Unable to find CPU definition\n");
58 exit(1);
59 }
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60
61 /* Allocate memory space */
2c9b15ca 62 memory_region_init_ram(rom, NULL, "shix.rom", 0x4000);
c5705a77 63 vmstate_register_ram_global(rom);
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64 memory_region_set_readonly(rom, true);
65 memory_region_add_subregion(sysmem, 0x00000000, rom);
2c9b15ca 66 memory_region_init_ram(&sdram[0], NULL, "shix.sdram1", 0x01000000);
c5705a77 67 vmstate_register_ram_global(&sdram[0]);
0af58e58 68 memory_region_add_subregion(sysmem, 0x08000000, &sdram[0]);
2c9b15ca 69 memory_region_init_ram(&sdram[1], NULL, "shix.sdram2", 0x01000000);
c5705a77 70 vmstate_register_ram_global(&sdram[1]);
0af58e58 71 memory_region_add_subregion(sysmem, 0x0c000000, &sdram[1]);
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72
73 /* Load BIOS in 0 (and access it through P2, 0xA0000000) */
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74 if (bios_name == NULL)
75 bios_name = BIOS_FILENAME;
dcac9679 76 ret = load_image_targphys(bios_name, 0, 0x4000);
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77 if (ret < 0 && !qtest_enabled()) {
78 error_report("Could not load SHIX bios '%s'", bios_name);
79 exit(1);
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80 }
81
82 /* Register peripherals */
2f493fee 83 s = sh7750_init(cpu, sysmem);
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84 /* XXXXX Check success */
85 tc58128_init(s, "shix_linux_nand.bin", NULL);
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86}
87
f80f9ec9 88static QEMUMachine shix_machine = {
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89 .name = "shix",
90 .desc = "shix card",
91 .init = shix_init,
0c257437 92 .is_default = 1,
27c7ca7e 93};
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94
95static void shix_machine_init(void)
96{
97 qemu_register_machine(&shix_machine);
98}
99
100machine_init(shix_machine_init);