]> git.proxmox.com Git - qemu.git/blame - hw/spapr.h
sun4u: give ISA bus to ISA methods
[qemu.git] / hw / spapr.h
CommitLineData
9fdf0c29
DG
1#if !defined(__HW_SPAPR_H__)
2#define __HW_SPAPR_H__
3
277f9acf
PB
4#include "hw/xics.h"
5
4040ab72 6struct VIOsPAPRBus;
3384f95c 7struct sPAPRPHBState;
b5cec4c5 8struct icp_state;
4040ab72 9
9fdf0c29 10typedef struct sPAPREnvironment {
4040ab72 11 struct VIOsPAPRBus *vio_bus;
3384f95c 12 QLIST_HEAD(, sPAPRPHBState) phbs;
b5cec4c5 13 struct icp_state *icp;
a3467baa 14
f73a2575 15 target_phys_addr_t ram_limit;
a3467baa
DG
16 void *htab;
17 long htab_size;
18 target_phys_addr_t fdt_addr, rtas_addr;
19 long rtas_size;
20 void *fdt_skel;
21 target_ulong entry_point;
e6c866d4 22 int next_irq;
ac26f8c3 23 int rtc_offset;
9fdf0c29
DG
24} sPAPREnvironment;
25
26#define H_SUCCESS 0
27#define H_BUSY 1 /* Hardware busy -- retry later */
28#define H_CLOSED 2 /* Resource closed */
29#define H_NOT_AVAILABLE 3
30#define H_CONSTRAINED 4 /* Resource request constrained to max allowed */
31#define H_PARTIAL 5
32#define H_IN_PROGRESS 14 /* Kind of like busy */
33#define H_PAGE_REGISTERED 15
34#define H_PARTIAL_STORE 16
35#define H_PENDING 17 /* returned from H_POLL_PENDING */
36#define H_CONTINUE 18 /* Returned from H_Join on success */
37#define H_LONG_BUSY_START_RANGE 9900 /* Start of long busy range */
38#define H_LONG_BUSY_ORDER_1_MSEC 9900 /* Long busy, hint that 1msec \
39 is a good time to retry */
40#define H_LONG_BUSY_ORDER_10_MSEC 9901 /* Long busy, hint that 10msec \
41 is a good time to retry */
42#define H_LONG_BUSY_ORDER_100_MSEC 9902 /* Long busy, hint that 100msec \
43 is a good time to retry */
44#define H_LONG_BUSY_ORDER_1_SEC 9903 /* Long busy, hint that 1sec \
45 is a good time to retry */
46#define H_LONG_BUSY_ORDER_10_SEC 9904 /* Long busy, hint that 10sec \
47 is a good time to retry */
48#define H_LONG_BUSY_ORDER_100_SEC 9905 /* Long busy, hint that 100sec \
49 is a good time to retry */
50#define H_LONG_BUSY_END_RANGE 9905 /* End of long busy range */
51#define H_HARDWARE -1 /* Hardware error */
52#define H_FUNCTION -2 /* Function not supported */
53#define H_PRIVILEGE -3 /* Caller not privileged */
54#define H_PARAMETER -4 /* Parameter invalid, out-of-range or conflicting */
55#define H_BAD_MODE -5 /* Illegal msr value */
56#define H_PTEG_FULL -6 /* PTEG is full */
57#define H_NOT_FOUND -7 /* PTE was not found" */
58#define H_RESERVED_DABR -8 /* DABR address is reserved by the hypervisor on this processor" */
59#define H_NO_MEM -9
60#define H_AUTHORITY -10
61#define H_PERMISSION -11
62#define H_DROPPED -12
63#define H_SOURCE_PARM -13
64#define H_DEST_PARM -14
65#define H_REMOTE_PARM -15
66#define H_RESOURCE -16
67#define H_ADAPTER_PARM -17
68#define H_RH_PARM -18
69#define H_RCQ_PARM -19
70#define H_SCQ_PARM -20
71#define H_EQ_PARM -21
72#define H_RT_PARM -22
73#define H_ST_PARM -23
74#define H_SIGT_PARM -24
75#define H_TOKEN_PARM -25
76#define H_MLENGTH_PARM -27
77#define H_MEM_PARM -28
78#define H_MEM_ACCESS_PARM -29
79#define H_ATTR_PARM -30
80#define H_PORT_PARM -31
81#define H_MCG_PARM -32
82#define H_VL_PARM -33
83#define H_TSIZE_PARM -34
84#define H_TRACE_PARM -35
85
86#define H_MASK_PARM -37
87#define H_MCG_FULL -38
88#define H_ALIAS_EXIST -39
89#define H_P_COUNTER -40
90#define H_TABLE_FULL -41
91#define H_ALT_TABLE -42
92#define H_MR_CONDITION -43
93#define H_NOT_ENOUGH_RESOURCES -44
94#define H_R_STATE -45
95#define H_RESCINDEND -46
96#define H_MULTI_THREADS_ACTIVE -9005
97
98
99/* Long Busy is a condition that can be returned by the firmware
100 * when a call cannot be completed now, but the identical call
101 * should be retried later. This prevents calls blocking in the
102 * firmware for long periods of time. Annoyingly the firmware can return
103 * a range of return codes, hinting at how long we should wait before
104 * retrying. If you don't care for the hint, the macro below is a good
105 * way to check for the long_busy return codes
106 */
107#define H_IS_LONG_BUSY(x) ((x >= H_LONG_BUSY_START_RANGE) \
108 && (x <= H_LONG_BUSY_END_RANGE))
109
110/* Flags */
111#define H_LARGE_PAGE (1ULL<<(63-16))
112#define H_EXACT (1ULL<<(63-24)) /* Use exact PTE or return H_PTEG_FULL */
113#define H_R_XLATE (1ULL<<(63-25)) /* include a valid logical page num in the pte if the valid bit is set */
114#define H_READ_4 (1ULL<<(63-26)) /* Return 4 PTEs */
115#define H_PAGE_STATE_CHANGE (1ULL<<(63-28))
116#define H_PAGE_UNUSED ((1ULL<<(63-29)) | (1ULL<<(63-30)))
117#define H_PAGE_SET_UNUSED (H_PAGE_STATE_CHANGE | H_PAGE_UNUSED)
118#define H_PAGE_SET_LOANED (H_PAGE_SET_UNUSED | (1ULL<<(63-31)))
119#define H_PAGE_SET_ACTIVE H_PAGE_STATE_CHANGE
120#define H_AVPN (1ULL<<(63-32)) /* An avpn is provided as a sanity test */
121#define H_ANDCOND (1ULL<<(63-33))
122#define H_ICACHE_INVALIDATE (1ULL<<(63-40)) /* icbi, etc. (ignored for IO pages) */
123#define H_ICACHE_SYNCHRONIZE (1ULL<<(63-41)) /* dcbst, icbi, etc (ignored for IO pages */
124#define H_ZERO_PAGE (1ULL<<(63-48)) /* zero the page before mapping (ignored for IO pages) */
125#define H_COPY_PAGE (1ULL<<(63-49))
126#define H_N (1ULL<<(63-61))
127#define H_PP1 (1ULL<<(63-62))
128#define H_PP2 (1ULL<<(63-63))
129
130/* VASI States */
131#define H_VASI_INVALID 0
132#define H_VASI_ENABLED 1
133#define H_VASI_ABORTED 2
134#define H_VASI_SUSPENDING 3
135#define H_VASI_SUSPENDED 4
136#define H_VASI_RESUMED 5
137#define H_VASI_COMPLETED 6
138
139/* DABRX flags */
140#define H_DABRX_HYPERVISOR (1ULL<<(63-61))
141#define H_DABRX_KERNEL (1ULL<<(63-62))
142#define H_DABRX_USER (1ULL<<(63-63))
143
66a0a2cb 144/* Each control block has to be on a 4K boundary */
9fdf0c29
DG
145#define H_CB_ALIGNMENT 4096
146
147/* pSeries hypervisor opcodes */
148#define H_REMOVE 0x04
149#define H_ENTER 0x08
150#define H_READ 0x0c
151#define H_CLEAR_MOD 0x10
152#define H_CLEAR_REF 0x14
153#define H_PROTECT 0x18
154#define H_GET_TCE 0x1c
155#define H_PUT_TCE 0x20
156#define H_SET_SPRG0 0x24
157#define H_SET_DABR 0x28
158#define H_PAGE_INIT 0x2c
159#define H_SET_ASR 0x30
160#define H_ASR_ON 0x34
161#define H_ASR_OFF 0x38
162#define H_LOGICAL_CI_LOAD 0x3c
163#define H_LOGICAL_CI_STORE 0x40
164#define H_LOGICAL_CACHE_LOAD 0x44
165#define H_LOGICAL_CACHE_STORE 0x48
166#define H_LOGICAL_ICBI 0x4c
167#define H_LOGICAL_DCBF 0x50
168#define H_GET_TERM_CHAR 0x54
169#define H_PUT_TERM_CHAR 0x58
170#define H_REAL_TO_LOGICAL 0x5c
171#define H_HYPERVISOR_DATA 0x60
172#define H_EOI 0x64
173#define H_CPPR 0x68
174#define H_IPI 0x6c
175#define H_IPOLL 0x70
176#define H_XIRR 0x74
177#define H_PERFMON 0x7c
178#define H_MIGRATE_DMA 0x78
179#define H_REGISTER_VPA 0xDC
180#define H_CEDE 0xE0
181#define H_CONFER 0xE4
182#define H_PROD 0xE8
183#define H_GET_PPP 0xEC
184#define H_SET_PPP 0xF0
185#define H_PURR 0xF4
186#define H_PIC 0xF8
187#define H_REG_CRQ 0xFC
188#define H_FREE_CRQ 0x100
189#define H_VIO_SIGNAL 0x104
190#define H_SEND_CRQ 0x108
191#define H_COPY_RDMA 0x110
192#define H_REGISTER_LOGICAL_LAN 0x114
193#define H_FREE_LOGICAL_LAN 0x118
194#define H_ADD_LOGICAL_LAN_BUFFER 0x11C
195#define H_SEND_LOGICAL_LAN 0x120
196#define H_BULK_REMOVE 0x124
197#define H_MULTICAST_CTRL 0x130
198#define H_SET_XDABR 0x134
199#define H_STUFF_TCE 0x138
200#define H_PUT_TCE_INDIRECT 0x13C
201#define H_CHANGE_LOGICAL_LAN_MAC 0x14C
202#define H_VTERM_PARTNER_INFO 0x150
203#define H_REGISTER_VTERM 0x154
204#define H_FREE_VTERM 0x158
205#define H_RESET_EVENTS 0x15C
206#define H_ALLOC_RESOURCE 0x160
207#define H_FREE_RESOURCE 0x164
208#define H_MODIFY_QP 0x168
209#define H_QUERY_QP 0x16C
210#define H_REREGISTER_PMR 0x170
211#define H_REGISTER_SMR 0x174
212#define H_QUERY_MR 0x178
213#define H_QUERY_MW 0x17C
214#define H_QUERY_HCA 0x180
215#define H_QUERY_PORT 0x184
216#define H_MODIFY_PORT 0x188
217#define H_DEFINE_AQP1 0x18C
218#define H_GET_TRACE_BUFFER 0x190
219#define H_DEFINE_AQP0 0x194
220#define H_RESIZE_MR 0x198
221#define H_ATTACH_MCQP 0x19C
222#define H_DETACH_MCQP 0x1A0
223#define H_CREATE_RPT 0x1A4
224#define H_REMOVE_RPT 0x1A8
225#define H_REGISTER_RPAGES 0x1AC
226#define H_DISABLE_AND_GETC 0x1B0
227#define H_ERROR_DATA 0x1B4
228#define H_GET_HCA_INFO 0x1B8
229#define H_GET_PERF_COUNT 0x1BC
230#define H_MANAGE_TRACE 0x1C0
231#define H_FREE_LOGICAL_LAN_BUFFER 0x1D4
232#define H_QUERY_INT_STATE 0x1E4
233#define H_POLL_PENDING 0x1D8
234#define H_ILLAN_ATTRIBUTES 0x244
235#define H_MODIFY_HEA_QP 0x250
236#define H_QUERY_HEA_QP 0x254
237#define H_QUERY_HEA 0x258
238#define H_QUERY_HEA_PORT 0x25C
239#define H_MODIFY_HEA_PORT 0x260
240#define H_REG_BCMC 0x264
241#define H_DEREG_BCMC 0x268
242#define H_REGISTER_HEA_RPAGES 0x26C
243#define H_DISABLE_AND_GET_HEA 0x270
244#define H_GET_HEA_INFO 0x274
245#define H_ALLOC_HEA_RESOURCE 0x278
246#define H_ADD_CONN 0x284
247#define H_DEL_CONN 0x288
248#define H_JOIN 0x298
249#define H_VASI_STATE 0x2A4
250#define H_ENABLE_CRQ 0x2B0
251#define H_GET_EM_PARMS 0x2B8
252#define H_SET_MPP 0x2D0
253#define H_GET_MPP 0x2D4
254#define MAX_HCALL_OPCODE H_GET_MPP
255
39ac8455
DG
256/* The hcalls above are standardized in PAPR and implemented by pHyp
257 * as well.
258 *
259 * We also need some hcalls which are specific to qemu / KVM-on-POWER.
260 * So far we just need one for H_RTAS, but in future we'll need more
261 * for extensions like virtio. We put those into the 0xf000-0xfffc
262 * range which is reserved by PAPR for "platform-specific" hcalls.
263 */
264#define KVMPPC_HCALL_BASE 0xf000
265#define KVMPPC_H_RTAS (KVMPPC_HCALL_BASE + 0x0)
266#define KVMPPC_HCALL_MAX KVMPPC_H_RTAS
267
9fdf0c29
DG
268extern sPAPREnvironment *spapr;
269
270/*#define DEBUG_SPAPR_HCALLS*/
271
272#ifdef DEBUG_SPAPR_HCALLS
273#define hcall_dprintf(fmt, ...) \
274 do { fprintf(stderr, fmt, ## __VA_ARGS__); } while (0)
275#else
276#define hcall_dprintf(fmt, ...) \
277 do { } while (0)
278#endif
279
280typedef target_ulong (*spapr_hcall_fn)(CPUState *env, sPAPREnvironment *spapr,
281 target_ulong opcode,
282 target_ulong *args);
283
284void spapr_register_hypercall(target_ulong opcode, spapr_hcall_fn fn);
285target_ulong spapr_hypercall(CPUState *env, target_ulong opcode,
286 target_ulong *args);
287
e6c866d4 288qemu_irq spapr_allocate_irq(uint32_t hint, uint32_t *irq_num);
277f9acf 289
39ac8455
DG
290static inline uint32_t rtas_ld(target_ulong phys, int n)
291{
06c46bba 292 return ldl_be_phys(phys + 4*n);
39ac8455
DG
293}
294
295static inline void rtas_st(target_ulong phys, int n, uint32_t val)
296{
06c46bba 297 stl_be_phys(phys + 4*n, val);
39ac8455
DG
298}
299
300typedef void (*spapr_rtas_fn)(sPAPREnvironment *spapr, uint32_t token,
301 uint32_t nargs, target_ulong args,
302 uint32_t nret, target_ulong rets);
303void spapr_rtas_register(const char *name, spapr_rtas_fn fn);
304target_ulong spapr_rtas_call(sPAPREnvironment *spapr,
305 uint32_t token, uint32_t nargs, target_ulong args,
306 uint32_t nret, target_ulong rets);
307int spapr_rtas_device_tree_setup(void *fdt, target_phys_addr_t rtas_addr,
308 target_phys_addr_t rtas_size);
309
9fdf0c29 310#endif /* !defined (__HW_SPAPR_H__) */