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3384f95c DG |
1 | /* |
2 | * QEMU SPAPR PCI BUS definitions | |
3 | * | |
4 | * Copyright (c) 2011 Alexey Kardashevskiy <aik@au1.ibm.com> | |
5 | * | |
6 | * This library is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU Lesser General Public | |
8 | * License as published by the Free Software Foundation; either | |
9 | * version 2 of the License, or (at your option) any later version. | |
10 | * | |
11 | * This library is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
14 | * Lesser General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU Lesser General Public | |
17 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. | |
18 | */ | |
19 | #if !defined(__HW_SPAPR_H__) | |
20 | #error Please include spapr.h before this file! | |
21 | #endif | |
22 | ||
23 | #if !defined(__HW_SPAPR_PCI_H__) | |
24 | #define __HW_SPAPR_PCI_H__ | |
25 | ||
7fb0bd34 | 26 | #include "hw/pci.h" |
3384f95c DG |
27 | #include "hw/pci_host.h" |
28 | #include "hw/xics.h" | |
29 | ||
3384f95c | 30 | typedef struct sPAPRPHBState { |
3384f95c DG |
31 | PCIHostState host_state; |
32 | ||
33 | uint64_t buid; | |
298a9710 DG |
34 | char *busname; |
35 | char *dtbusname; | |
3384f95c DG |
36 | |
37 | MemoryRegion memspace, iospace; | |
298a9710 | 38 | target_phys_addr_t mem_win_addr, mem_win_size, io_win_addr, io_win_size; |
3384f95c | 39 | MemoryRegion memwindow, iowindow; |
edded454 | 40 | DMAContext *dma; |
3384f95c DG |
41 | |
42 | struct { | |
a307d594 | 43 | uint32_t irq; |
7fb0bd34 | 44 | } lsi_table[PCI_NUM_PINS]; |
3384f95c DG |
45 | |
46 | QLIST_ENTRY(sPAPRPHBState) list; | |
47 | } sPAPRPHBState; | |
48 | ||
a307d594 AK |
49 | static inline qemu_irq spapr_phb_lsi_qirq(struct sPAPRPHBState *phb, int pin) |
50 | { | |
51 | return xics_get_qirq(spapr->icp, phb->lsi_table[pin].irq); | |
52 | } | |
53 | ||
3384f95c DG |
54 | #define SPAPR_PCI_MEM_WIN_BUS_OFFSET 0x80000000ULL |
55 | #define SPAPR_PCI_IO_WIN_SIZE 0x10000 | |
56 | ||
57 | void spapr_create_phb(sPAPREnvironment *spapr, | |
58 | const char *busname, uint64_t buid, | |
59 | uint64_t mem_win_addr, uint64_t mem_win_size, | |
60 | uint64_t io_win_addr); | |
61 | ||
e0fdbd7c AK |
62 | int spapr_populate_pci_dt(sPAPRPHBState *phb, |
63 | uint32_t xics_phandle, | |
64 | void *fdt); | |
3384f95c | 65 | |
fa28f71b AK |
66 | void spapr_pci_rtas_init(void); |
67 | ||
3384f95c | 68 | #endif /* __HW_SPAPR_PCI_H__ */ |