[qemu.git] / hw / ssd0323.c

/*
 * SSD0323 OLED controller with OSRAM Pictiva 128x64 display.
 *
 * Copyright (c) 2006-2007 CodeSourcery.
 * Written by Paul Brook
 *
 * This code is licensed under the GPL.
 */

/* The controller can support a variety of different displays, but we only
   implement one.  Most of the commends relating to brightness and geometry
   setup are ignored. */
#include "ssi.h"
#include "console.h"

//#define DEBUG_SSD0323 1

#ifdef DEBUG_SSD0323
#define DPRINTF(fmt, ...) \
do { printf("ssd0323: " fmt , ## __VA_ARGS__); } while (0)
#define BADF(fmt, ...) \
do { fprintf(stderr, "ssd0323: error: " fmt , ## __VA_ARGS__); exit(1);} while (0)
#else
#define DPRINTF(fmt, ...) do {} while(0)
#define BADF(fmt, ...) \
do { fprintf(stderr, "ssd0323: error: " fmt , ## __VA_ARGS__);} while (0)
#endif

/* Scaling factor for pixels.  */
#define MAGNIFY 4

#define REMAP_SWAP_COLUMN 0x01
#define REMAP_SWAP_NYBBLE 0x02
#define REMAP_VERTICAL    0x04
#define REMAP_SWAP_COM    0x10
#define REMAP_SPLIT_COM   0x40

enum ssd0323_mode
{
    SSD0323_CMD,
    SSD0323_DATA
};

typedef struct {
    SSISlave ssidev;
    DisplayState *ds;

    int cmd_len;
    int cmd;
    int cmd_data[8];
    int row;
    int row_start;
    int row_end;
    int col;
    int col_start;
    int col_end;
    int redraw;
    int remap;
    enum ssd0323_mode mode;
    uint8_t framebuffer[128 * 80 / 2];
} ssd0323_state;

static uint32_t ssd0323_transfer(SSISlave *dev, uint32_t data)
{
    ssd0323_state *s = FROM_SSI_SLAVE(ssd0323_state, dev);

    switch (s->mode) {
    case SSD0323_DATA:
        DPRINTF("data 0x%02x\n", data);
        s->framebuffer[s->col + s->row * 64] = data;
        if (s->remap & REMAP_VERTICAL) {
            s->row++;
            if (s->row > s->row_end) {
                s->row = s->row_start;
                s->col++;
            }
            if (s->col > s->col_end) {
                s->col = s->col_start;
            }
        } else {
            s->col++;
            if (s->col > s->col_end) {
                s->row++;
                s->col = s->col_start;
            }
            if (s->row > s->row_end) {
                s->row = s->row_start;
            }
        }
        s->redraw = 1;
        break;
    case SSD0323_CMD:
        DPRINTF("cmd 0x%02x\n", data);
        if (s->cmd_len == 0) {
            s->cmd = data;
        } else {
            s->cmd_data[s->cmd_len - 1] = data;
        }
        s->cmd_len++;
        switch (s->cmd) {
#define DATA(x) if (s->cmd_len <= (x)) return 0
        case 0x15: /* Set column.  */
            DATA(2);
            s->col = s->col_start = s->cmd_data[0] % 64;
            s->col_end = s->cmd_data[1] % 64;
            break;
        case 0x75: /* Set row.  */
            DATA(2);
            s->row = s->row_start = s->cmd_data[0] % 80;
            s->row_end = s->cmd_data[1] % 80;
            break;
        case 0x81: /* Set contrast */
            DATA(1);
            break;
        case 0x84: case 0x85: case 0x86: /* Max current.  */
            DATA(0);
            break;
        case 0xa0: /* Set remapping.  */
            /* FIXME: Implement this.  */
            DATA(1);
            s->remap = s->cmd_data[0];
            break;
        case 0xa1: /* Set display start line.  */
        case 0xa2: /* Set display offset.  */
            /* FIXME: Implement these.  */
            DATA(1);
            break;
        case 0xa4: /* Normal mode.  */
        case 0xa5: /* All on.  */
        case 0xa6: /* All off.  */
        case 0xa7: /* Inverse.  */
            /* FIXME: Implement these.  */
            DATA(0);
            break;
        case 0xa8: /* Set multiplex ratio.  */
        case 0xad: /* Set DC-DC converter.  */
            DATA(1);
            /* Ignored.  Don't care.  */
            break;
        case 0xae: /* Display off.  */
        case 0xaf: /* Display on.  */
            DATA(0);
            /* TODO: Implement power control.  */
            break;
        case 0xb1: /* Set phase length.  */
        case 0xb2: /* Set row period.  */
        case 0xb3: /* Set clock rate.  */
        case 0xbc: /* Set precharge.  */
        case 0xbe: /* Set VCOMH.  */
        case 0xbf: /* Set segment low.  */
            DATA(1);
            /* Ignored.  Don't care.  */
            break;
        case 0xb8: /* Set grey scale table.  */
            /* FIXME: Implement this.  */
            DATA(8);
            break;
        case 0xe3: /* NOP.  */
            DATA(0);
            break;
        case 0xff: /* Nasty hack because we don't handle chip selects
                      properly.  */
            break;
        default:
            BADF("Unknown command: 0x%x\n", data);
        }
        s->cmd_len = 0;
        return 0;
    }
    return 0;
}

static void ssd0323_update_display(void *opaque)
{
    ssd0323_state *s = (ssd0323_state *)opaque;
    uint8_t *dest;
    uint8_t *src;
    int x;
    int y;
    int i;
    int line;
    char *colors[16];
    char colortab[MAGNIFY * 64];
    char *p;
    int dest_width;

    if (!s->redraw)
        return;

    switch (ds_get_bits_per_pixel(s->ds)) {
    case 0:
        return;
    case 15:
        dest_width = 2;
        break;
    case 16:
        dest_width = 2;
        break;
    case 24:
        dest_width = 3;
        break;
    case 32:
        dest_width = 4;
        break;
    default:
        BADF("Bad color depth\n");
        return;
    }
    p = colortab;
    for (i = 0; i < 16; i++) {
        int n;
        colors[i] = p;
        switch (ds_get_bits_per_pixel(s->ds)) {
        case 15:
            n = i * 2 + (i >> 3);
            p[0] = n | (n << 5);
            p[1] = (n << 2) | (n >> 3);
            break;
        case 16:
            n = i * 2 + (i >> 3);
            p[0] = n | (n << 6) | ((n << 1) & 0x20);
            p[1] = (n << 3) | (n >> 2);
            break;
        case 24:
        case 32:
            n = (i << 4) | i;
            p[0] = p[1] = p[2] = n;
            break;
        default:
            BADF("Bad color depth\n");
            return;
        }
        p += dest_width;
    }
    /* TODO: Implement row/column remapping.  */
    dest = ds_get_data(s->ds);
    for (y = 0; y < 64; y++) {
        line = y;
        src = s->framebuffer + 64 * line;
        for (x = 0; x < 64; x++) {
            int val;
            val = *src >> 4;
            for (i = 0; i < MAGNIFY; i++) {
                memcpy(dest, colors[val], dest_width);
                dest += dest_width;
            }
            val = *src & 0xf;
            for (i = 0; i < MAGNIFY; i++) {
                memcpy(dest, colors[val], dest_width);
                dest += dest_width;
            }
            src++;
        }
        for (i = 1; i < MAGNIFY; i++) {
            memcpy(dest, dest - dest_width * MAGNIFY * 128,
                   dest_width * 128 * MAGNIFY);
            dest += dest_width * 128 * MAGNIFY;
        }
    }
    s->redraw = 0;
    dpy_update(s->ds, 0, 0, 128 * MAGNIFY, 64 * MAGNIFY);
}

static void ssd0323_invalidate_display(void * opaque)
{
    ssd0323_state *s = (ssd0323_state *)opaque;
    s->redraw = 1;
}

/* Command/data input.  */
static void ssd0323_cd(void *opaque, int n, int level)
{
    ssd0323_state *s = (ssd0323_state *)opaque;
    DPRINTF("%s mode\n", level ? "Data" : "Command");
    s->mode = level ? SSD0323_DATA : SSD0323_CMD;
}

static void ssd0323_save(QEMUFile *f, void *opaque)
{
    ssd0323_state *s = (ssd0323_state *)opaque;
    int i;

    qemu_put_be32(f, s->cmd_len);
    qemu_put_be32(f, s->cmd);
    for (i = 0; i < 8; i++)
        qemu_put_be32(f, s->cmd_data[i]);
    qemu_put_be32(f, s->row);
    qemu_put_be32(f, s->row_start);
    qemu_put_be32(f, s->row_end);
    qemu_put_be32(f, s->col);
    qemu_put_be32(f, s->col_start);
    qemu_put_be32(f, s->col_end);
    qemu_put_be32(f, s->redraw);
    qemu_put_be32(f, s->remap);
    qemu_put_be32(f, s->mode);
    qemu_put_buffer(f, s->framebuffer, sizeof(s->framebuffer));
}

static int ssd0323_load(QEMUFile *f, void *opaque, int version_id)
{
    ssd0323_state *s = (ssd0323_state *)opaque;
    int i;

    if (version_id != 1)
        return -EINVAL;

    s->cmd_len = qemu_get_be32(f);
    s->cmd = qemu_get_be32(f);
    for (i = 0; i < 8; i++)
        s->cmd_data[i] = qemu_get_be32(f);
    s->row = qemu_get_be32(f);
    s->row_start = qemu_get_be32(f);
    s->row_end = qemu_get_be32(f);
    s->col = qemu_get_be32(f);
    s->col_start = qemu_get_be32(f);
    s->col_end = qemu_get_be32(f);
    s->redraw = qemu_get_be32(f);
    s->remap = qemu_get_be32(f);
    s->mode = qemu_get_be32(f);
    qemu_get_buffer(f, s->framebuffer, sizeof(s->framebuffer));

    return 0;
}

static int ssd0323_init(SSISlave *dev)
{
    ssd0323_state *s = FROM_SSI_SLAVE(ssd0323_state, dev);

    s->col_end = 63;
    s->row_end = 79;
    s->ds = graphic_console_init(ssd0323_update_display,
                                 ssd0323_invalidate_display,
                                 NULL, NULL, s);
    qemu_console_resize(s->ds, 128 * MAGNIFY, 64 * MAGNIFY);

    qdev_init_gpio_in(&dev->qdev, ssd0323_cd, 1);

    register_savevm(&dev->qdev, "ssd0323_oled", -1, 1,
                    ssd0323_save, ssd0323_load, s);
    return 0;
}

static SSISlaveInfo ssd0323_info = {
    .qdev.name = "ssd0323",
    .qdev.size = sizeof(ssd0323_state),
    .init = ssd0323_init,
    .transfer = ssd0323_transfer
};

static void ssd03232_register_devices(void)
{
    ssi_register_slave(&ssd0323_info);
}

device_init(ssd03232_register_devices)
Commit	Line	Data
9ee6e8bb PB	1	/*
	2	* SSD0323 OLED controller with OSRAM Pictiva 128x64 display.
	3	*
	4	* Copyright (c) 2006-2007 CodeSourcery.
	5	* Written by Paul Brook
	6	*
8e31bf38	7	* This code is licensed under the GPL.
9ee6e8bb PB	8	*/
	9
	10	/* The controller can support a variety of different displays, but we only
	11	implement one. Most of the commends relating to brightness and geometry
	12	setup are ignored. */
5493e33f	13	#include "ssi.h"
87ecb68b	14	#include "console.h"
9ee6e8bb PB	15
	16	//#define DEBUG_SSD0323 1
	17
	18	#ifdef DEBUG_SSD0323
001faf32 BS	19	#define DPRINTF(fmt, ...) \
	20	do { printf("ssd0323: " fmt , ## __VA_ARGS__); } while (0)
	21	#define BADF(fmt, ...) \
	22	do { fprintf(stderr, "ssd0323: error: " fmt , ## __VA_ARGS__); exit(1);} while (0)
9ee6e8bb	23	#else
001faf32 BS	24	#define DPRINTF(fmt, ...) do {} while(0)
	25	#define BADF(fmt, ...) \
	26	do { fprintf(stderr, "ssd0323: error: " fmt , ## __VA_ARGS__);} while (0)
9ee6e8bb PB	27	#endif
	28
	29	/* Scaling factor for pixels. */
	30	#define MAGNIFY 4
	31
7ac56ff0 PB	32	#define REMAP_SWAP_COLUMN 0x01
	33	#define REMAP_SWAP_NYBBLE 0x02
	34	#define REMAP_VERTICAL 0x04
	35	#define REMAP_SWAP_COM 0x10
	36	#define REMAP_SPLIT_COM 0x40
	37
9ee6e8bb PB	38	enum ssd0323_mode
	39	{
	40	SSD0323_CMD,
	41	SSD0323_DATA
	42	};
	43
	44	typedef struct {
5493e33f	45	SSISlave ssidev;
9ee6e8bb PB	46	DisplayState *ds;
	47
	48	int cmd_len;
	49	int cmd;
	50	int cmd_data[8];
	51	int row;
	52	int row_start;
	53	int row_end;
	54	int col;
	55	int col_start;
	56	int col_end;
	57	int redraw;
7ac56ff0	58	int remap;
9ee6e8bb PB	59	enum ssd0323_mode mode;
	60	uint8_t framebuffer[128 * 80 / 2];
	61	} ssd0323_state;
	62
5493e33f	63	static uint32_t ssd0323_transfer(SSISlave *dev, uint32_t data)
9ee6e8bb	64	{
5493e33f PB	65	ssd0323_state *s = FROM_SSI_SLAVE(ssd0323_state, dev);
5493e33f PB	66
9ee6e8bb PB	67	switch (s->mode) {
	68	case SSD0323_DATA:
	69	DPRINTF("data 0x%02x\n", data);
	70	s->framebuffer[s->col + s->row * 64] = data;
7ac56ff0	71	if (s->remap & REMAP_VERTICAL) {
9ee6e8bb	72	s->row++;
7ac56ff0 PB	73	if (s->row > s->row_end) {
	74	s->row = s->row_start;
	75	s->col++;
	76	}
	77	if (s->col > s->col_end) {
	78	s->col = s->col_start;
	79	}
	80	} else {
	81	s->col++;
	82	if (s->col > s->col_end) {
	83	s->row++;
	84	s->col = s->col_start;
	85	}
	86	if (s->row > s->row_end) {
	87	s->row = s->row_start;
	88	}
9ee6e8bb PB	89	}
	90	s->redraw = 1;
	91	break;
	92	case SSD0323_CMD:
	93	DPRINTF("cmd 0x%02x\n", data);
	94	if (s->cmd_len == 0) {
	95	s->cmd = data;
	96	} else {
	97	s->cmd_data[s->cmd_len - 1] = data;
	98	}
	99	s->cmd_len++;
	100	switch (s->cmd) {
	101	#define DATA(x) if (s->cmd_len <= (x)) return 0
	102	case 0x15: /* Set column. */
	103	DATA(2);
7ac56ff0	104	s->col = s->col_start = s->cmd_data[0] % 64;
9ee6e8bb PB	105	s->col_end = s->cmd_data[1] % 64;
	106	break;
	107	case 0x75: /* Set row. */
	108	DATA(2);
7ac56ff0	109	s->row = s->row_start = s->cmd_data[0] % 80;
9ee6e8bb PB	110	s->row_end = s->cmd_data[1] % 80;
	111	break;
	112	case 0x81: /* Set contrast */
	113	DATA(1);
	114	break;
	115	case 0x84: case 0x85: case 0x86: /* Max current. */
	116	DATA(0);
	117	break;
	118	case 0xa0: /* Set remapping. */
	119	/* FIXME: Implement this. */
	120	DATA(1);
7ac56ff0	121	s->remap = s->cmd_data[0];
9ee6e8bb PB	122	break;
	123	case 0xa1: /* Set display start line. */
	124	case 0xa2: /* Set display offset. */
	125	/* FIXME: Implement these. */
	126	DATA(1);
	127	break;
	128	case 0xa4: /* Normal mode. */
	129	case 0xa5: /* All on. */
	130	case 0xa6: /* All off. */
	131	case 0xa7: /* Inverse. */
	132	/* FIXME: Implement these. */
	133	DATA(0);
	134	break;
	135	case 0xa8: /* Set multiplex ratio. */
	136	case 0xad: /* Set DC-DC converter. */
	137	DATA(1);
	138	/* Ignored. Don't care. */
	139	break;
	140	case 0xae: /* Display off. */
	141	case 0xaf: /* Display on. */
	142	DATA(0);
	143	/* TODO: Implement power control. */
	144	break;
	145	case 0xb1: /* Set phase length. */
	146	case 0xb2: /* Set row period. */
	147	case 0xb3: /* Set clock rate. */
	148	case 0xbc: /* Set precharge. */
	149	case 0xbe: /* Set VCOMH. */
	150	case 0xbf: /* Set segment low. */
	151	DATA(1);
	152	/* Ignored. Don't care. */
	153	break;
	154	case 0xb8: /* Set grey scale table. */
	155	/* FIXME: Implement this. */
	156	DATA(8);
	157	break;
	158	case 0xe3: /* NOP. */
	159	DATA(0);
	160	break;
775616c3 PB	161	case 0xff: /* Nasty hack because we don't handle chip selects
	162	properly. */
	163	break;
9ee6e8bb PB	164	default:
	165	BADF("Unknown command: 0x%x\n", data);
	166	}
	167	s->cmd_len = 0;
	168	return 0;
	169	}
	170	return 0;
	171	}
	172
	173	static void ssd0323_update_display(void *opaque)
	174	{
	175	ssd0323_state s = (ssd0323_state )opaque;
	176	uint8_t *dest;
	177	uint8_t *src;
	178	int x;
	179	int y;
	180	int i;
	181	int line;
	182	char *colors[16];
	183	char colortab[MAGNIFY * 64];
	184	char *p;
	185	int dest_width;
	186
b115bb3f PB	187	if (!s->redraw)
	188	return;
	189
0e1f5a0c	190	switch (ds_get_bits_per_pixel(s->ds)) {
b115bb3f PB	191	case 0:
	192	return;
	193	case 15:
	194	dest_width = 2;
	195	break;
	196	case 16:
	197	dest_width = 2;
	198	break;
	199	case 24:
	200	dest_width = 3;
	201	break;
	202	case 32:
	203	dest_width = 4;
	204	break;
	205	default:
	206	BADF("Bad color depth\n");
	207	return;
	208	}
	209	p = colortab;
	210	for (i = 0; i < 16; i++) {
	211	int n;
	212	colors[i] = p;
0e1f5a0c	213	switch (ds_get_bits_per_pixel(s->ds)) {
9ee6e8bb	214	case 15:
b115bb3f PB	215	n = i * 2 + (i >> 3);
	216	p[0] = n \| (n << 5);
	217	p[1] = (n << 2) \| (n >> 3);
9ee6e8bb PB	218	break;
9ee6e8bb PB	219	case 16:
b115bb3f PB	220	n = i * 2 + (i >> 3);
	221	p[0] = n \| (n << 6) \| ((n << 1) & 0x20);
	222	p[1] = (n << 3) \| (n >> 2);
9ee6e8bb PB	223	break;
9ee6e8bb PB	224	case 24:
9ee6e8bb	225	case 32:
b115bb3f PB	226	n = (i << 4) \| i;
b115bb3f PB	227	p[0] = p[1] = p[2] = n;
9ee6e8bb PB	228	break;
	229	default:
	230	BADF("Bad color depth\n");
	231	return;
	232	}
b115bb3f PB	233	p += dest_width;
	234	}
	235	/* TODO: Implement row/column remapping. */
0e1f5a0c	236	dest = ds_get_data(s->ds);
b115bb3f PB	237	for (y = 0; y < 64; y++) {
	238	line = y;
	239	src = s->framebuffer + 64 * line;
	240	for (x = 0; x < 64; x++) {
	241	int val;
	242	val = *src >> 4;
	243	for (i = 0; i < MAGNIFY; i++) {
	244	memcpy(dest, colors[val], dest_width);
	245	dest += dest_width;
9ee6e8bb	246	}
b115bb3f PB	247	val = *src & 0xf;
	248	for (i = 0; i < MAGNIFY; i++) {
	249	memcpy(dest, colors[val], dest_width);
	250	dest += dest_width;
9ee6e8bb	251	}
b115bb3f PB	252	src++;
	253	}
	254	for (i = 1; i < MAGNIFY; i++) {
	255	memcpy(dest, dest - dest_width * MAGNIFY * 128,
	256	dest_width * 128 * MAGNIFY);
	257	dest += dest_width * 128 * MAGNIFY;
9ee6e8bb PB	258	}
9ee6e8bb PB	259	}
b115bb3f	260	s->redraw = 0;
9ee6e8bb PB	261	dpy_update(s->ds, 0, 0, 128 * MAGNIFY, 64 * MAGNIFY);
	262	}
	263
	264	static void ssd0323_invalidate_display(void * opaque)
	265	{
	266	ssd0323_state s = (ssd0323_state )opaque;
	267	s->redraw = 1;
	268	}
	269
	270	/* Command/data input. */
	271	static void ssd0323_cd(void *opaque, int n, int level)
	272	{
	273	ssd0323_state s = (ssd0323_state )opaque;
	274	DPRINTF("%s mode\n", level ? "Data" : "Command");
	275	s->mode = level ? SSD0323_DATA : SSD0323_CMD;
	276	}
	277
23e39294 PB	278	static void ssd0323_save(QEMUFile f, void opaque)
	279	{
	280	ssd0323_state s = (ssd0323_state )opaque;
	281	int i;
	282
	283	qemu_put_be32(f, s->cmd_len);
	284	qemu_put_be32(f, s->cmd);
	285	for (i = 0; i < 8; i++)
	286	qemu_put_be32(f, s->cmd_data[i]);
	287	qemu_put_be32(f, s->row);
	288	qemu_put_be32(f, s->row_start);
	289	qemu_put_be32(f, s->row_end);
	290	qemu_put_be32(f, s->col);
	291	qemu_put_be32(f, s->col_start);
	292	qemu_put_be32(f, s->col_end);
	293	qemu_put_be32(f, s->redraw);
	294	qemu_put_be32(f, s->remap);
	295	qemu_put_be32(f, s->mode);
	296	qemu_put_buffer(f, s->framebuffer, sizeof(s->framebuffer));
	297	}
	298
	299	static int ssd0323_load(QEMUFile f, void opaque, int version_id)
	300	{
	301	ssd0323_state s = (ssd0323_state )opaque;
	302	int i;
	303
	304	if (version_id != 1)
	305	return -EINVAL;
	306
	307	s->cmd_len = qemu_get_be32(f);
	308	s->cmd = qemu_get_be32(f);
	309	for (i = 0; i < 8; i++)
	310	s->cmd_data[i] = qemu_get_be32(f);
	311	s->row = qemu_get_be32(f);
	312	s->row_start = qemu_get_be32(f);
	313	s->row_end = qemu_get_be32(f);
	314	s->col = qemu_get_be32(f);
	315	s->col_start = qemu_get_be32(f);
	316	s->col_end = qemu_get_be32(f);
	317	s->redraw = qemu_get_be32(f);
	318	s->remap = qemu_get_be32(f);
	319	s->mode = qemu_get_be32(f);
	320	qemu_get_buffer(f, s->framebuffer, sizeof(s->framebuffer));
	321
	322	return 0;
	323	}
	324
81a322d4	325	static int ssd0323_init(SSISlave *dev)
9ee6e8bb	326	{
5493e33f	327	ssd0323_state *s = FROM_SSI_SLAVE(ssd0323_state, dev);
9ee6e8bb	328
9ee6e8bb PB	329	s->col_end = 63;
9ee6e8bb PB	330	s->row_end = 79;
3023f332 AL	331	s->ds = graphic_console_init(ssd0323_update_display,
	332	ssd0323_invalidate_display,
	333	NULL, NULL, s);
	334	qemu_console_resize(s->ds, 128 * MAGNIFY, 64 * MAGNIFY);
9ee6e8bb	335
5493e33f	336	qdev_init_gpio_in(&dev->qdev, ssd0323_cd, 1);
9ee6e8bb	337
0be71e32 AW	338	register_savevm(&dev->qdev, "ssd0323_oled", -1, 1,
0be71e32 AW	339	ssd0323_save, ssd0323_load, s);
81a322d4	340	return 0;
5493e33f	341	}
23e39294	342
5493e33f	343	static SSISlaveInfo ssd0323_info = {
074f2fff GH	344	.qdev.name = "ssd0323",
074f2fff GH	345	.qdev.size = sizeof(ssd0323_state),
5493e33f PB	346	.init = ssd0323_init,
	347	.transfer = ssd0323_transfer
	348	};
	349
	350	static void ssd03232_register_devices(void)
	351	{
074f2fff	352	ssi_register_slave(&ssd0323_info);
9ee6e8bb	353	}
5493e33f PB	354
5493e33f PB	355	device_init(ssd03232_register_devices)