[qemu.git] / hw / ssd0323.c

/*
 * SSD0323 OLED controller with OSRAM Pictiva 128x64 display.
 *
 * Copyright (c) 2006-2007 CodeSourcery.
 * Written by Paul Brook
 *
 * This code is licensed under the GPL.
 */

/* The controller can support a variety of different displays, but we only
   implement one.  Most of the commends relating to brightness and geometry
   setup are ignored. */
#include "ssi.h"
#include "console.h"

//#define DEBUG_SSD0323 1

#ifdef DEBUG_SSD0323
#define DPRINTF(fmt, ...) \
do { printf("ssd0323: " fmt , ## __VA_ARGS__); } while (0)
#define BADF(fmt, ...) \
do { \
    fprintf(stderr, "ssd0323: error: " fmt , ## __VA_ARGS__); abort(); \
} while (0)
#else
#define DPRINTF(fmt, ...) do {} while(0)
#define BADF(fmt, ...) \
do { fprintf(stderr, "ssd0323: error: " fmt , ## __VA_ARGS__);} while (0)
#endif

/* Scaling factor for pixels.  */
#define MAGNIFY 4

#define REMAP_SWAP_COLUMN 0x01
#define REMAP_SWAP_NYBBLE 0x02
#define REMAP_VERTICAL    0x04
#define REMAP_SWAP_COM    0x10
#define REMAP_SPLIT_COM   0x40

enum ssd0323_mode
{
    SSD0323_CMD,
    SSD0323_DATA
};

typedef struct {
    SSISlave ssidev;
    DisplayState *ds;

    int cmd_len;
    int cmd;
    int cmd_data[8];
    int row;
    int row_start;
    int row_end;
    int col;
    int col_start;
    int col_end;
    int redraw;
    int remap;
    enum ssd0323_mode mode;
    uint8_t framebuffer[128 * 80 / 2];
} ssd0323_state;

static uint32_t ssd0323_transfer(SSISlave *dev, uint32_t data)
{
    ssd0323_state *s = FROM_SSI_SLAVE(ssd0323_state, dev);

    switch (s->mode) {
    case SSD0323_DATA:
        DPRINTF("data 0x%02x\n", data);
        s->framebuffer[s->col + s->row * 64] = data;
        if (s->remap & REMAP_VERTICAL) {
            s->row++;
            if (s->row > s->row_end) {
                s->row = s->row_start;
                s->col++;
            }
            if (s->col > s->col_end) {
                s->col = s->col_start;
            }
        } else {
            s->col++;
            if (s->col > s->col_end) {
                s->row++;
                s->col = s->col_start;
            }
            if (s->row > s->row_end) {
                s->row = s->row_start;
            }
        }
        s->redraw = 1;
        break;
    case SSD0323_CMD:
        DPRINTF("cmd 0x%02x\n", data);
        if (s->cmd_len == 0) {
            s->cmd = data;
        } else {
            s->cmd_data[s->cmd_len - 1] = data;
        }
        s->cmd_len++;
        switch (s->cmd) {
#define DATA(x) if (s->cmd_len <= (x)) return 0
        case 0x15: /* Set column.  */
            DATA(2);
            s->col = s->col_start = s->cmd_data[0] % 64;
            s->col_end = s->cmd_data[1] % 64;
            break;
        case 0x75: /* Set row.  */
            DATA(2);
            s->row = s->row_start = s->cmd_data[0] % 80;
            s->row_end = s->cmd_data[1] % 80;
            break;
        case 0x81: /* Set contrast */
            DATA(1);
            break;
        case 0x84: case 0x85: case 0x86: /* Max current.  */
            DATA(0);
            break;
        case 0xa0: /* Set remapping.  */
            /* FIXME: Implement this.  */
            DATA(1);
            s->remap = s->cmd_data[0];
            break;
        case 0xa1: /* Set display start line.  */
        case 0xa2: /* Set display offset.  */
            /* FIXME: Implement these.  */
            DATA(1);
            break;
        case 0xa4: /* Normal mode.  */
        case 0xa5: /* All on.  */
        case 0xa6: /* All off.  */
        case 0xa7: /* Inverse.  */
            /* FIXME: Implement these.  */
            DATA(0);
            break;
        case 0xa8: /* Set multiplex ratio.  */
        case 0xad: /* Set DC-DC converter.  */
            DATA(1);
            /* Ignored.  Don't care.  */
            break;
        case 0xae: /* Display off.  */
        case 0xaf: /* Display on.  */
            DATA(0);
            /* TODO: Implement power control.  */
            break;
        case 0xb1: /* Set phase length.  */
        case 0xb2: /* Set row period.  */
        case 0xb3: /* Set clock rate.  */
        case 0xbc: /* Set precharge.  */
        case 0xbe: /* Set VCOMH.  */
        case 0xbf: /* Set segment low.  */
            DATA(1);
            /* Ignored.  Don't care.  */
            break;
        case 0xb8: /* Set grey scale table.  */
            /* FIXME: Implement this.  */
            DATA(8);
            break;
        case 0xe3: /* NOP.  */
            DATA(0);
            break;
        case 0xff: /* Nasty hack because we don't handle chip selects
                      properly.  */
            break;
        default:
            BADF("Unknown command: 0x%x\n", data);
        }
        s->cmd_len = 0;
        return 0;
    }
    return 0;
}

static void ssd0323_update_display(void *opaque)
{
    ssd0323_state *s = (ssd0323_state *)opaque;
    uint8_t *dest;
    uint8_t *src;
    int x;
    int y;
    int i;
    int line;
    char *colors[16];
    char colortab[MAGNIFY * 64];
    char *p;
    int dest_width;

    if (!s->redraw)
        return;

    switch (ds_get_bits_per_pixel(s->ds)) {
    case 0:
        return;
    case 15:
        dest_width = 2;
        break;
    case 16:
        dest_width = 2;
        break;
    case 24:
        dest_width = 3;
        break;
    case 32:
        dest_width = 4;
        break;
    default:
        BADF("Bad color depth\n");
        return;
    }
    p = colortab;
    for (i = 0; i < 16; i++) {
        int n;
        colors[i] = p;
        switch (ds_get_bits_per_pixel(s->ds)) {
        case 15:
            n = i * 2 + (i >> 3);
            p[0] = n | (n << 5);
            p[1] = (n << 2) | (n >> 3);
            break;
        case 16:
            n = i * 2 + (i >> 3);
            p[0] = n | (n << 6) | ((n << 1) & 0x20);
            p[1] = (n << 3) | (n >> 2);
            break;
        case 24:
        case 32:
            n = (i << 4) | i;
            p[0] = p[1] = p[2] = n;
            break;
        default:
            BADF("Bad color depth\n");
            return;
        }
        p += dest_width;
    }
    /* TODO: Implement row/column remapping.  */
    dest = ds_get_data(s->ds);
    for (y = 0; y < 64; y++) {
        line = y;
        src = s->framebuffer + 64 * line;
        for (x = 0; x < 64; x++) {
            int val;
            val = *src >> 4;
            for (i = 0; i < MAGNIFY; i++) {
                memcpy(dest, colors[val], dest_width);
                dest += dest_width;
            }
            val = *src & 0xf;
            for (i = 0; i < MAGNIFY; i++) {
                memcpy(dest, colors[val], dest_width);
                dest += dest_width;
            }
            src++;
        }
        for (i = 1; i < MAGNIFY; i++) {
            memcpy(dest, dest - dest_width * MAGNIFY * 128,
                   dest_width * 128 * MAGNIFY);
            dest += dest_width * 128 * MAGNIFY;
        }
    }
    s->redraw = 0;
    dpy_gfx_update(s->ds, 0, 0, 128 * MAGNIFY, 64 * MAGNIFY);
}

static void ssd0323_invalidate_display(void * opaque)
{
    ssd0323_state *s = (ssd0323_state *)opaque;
    s->redraw = 1;
}

/* Command/data input.  */
static void ssd0323_cd(void *opaque, int n, int level)
{
    ssd0323_state *s = (ssd0323_state *)opaque;
    DPRINTF("%s mode\n", level ? "Data" : "Command");
    s->mode = level ? SSD0323_DATA : SSD0323_CMD;
}

static void ssd0323_save(QEMUFile *f, void *opaque)
{
    SSISlave *ss = SSI_SLAVE(opaque);
    ssd0323_state *s = (ssd0323_state *)opaque;
    int i;

    qemu_put_be32(f, s->cmd_len);
    qemu_put_be32(f, s->cmd);
    for (i = 0; i < 8; i++)
        qemu_put_be32(f, s->cmd_data[i]);
    qemu_put_be32(f, s->row);
    qemu_put_be32(f, s->row_start);
    qemu_put_be32(f, s->row_end);
    qemu_put_be32(f, s->col);
    qemu_put_be32(f, s->col_start);
    qemu_put_be32(f, s->col_end);
    qemu_put_be32(f, s->redraw);
    qemu_put_be32(f, s->remap);
    qemu_put_be32(f, s->mode);
    qemu_put_buffer(f, s->framebuffer, sizeof(s->framebuffer));

    qemu_put_be32(f, ss->cs);
}

static int ssd0323_load(QEMUFile *f, void *opaque, int version_id)
{
    SSISlave *ss = SSI_SLAVE(opaque);
    ssd0323_state *s = (ssd0323_state *)opaque;
    int i;

    if (version_id != 1)
        return -EINVAL;

    s->cmd_len = qemu_get_be32(f);
    s->cmd = qemu_get_be32(f);
    for (i = 0; i < 8; i++)
        s->cmd_data[i] = qemu_get_be32(f);
    s->row = qemu_get_be32(f);
    s->row_start = qemu_get_be32(f);
    s->row_end = qemu_get_be32(f);
    s->col = qemu_get_be32(f);
    s->col_start = qemu_get_be32(f);
    s->col_end = qemu_get_be32(f);
    s->redraw = qemu_get_be32(f);
    s->remap = qemu_get_be32(f);
    s->mode = qemu_get_be32(f);
    qemu_get_buffer(f, s->framebuffer, sizeof(s->framebuffer));

    ss->cs = qemu_get_be32(f);

    return 0;
}

static int ssd0323_init(SSISlave *dev)
{
    ssd0323_state *s = FROM_SSI_SLAVE(ssd0323_state, dev);

    s->col_end = 63;
    s->row_end = 79;
    s->ds = graphic_console_init(ssd0323_update_display,
                                 ssd0323_invalidate_display,
                                 NULL, NULL, s);
    qemu_console_resize(s->ds, 128 * MAGNIFY, 64 * MAGNIFY);

    qdev_init_gpio_in(&dev->qdev, ssd0323_cd, 1);

    register_savevm(&dev->qdev, "ssd0323_oled", -1, 1,
                    ssd0323_save, ssd0323_load, s);
    return 0;
}

static void ssd0323_class_init(ObjectClass *klass, void *data)
{
    SSISlaveClass *k = SSI_SLAVE_CLASS(klass);

    k->init = ssd0323_init;
    k->transfer = ssd0323_transfer;
    k->cs_polarity = SSI_CS_HIGH;
}

static TypeInfo ssd0323_info = {
    .name          = "ssd0323",
    .parent        = TYPE_SSI_SLAVE,
    .instance_size = sizeof(ssd0323_state),
    .class_init    = ssd0323_class_init,
};

static void ssd03232_register_types(void)
{
    type_register_static(&ssd0323_info);
}

type_init(ssd03232_register_types)
Commit	Line	Data
9ee6e8bb PB	1	/*
	2	* SSD0323 OLED controller with OSRAM Pictiva 128x64 display.
	3	*
	4	* Copyright (c) 2006-2007 CodeSourcery.
	5	* Written by Paul Brook
	6	*
8e31bf38	7	* This code is licensed under the GPL.
9ee6e8bb PB	8	*/
	9
	10	/* The controller can support a variety of different displays, but we only
	11	implement one. Most of the commends relating to brightness and geometry
	12	setup are ignored. */
5493e33f	13	#include "ssi.h"
87ecb68b	14	#include "console.h"
9ee6e8bb PB	15
	16	//#define DEBUG_SSD0323 1
	17
	18	#ifdef DEBUG_SSD0323
001faf32 BS	19	#define DPRINTF(fmt, ...) \
	20	do { printf("ssd0323: " fmt , ## __VA_ARGS__); } while (0)
	21	#define BADF(fmt, ...) \
b1c26542 PC	22	do { \
	23	fprintf(stderr, "ssd0323: error: " fmt , ## __VA_ARGS__); abort(); \
	24	} while (0)
9ee6e8bb	25	#else
001faf32 BS	26	#define DPRINTF(fmt, ...) do {} while(0)
	27	#define BADF(fmt, ...) \
	28	do { fprintf(stderr, "ssd0323: error: " fmt , ## __VA_ARGS__);} while (0)
9ee6e8bb PB	29	#endif
	30
	31	/* Scaling factor for pixels. */
	32	#define MAGNIFY 4
	33
7ac56ff0 PB	34	#define REMAP_SWAP_COLUMN 0x01
	35	#define REMAP_SWAP_NYBBLE 0x02
	36	#define REMAP_VERTICAL 0x04
	37	#define REMAP_SWAP_COM 0x10
	38	#define REMAP_SPLIT_COM 0x40
	39
9ee6e8bb PB	40	enum ssd0323_mode
	41	{
	42	SSD0323_CMD,
	43	SSD0323_DATA
	44	};
	45
	46	typedef struct {
5493e33f	47	SSISlave ssidev;
9ee6e8bb PB	48	DisplayState *ds;
	49
	50	int cmd_len;
	51	int cmd;
	52	int cmd_data[8];
	53	int row;
	54	int row_start;
	55	int row_end;
	56	int col;
	57	int col_start;
	58	int col_end;
	59	int redraw;
7ac56ff0	60	int remap;
9ee6e8bb PB	61	enum ssd0323_mode mode;
	62	uint8_t framebuffer[128 * 80 / 2];
	63	} ssd0323_state;
	64
5493e33f	65	static uint32_t ssd0323_transfer(SSISlave *dev, uint32_t data)
9ee6e8bb	66	{
5493e33f PB	67	ssd0323_state *s = FROM_SSI_SLAVE(ssd0323_state, dev);
5493e33f PB	68
9ee6e8bb PB	69	switch (s->mode) {
	70	case SSD0323_DATA:
	71	DPRINTF("data 0x%02x\n", data);
	72	s->framebuffer[s->col + s->row * 64] = data;
7ac56ff0	73	if (s->remap & REMAP_VERTICAL) {
9ee6e8bb	74	s->row++;
7ac56ff0 PB	75	if (s->row > s->row_end) {
	76	s->row = s->row_start;
	77	s->col++;
	78	}
	79	if (s->col > s->col_end) {
	80	s->col = s->col_start;
	81	}
	82	} else {
	83	s->col++;
	84	if (s->col > s->col_end) {
	85	s->row++;
	86	s->col = s->col_start;
	87	}
	88	if (s->row > s->row_end) {
	89	s->row = s->row_start;
	90	}
9ee6e8bb PB	91	}
	92	s->redraw = 1;
	93	break;
	94	case SSD0323_CMD:
	95	DPRINTF("cmd 0x%02x\n", data);
	96	if (s->cmd_len == 0) {
	97	s->cmd = data;
	98	} else {
	99	s->cmd_data[s->cmd_len - 1] = data;
	100	}
	101	s->cmd_len++;
	102	switch (s->cmd) {
	103	#define DATA(x) if (s->cmd_len <= (x)) return 0
	104	case 0x15: /* Set column. */
	105	DATA(2);
7ac56ff0	106	s->col = s->col_start = s->cmd_data[0] % 64;
9ee6e8bb PB	107	s->col_end = s->cmd_data[1] % 64;
	108	break;
	109	case 0x75: /* Set row. */
	110	DATA(2);
7ac56ff0	111	s->row = s->row_start = s->cmd_data[0] % 80;
9ee6e8bb PB	112	s->row_end = s->cmd_data[1] % 80;
	113	break;
	114	case 0x81: /* Set contrast */
	115	DATA(1);
	116	break;
	117	case 0x84: case 0x85: case 0x86: /* Max current. */
	118	DATA(0);
	119	break;
	120	case 0xa0: /* Set remapping. */
	121	/* FIXME: Implement this. */
	122	DATA(1);
7ac56ff0	123	s->remap = s->cmd_data[0];
9ee6e8bb PB	124	break;
	125	case 0xa1: /* Set display start line. */
	126	case 0xa2: /* Set display offset. */
	127	/* FIXME: Implement these. */
	128	DATA(1);
	129	break;
	130	case 0xa4: /* Normal mode. */
	131	case 0xa5: /* All on. */
	132	case 0xa6: /* All off. */
	133	case 0xa7: /* Inverse. */
	134	/* FIXME: Implement these. */
	135	DATA(0);
	136	break;
	137	case 0xa8: /* Set multiplex ratio. */
	138	case 0xad: /* Set DC-DC converter. */
	139	DATA(1);
	140	/* Ignored. Don't care. */
	141	break;
	142	case 0xae: /* Display off. */
	143	case 0xaf: /* Display on. */
	144	DATA(0);
	145	/* TODO: Implement power control. */
	146	break;
	147	case 0xb1: /* Set phase length. */
	148	case 0xb2: /* Set row period. */
	149	case 0xb3: /* Set clock rate. */
	150	case 0xbc: /* Set precharge. */
	151	case 0xbe: /* Set VCOMH. */
	152	case 0xbf: /* Set segment low. */
	153	DATA(1);
	154	/* Ignored. Don't care. */
	155	break;
	156	case 0xb8: /* Set grey scale table. */
	157	/* FIXME: Implement this. */
	158	DATA(8);
	159	break;
	160	case 0xe3: /* NOP. */
	161	DATA(0);
	162	break;
775616c3 PB	163	case 0xff: /* Nasty hack because we don't handle chip selects
	164	properly. */
	165	break;
9ee6e8bb PB	166	default:
	167	BADF("Unknown command: 0x%x\n", data);
	168	}
	169	s->cmd_len = 0;
	170	return 0;
	171	}
	172	return 0;
	173	}
	174
	175	static void ssd0323_update_display(void *opaque)
	176	{
	177	ssd0323_state s = (ssd0323_state )opaque;
	178	uint8_t *dest;
	179	uint8_t *src;
	180	int x;
	181	int y;
	182	int i;
	183	int line;
	184	char *colors[16];
	185	char colortab[MAGNIFY * 64];
	186	char *p;
	187	int dest_width;
	188
b115bb3f PB	189	if (!s->redraw)
	190	return;
	191
0e1f5a0c	192	switch (ds_get_bits_per_pixel(s->ds)) {
b115bb3f PB	193	case 0:
	194	return;
	195	case 15:
	196	dest_width = 2;
	197	break;
	198	case 16:
	199	dest_width = 2;
	200	break;
	201	case 24:
	202	dest_width = 3;
	203	break;
	204	case 32:
	205	dest_width = 4;
	206	break;
	207	default:
	208	BADF("Bad color depth\n");
	209	return;
	210	}
	211	p = colortab;
	212	for (i = 0; i < 16; i++) {
	213	int n;
	214	colors[i] = p;
0e1f5a0c	215	switch (ds_get_bits_per_pixel(s->ds)) {
9ee6e8bb	216	case 15:
b115bb3f PB	217	n = i * 2 + (i >> 3);
	218	p[0] = n \| (n << 5);
	219	p[1] = (n << 2) \| (n >> 3);
9ee6e8bb PB	220	break;
9ee6e8bb PB	221	case 16:
b115bb3f PB	222	n = i * 2 + (i >> 3);
	223	p[0] = n \| (n << 6) \| ((n << 1) & 0x20);
	224	p[1] = (n << 3) \| (n >> 2);
9ee6e8bb PB	225	break;
9ee6e8bb PB	226	case 24:
9ee6e8bb	227	case 32:
b115bb3f PB	228	n = (i << 4) \| i;
b115bb3f PB	229	p[0] = p[1] = p[2] = n;
9ee6e8bb PB	230	break;
	231	default:
	232	BADF("Bad color depth\n");
	233	return;
	234	}
b115bb3f PB	235	p += dest_width;
	236	}
	237	/* TODO: Implement row/column remapping. */
0e1f5a0c	238	dest = ds_get_data(s->ds);
b115bb3f PB	239	for (y = 0; y < 64; y++) {
	240	line = y;
	241	src = s->framebuffer + 64 * line;
	242	for (x = 0; x < 64; x++) {
	243	int val;
	244	val = *src >> 4;
	245	for (i = 0; i < MAGNIFY; i++) {
	246	memcpy(dest, colors[val], dest_width);
	247	dest += dest_width;
9ee6e8bb	248	}
b115bb3f PB	249	val = *src & 0xf;
	250	for (i = 0; i < MAGNIFY; i++) {
	251	memcpy(dest, colors[val], dest_width);
	252	dest += dest_width;
9ee6e8bb	253	}
b115bb3f PB	254	src++;
	255	}
	256	for (i = 1; i < MAGNIFY; i++) {
	257	memcpy(dest, dest - dest_width * MAGNIFY * 128,
	258	dest_width * 128 * MAGNIFY);
	259	dest += dest_width * 128 * MAGNIFY;
9ee6e8bb PB	260	}
9ee6e8bb PB	261	}
b115bb3f	262	s->redraw = 0;
a93a4a22	263	dpy_gfx_update(s->ds, 0, 0, 128 * MAGNIFY, 64 * MAGNIFY);
9ee6e8bb PB	264	}
	265
	266	static void ssd0323_invalidate_display(void * opaque)
	267	{
	268	ssd0323_state s = (ssd0323_state )opaque;
	269	s->redraw = 1;
	270	}
	271
	272	/* Command/data input. */
	273	static void ssd0323_cd(void *opaque, int n, int level)
	274	{
	275	ssd0323_state s = (ssd0323_state )opaque;
	276	DPRINTF("%s mode\n", level ? "Data" : "Command");
	277	s->mode = level ? SSD0323_DATA : SSD0323_CMD;
	278	}
	279
23e39294 PB	280	static void ssd0323_save(QEMUFile f, void opaque)
23e39294 PB	281	{
66530953	282	SSISlave *ss = SSI_SLAVE(opaque);
23e39294 PB	283	ssd0323_state s = (ssd0323_state )opaque;
	284	int i;
	285
	286	qemu_put_be32(f, s->cmd_len);
	287	qemu_put_be32(f, s->cmd);
	288	for (i = 0; i < 8; i++)
	289	qemu_put_be32(f, s->cmd_data[i]);
	290	qemu_put_be32(f, s->row);
	291	qemu_put_be32(f, s->row_start);
	292	qemu_put_be32(f, s->row_end);
	293	qemu_put_be32(f, s->col);
	294	qemu_put_be32(f, s->col_start);
	295	qemu_put_be32(f, s->col_end);
	296	qemu_put_be32(f, s->redraw);
	297	qemu_put_be32(f, s->remap);
	298	qemu_put_be32(f, s->mode);
	299	qemu_put_buffer(f, s->framebuffer, sizeof(s->framebuffer));
66530953 PC	300
66530953 PC	301	qemu_put_be32(f, ss->cs);
23e39294 PB	302	}
	303
	304	static int ssd0323_load(QEMUFile f, void opaque, int version_id)
	305	{
66530953	306	SSISlave *ss = SSI_SLAVE(opaque);
23e39294 PB	307	ssd0323_state s = (ssd0323_state )opaque;
	308	int i;
	309
	310	if (version_id != 1)
	311	return -EINVAL;
	312
	313	s->cmd_len = qemu_get_be32(f);
	314	s->cmd = qemu_get_be32(f);
	315	for (i = 0; i < 8; i++)
	316	s->cmd_data[i] = qemu_get_be32(f);
	317	s->row = qemu_get_be32(f);
	318	s->row_start = qemu_get_be32(f);
	319	s->row_end = qemu_get_be32(f);
	320	s->col = qemu_get_be32(f);
	321	s->col_start = qemu_get_be32(f);
	322	s->col_end = qemu_get_be32(f);
	323	s->redraw = qemu_get_be32(f);
	324	s->remap = qemu_get_be32(f);
	325	s->mode = qemu_get_be32(f);
	326	qemu_get_buffer(f, s->framebuffer, sizeof(s->framebuffer));
	327
66530953 PC	328	ss->cs = qemu_get_be32(f);
66530953 PC	329
23e39294 PB	330	return 0;
	331	}
	332
81a322d4	333	static int ssd0323_init(SSISlave *dev)
9ee6e8bb	334	{
5493e33f	335	ssd0323_state *s = FROM_SSI_SLAVE(ssd0323_state, dev);
9ee6e8bb	336
9ee6e8bb PB	337	s->col_end = 63;
9ee6e8bb PB	338	s->row_end = 79;
3023f332 AL	339	s->ds = graphic_console_init(ssd0323_update_display,
	340	ssd0323_invalidate_display,
	341	NULL, NULL, s);
	342	qemu_console_resize(s->ds, 128 * MAGNIFY, 64 * MAGNIFY);
9ee6e8bb	343
5493e33f	344	qdev_init_gpio_in(&dev->qdev, ssd0323_cd, 1);
9ee6e8bb	345
0be71e32 AW	346	register_savevm(&dev->qdev, "ssd0323_oled", -1, 1,
0be71e32 AW	347	ssd0323_save, ssd0323_load, s);
81a322d4	348	return 0;
5493e33f	349	}
23e39294	350
cd6c4cf2 AL	351	static void ssd0323_class_init(ObjectClass klass, void data)
	352	{
	353	SSISlaveClass *k = SSI_SLAVE_CLASS(klass);
	354
	355	k->init = ssd0323_init;
	356	k->transfer = ssd0323_transfer;
8120e714	357	k->cs_polarity = SSI_CS_HIGH;
cd6c4cf2 AL	358	}
cd6c4cf2 AL	359
39bffca2 AL	360	static TypeInfo ssd0323_info = {
	361	.name = "ssd0323",
	362	.parent = TYPE_SSI_SLAVE,
	363	.instance_size = sizeof(ssd0323_state),
	364	.class_init = ssd0323_class_init,
5493e33f PB	365	};
5493e33f PB	366
83f7d43a	367	static void ssd03232_register_types(void)
5493e33f	368	{
39bffca2	369	type_register_static(&ssd0323_info);
9ee6e8bb	370	}
5493e33f	371
83f7d43a	372	type_init(ssd03232_register_types)