[qemu.git] / hw / ssd0323.c

/*
 * SSD0323 OLED controller with OSRAM Pictiva 128x64 display.
 *
 * Copyright (c) 2006-2007 CodeSourcery.
 * Written by Paul Brook
 *
 * This code is licenced under the GPL.
 */

/* The controller can support a variety of different displays, but we only
   implement one.  Most of the commends relating to brightness and geometry
   setup are ignored. */
#include "hw.h"
#include "devices.h"
#include "console.h"

//#define DEBUG_SSD0323 1

#ifdef DEBUG_SSD0323
#define DPRINTF(fmt, args...) \
do { printf("ssd0323: " fmt , ##args); } while (0)
#define BADF(fmt, args...) \
do { fprintf(stderr, "ssd0323: error: " fmt , ##args); exit(1);} while (0)
#else
#define DPRINTF(fmt, args...) do {} while(0)
#define BADF(fmt, args...) \
do { fprintf(stderr, "ssd0323: error: " fmt , ##args);} while (0)
#endif

/* Scaling factor for pixels.  */
#define MAGNIFY 4

#define REMAP_SWAP_COLUMN 0x01
#define REMAP_SWAP_NYBBLE 0x02
#define REMAP_VERTICAL    0x04
#define REMAP_SWAP_COM    0x10
#define REMAP_SPLIT_COM   0x40

enum ssd0323_mode
{
    SSD0323_CMD,
    SSD0323_DATA
};

typedef struct {
    DisplayState *ds;
    QEMUConsole *console;

    int cmd_len;
    int cmd;
    int cmd_data[8];
    int row;
    int row_start;
    int row_end;
    int col;
    int col_start;
    int col_end;
    int redraw;
    int remap;
    enum ssd0323_mode mode;
    uint8_t framebuffer[128 * 80 / 2];
} ssd0323_state;

int ssd0323_xfer_ssi(void *opaque, int data)
{
    ssd0323_state *s = (ssd0323_state *)opaque;
    switch (s->mode) {
    case SSD0323_DATA:
        DPRINTF("data 0x%02x\n", data);
        s->framebuffer[s->col + s->row * 64] = data;
        if (s->remap & REMAP_VERTICAL) {
            s->row++;
            if (s->row > s->row_end) {
                s->row = s->row_start;
                s->col++;
            }
            if (s->col > s->col_end) {
                s->col = s->col_start;
            }
        } else {
            s->col++;
            if (s->col > s->col_end) {
                s->row++;
                s->col = s->col_start;
            }
            if (s->row > s->row_end) {
                s->row = s->row_start;
            }
        }
        s->redraw = 1;
        break;
    case SSD0323_CMD:
        DPRINTF("cmd 0x%02x\n", data);
        if (s->cmd_len == 0) {
            s->cmd = data;
        } else {
            s->cmd_data[s->cmd_len - 1] = data;
        }
        s->cmd_len++;
        switch (s->cmd) {
#define DATA(x) if (s->cmd_len <= (x)) return 0
        case 0x15: /* Set column.  */
            DATA(2);
            s->col = s->col_start = s->cmd_data[0] % 64;
            s->col_end = s->cmd_data[1] % 64;
            break;
        case 0x75: /* Set row.  */
            DATA(2);
            s->row = s->row_start = s->cmd_data[0] % 80;
            s->row_end = s->cmd_data[1] % 80;
            break;
        case 0x81: /* Set contrast */
            DATA(1);
            break;
        case 0x84: case 0x85: case 0x86: /* Max current.  */
            DATA(0);
            break;
        case 0xa0: /* Set remapping.  */
            /* FIXME: Implement this.  */
            DATA(1);
            s->remap = s->cmd_data[0];
            break;
        case 0xa1: /* Set display start line.  */
        case 0xa2: /* Set display offset.  */
            /* FIXME: Implement these.  */
            DATA(1);
            break;
        case 0xa4: /* Normal mode.  */
        case 0xa5: /* All on.  */
        case 0xa6: /* All off.  */
        case 0xa7: /* Inverse.  */
            /* FIXME: Implement these.  */
            DATA(0);
            break;
        case 0xa8: /* Set multiplex ratio.  */
        case 0xad: /* Set DC-DC converter.  */
            DATA(1);
            /* Ignored.  Don't care.  */
            break;
        case 0xae: /* Display off.  */
        case 0xaf: /* Display on.  */
            DATA(0);
            /* TODO: Implement power control.  */
            break;
        case 0xb1: /* Set phase length.  */
        case 0xb2: /* Set row period.  */
        case 0xb3: /* Set clock rate.  */
        case 0xbc: /* Set precharge.  */
        case 0xbe: /* Set VCOMH.  */
        case 0xbf: /* Set segment low.  */
            DATA(1);
            /* Ignored.  Don't care.  */
            break;
        case 0xb8: /* Set grey scale table.  */
            /* FIXME: Implement this.  */
            DATA(8);
            break;
        case 0xe3: /* NOP.  */
            DATA(0);
            break;
        case 0xff: /* Nasty hack because we don't handle chip selects
                      properly.  */
            break;
        default:
            BADF("Unknown command: 0x%x\n", data);
        }
        s->cmd_len = 0;
        return 0;
    }
    return 0;
}

static void ssd0323_update_display(void *opaque)
{
    ssd0323_state *s = (ssd0323_state *)opaque;
    uint8_t *dest;
    uint8_t *src;
    int x;
    int y;
    int i;
    int line;
    char *colors[16];
    char colortab[MAGNIFY * 64];
    char *p;
    int dest_width;

    if (s->redraw) {
        switch (s->ds->depth) {
        case 0:
            return;
        case 15:
            dest_width = 2;
            break;
        case 16:
            dest_width = 2;
            break;
        case 24:
            dest_width = 3;
            break;
        case 32:
            dest_width = 4;
            break;
        default:
            BADF("Bad color depth\n");
            return;
        }
        p = colortab;
        for (i = 0; i < 16; i++) {
            int n;
            colors[i] = p;
            switch (s->ds->depth) {
            case 15:
                n = i * 2 + (i >> 3);
                p[0] = n | (n << 5);
                p[1] = (n << 2) | (n >> 3);
                break;
            case 16:
                n = i * 2 + (i >> 3);
                p[0] = n | (n << 6) | ((n << 1) & 0x20);
                p[1] = (n << 3) | (n >> 2);
                break;
            case 24:
            case 32:
                n = (i << 4) | i;
                p[0] = p[1] = p[2] = n;
                break;
            default:
                BADF("Bad color depth\n");
                return;
            }
            p += dest_width;
        }
        /* TODO: Implement row/column remapping.  */
        dest = s->ds->data;
        for (y = 0; y < 64; y++) {
            line = y;
            src = s->framebuffer + 64 * line;
            for (x = 0; x < 64; x++) {
                int val;
                val = *src >> 4;
                for (i = 0; i < MAGNIFY; i++) {
                    memcpy(dest, colors[val], dest_width);
                    dest += dest_width;
                }
                val = *src & 0xf;
                for (i = 0; i < MAGNIFY; i++) {
                    memcpy(dest, colors[val], dest_width);
                    dest += dest_width;
                }
                src++;
            }
            for (i = 1; i < MAGNIFY; i++) {
                memcpy(dest, dest - dest_width * MAGNIFY * 128,
                       dest_width * 128 * MAGNIFY);
                dest += dest_width * 128 * MAGNIFY;
            }
        }
    }
    dpy_update(s->ds, 0, 0, 128 * MAGNIFY, 64 * MAGNIFY);
}

static void ssd0323_invalidate_display(void * opaque)
{
    ssd0323_state *s = (ssd0323_state *)opaque;
    s->redraw = 1;
}

/* Command/data input.  */
static void ssd0323_cd(void *opaque, int n, int level)
{
    ssd0323_state *s = (ssd0323_state *)opaque;
    DPRINTF("%s mode\n", level ? "Data" : "Command");
    s->mode = level ? SSD0323_DATA : SSD0323_CMD;
}

void *ssd0323_init(DisplayState *ds, qemu_irq *cmd_p)
{
    ssd0323_state *s;
    qemu_irq *cmd;

    s = (ssd0323_state *)qemu_mallocz(sizeof(ssd0323_state));
    s->col_end = 63;
    s->row_end = 79;
    s->ds = ds;
    s->console = graphic_console_init(ds, ssd0323_update_display,
                                      ssd0323_invalidate_display,
                                      NULL, NULL, s);
    qemu_console_resize(s->console, 128 * MAGNIFY, 64 * MAGNIFY);

    cmd = qemu_allocate_irqs(ssd0323_cd, s, 1);
    *cmd_p = *cmd;

    return s;
}
Commit	Line	Data
9ee6e8bb PB	1	/*
	2	* SSD0323 OLED controller with OSRAM Pictiva 128x64 display.
	3	*
	4	* Copyright (c) 2006-2007 CodeSourcery.
	5	* Written by Paul Brook
	6	*
	7	* This code is licenced under the GPL.
	8	*/
	9
	10	/* The controller can support a variety of different displays, but we only
	11	implement one. Most of the commends relating to brightness and geometry
	12	setup are ignored. */
87ecb68b PB	13	#include "hw.h"
	14	#include "devices.h"
	15	#include "console.h"
9ee6e8bb PB	16
	17	//#define DEBUG_SSD0323 1
	18
	19	#ifdef DEBUG_SSD0323
	20	#define DPRINTF(fmt, args...) \
	21	do { printf("ssd0323: " fmt , ##args); } while (0)
	22	#define BADF(fmt, args...) \
	23	do { fprintf(stderr, "ssd0323: error: " fmt , ##args); exit(1);} while (0)
	24	#else
	25	#define DPRINTF(fmt, args...) do {} while(0)
	26	#define BADF(fmt, args...) \
	27	do { fprintf(stderr, "ssd0323: error: " fmt , ##args);} while (0)
	28	#endif
	29
	30	/* Scaling factor for pixels. */
	31	#define MAGNIFY 4
	32
7ac56ff0 PB	33	#define REMAP_SWAP_COLUMN 0x01
	34	#define REMAP_SWAP_NYBBLE 0x02
	35	#define REMAP_VERTICAL 0x04
	36	#define REMAP_SWAP_COM 0x10
	37	#define REMAP_SPLIT_COM 0x40
	38
9ee6e8bb PB	39	enum ssd0323_mode
	40	{
	41	SSD0323_CMD,
	42	SSD0323_DATA
	43	};
	44
	45	typedef struct {
	46	DisplayState *ds;
c60e08d9	47	QEMUConsole *console;
9ee6e8bb PB	48
	49	int cmd_len;
	50	int cmd;
	51	int cmd_data[8];
	52	int row;
	53	int row_start;
	54	int row_end;
	55	int col;
	56	int col_start;
	57	int col_end;
	58	int redraw;
7ac56ff0	59	int remap;
9ee6e8bb PB	60	enum ssd0323_mode mode;
	61	uint8_t framebuffer[128 * 80 / 2];
	62	} ssd0323_state;
	63
	64	int ssd0323_xfer_ssi(void *opaque, int data)
	65	{
	66	ssd0323_state s = (ssd0323_state )opaque;
	67	switch (s->mode) {
	68	case SSD0323_DATA:
	69	DPRINTF("data 0x%02x\n", data);
	70	s->framebuffer[s->col + s->row * 64] = data;
7ac56ff0	71	if (s->remap & REMAP_VERTICAL) {
9ee6e8bb	72	s->row++;
7ac56ff0 PB	73	if (s->row > s->row_end) {
	74	s->row = s->row_start;
	75	s->col++;
	76	}
	77	if (s->col > s->col_end) {
	78	s->col = s->col_start;
	79	}
	80	} else {
	81	s->col++;
	82	if (s->col > s->col_end) {
	83	s->row++;
	84	s->col = s->col_start;
	85	}
	86	if (s->row > s->row_end) {
	87	s->row = s->row_start;
	88	}
9ee6e8bb PB	89	}
	90	s->redraw = 1;
	91	break;
	92	case SSD0323_CMD:
	93	DPRINTF("cmd 0x%02x\n", data);
	94	if (s->cmd_len == 0) {
	95	s->cmd = data;
	96	} else {
	97	s->cmd_data[s->cmd_len - 1] = data;
	98	}
	99	s->cmd_len++;
	100	switch (s->cmd) {
	101	#define DATA(x) if (s->cmd_len <= (x)) return 0
	102	case 0x15: /* Set column. */
	103	DATA(2);
7ac56ff0	104	s->col = s->col_start = s->cmd_data[0] % 64;
9ee6e8bb PB	105	s->col_end = s->cmd_data[1] % 64;
	106	break;
	107	case 0x75: /* Set row. */
	108	DATA(2);
7ac56ff0	109	s->row = s->row_start = s->cmd_data[0] % 80;
9ee6e8bb PB	110	s->row_end = s->cmd_data[1] % 80;
	111	break;
	112	case 0x81: /* Set contrast */
	113	DATA(1);
	114	break;
	115	case 0x84: case 0x85: case 0x86: /* Max current. */
	116	DATA(0);
	117	break;
	118	case 0xa0: /* Set remapping. */
	119	/* FIXME: Implement this. */
	120	DATA(1);
7ac56ff0	121	s->remap = s->cmd_data[0];
9ee6e8bb PB	122	break;
	123	case 0xa1: /* Set display start line. */
	124	case 0xa2: /* Set display offset. */
	125	/* FIXME: Implement these. */
	126	DATA(1);
	127	break;
	128	case 0xa4: /* Normal mode. */
	129	case 0xa5: /* All on. */
	130	case 0xa6: /* All off. */
	131	case 0xa7: /* Inverse. */
	132	/* FIXME: Implement these. */
	133	DATA(0);
	134	break;
	135	case 0xa8: /* Set multiplex ratio. */
	136	case 0xad: /* Set DC-DC converter. */
	137	DATA(1);
	138	/* Ignored. Don't care. */
	139	break;
	140	case 0xae: /* Display off. */
	141	case 0xaf: /* Display on. */
	142	DATA(0);
	143	/* TODO: Implement power control. */
	144	break;
	145	case 0xb1: /* Set phase length. */
	146	case 0xb2: /* Set row period. */
	147	case 0xb3: /* Set clock rate. */
	148	case 0xbc: /* Set precharge. */
	149	case 0xbe: /* Set VCOMH. */
	150	case 0xbf: /* Set segment low. */
	151	DATA(1);
	152	/* Ignored. Don't care. */
	153	break;
	154	case 0xb8: /* Set grey scale table. */
	155	/* FIXME: Implement this. */
	156	DATA(8);
	157	break;
	158	case 0xe3: /* NOP. */
	159	DATA(0);
	160	break;
775616c3 PB	161	case 0xff: /* Nasty hack because we don't handle chip selects
	162	properly. */
	163	break;
9ee6e8bb PB	164	default:
	165	BADF("Unknown command: 0x%x\n", data);
	166	}
	167	s->cmd_len = 0;
	168	return 0;
	169	}
	170	return 0;
	171	}
	172
	173	static void ssd0323_update_display(void *opaque)
	174	{
	175	ssd0323_state s = (ssd0323_state )opaque;
	176	uint8_t *dest;
	177	uint8_t *src;
	178	int x;
	179	int y;
	180	int i;
	181	int line;
	182	char *colors[16];
	183	char colortab[MAGNIFY * 64];
	184	char *p;
	185	int dest_width;
	186
	187	if (s->redraw) {
	188	switch (s->ds->depth) {
	189	case 0:
	190	return;
	191	case 15:
	192	dest_width = 2;
	193	break;
	194	case 16:
	195	dest_width = 2;
	196	break;
	197	case 24:
	198	dest_width = 3;
	199	break;
	200	case 32:
	201	dest_width = 4;
	202	break;
	203	default:
	204	BADF("Bad color depth\n");
	205	return;
	206	}
	207	p = colortab;
	208	for (i = 0; i < 16; i++) {
	209	int n;
	210	colors[i] = p;
	211	switch (s->ds->depth) {
	212	case 15:
	213	n = i * 2 + (i >> 3);
	214	p[0] = n \| (n << 5);
	215	p[1] = (n << 2) \| (n >> 3);
	216	break;
	217	case 16:
	218	n = i * 2 + (i >> 3);
	219	p[0] = n \| (n << 6) \| ((n << 1) & 0x20);
	220	p[1] = (n << 3) \| (n >> 2);
	221	break;
	222	case 24:
	223	case 32:
	224	n = (i << 4) \| i;
	225	p[0] = p[1] = p[2] = n;
	226	break;
	227	default:
228	BADF("Bad color depth\n");
229	return;
230	}
231	p += dest_width;
232	}
7ac56ff0	233	/* TODO: Implement row/column remapping. */
9ee6e8bb PB	234	dest = s->ds->data;
	235	for (y = 0; y < 64; y++) {
	236	line = y;
	237	src = s->framebuffer + 64 * line;
	238	for (x = 0; x < 64; x++) {
	239	int val;
	240	val = *src >> 4;
	241	for (i = 0; i < MAGNIFY; i++) {
	242	memcpy(dest, colors[val], dest_width);
	243	dest += dest_width;
	244	}
	245	val = *src & 0xf;
	246	for (i = 0; i < MAGNIFY; i++) {
	247	memcpy(dest, colors[val], dest_width);
	248	dest += dest_width;
	249	}
	250	src++;
	251	}
	252	for (i = 1; i < MAGNIFY; i++) {
	253	memcpy(dest, dest - dest_width * MAGNIFY * 128,
	254	dest_width * 128 * MAGNIFY);
	255	dest += dest_width * 128 * MAGNIFY;
	256	}
	257	}
	258	}
	259	dpy_update(s->ds, 0, 0, 128 * MAGNIFY, 64 * MAGNIFY);
	260	}
	261
	262	static void ssd0323_invalidate_display(void * opaque)
	263	{
	264	ssd0323_state s = (ssd0323_state )opaque;
	265	s->redraw = 1;
	266	}
	267
	268	/* Command/data input. */
	269	static void ssd0323_cd(void *opaque, int n, int level)
	270	{
	271	ssd0323_state s = (ssd0323_state )opaque;
	272	DPRINTF("%s mode\n", level ? "Data" : "Command");
	273	s->mode = level ? SSD0323_DATA : SSD0323_CMD;
	274	}
	275
	276	void ssd0323_init(DisplayState ds, qemu_irq *cmd_p)
	277	{
	278	ssd0323_state *s;
	279	qemu_irq *cmd;
	280
	281	s = (ssd0323_state *)qemu_mallocz(sizeof(ssd0323_state));
9ee6e8bb PB	282	s->col_end = 63;
9ee6e8bb PB	283	s->row_end = 79;
c60e08d9 PB	284	s->ds = ds;
	285	s->console = graphic_console_init(ds, ssd0323_update_display,
	286	ssd0323_invalidate_display,
	287	NULL, NULL, s);
	288	qemu_console_resize(s->console, 128 * MAGNIFY, 64 * MAGNIFY);
9ee6e8bb PB	289
	290	cmd = qemu_allocate_irqs(ssd0323_cd, s, 1);
	291	cmd_p = cmd;
	292
	293	return s;
	294	}