[qemu.git] / hw / syborg_timer.c

/*
 * Syborg Interval Timer.
 *
 * Copyright (c) 2008 CodeSourcery
 *
 * Permission is hereby granted, free of charge, to any person obtaining a copy
 * of this software and associated documentation files (the "Software"), to deal
 * in the Software without restriction, including without limitation the rights
 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
 * copies of the Software, and to permit persons to whom the Software is
 * furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
 * THE SOFTWARE.
 */

#include "sysbus.h"
#include "qemu-timer.h"
#include "syborg.h"

//#define DEBUG_SYBORG_TIMER

#ifdef DEBUG_SYBORG_TIMER
#define DPRINTF(fmt, ...) \
do { printf("syborg_timer: " fmt , ##args); } while (0)
#define BADF(fmt, ...) \
do { fprintf(stderr, "syborg_timer: error: " fmt , ## __VA_ARGS__); \
    exit(1);} while (0)
#else
#define DPRINTF(fmt, ...) do {} while(0)
#define BADF(fmt, ...) \
do { fprintf(stderr, "syborg_timer: error: " fmt , ## __VA_ARGS__);} while (0)
#endif

enum {
    TIMER_ID          = 0,
    TIMER_RUNNING     = 1,
    TIMER_ONESHOT     = 2,
    TIMER_LIMIT       = 3,
    TIMER_VALUE       = 4,
    TIMER_INT_ENABLE  = 5,
    TIMER_INT_STATUS  = 6,
    TIMER_FREQ        = 7
};

typedef struct {
    SysBusDevice busdev;
    ptimer_state *timer;
    int running;
    int oneshot;
    uint32_t limit;
    uint32_t freq;
    uint32_t int_level;
    uint32_t int_enabled;
    qemu_irq irq;
} SyborgTimerState;

static void syborg_timer_update(SyborgTimerState *s)
{
    /* Update interrupt.  */
    if (s->int_level && s->int_enabled) {
        qemu_irq_raise(s->irq);
    } else {
        qemu_irq_lower(s->irq);
    }
}

static void syborg_timer_tick(void *opaque)
{
    SyborgTimerState *s = (SyborgTimerState *)opaque;
    //DPRINTF("Timer Tick\n");
    s->int_level = 1;
    if (s->oneshot)
        s->running = 0;
    syborg_timer_update(s);
}

static uint32_t syborg_timer_read(void *opaque, target_phys_addr_t offset)
{
    SyborgTimerState *s = (SyborgTimerState *)opaque;

    DPRINTF("Reg read %d\n", (int)offset);
    offset &= 0xfff;
    switch (offset >> 2) {
    case TIMER_ID:
        return SYBORG_ID_TIMER;
    case TIMER_RUNNING:
        return s->running;
    case TIMER_ONESHOT:
        return s->oneshot;
    case TIMER_LIMIT:
        return s->limit;
    case TIMER_VALUE:
        return ptimer_get_count(s->timer);
    case TIMER_INT_ENABLE:
        return s->int_enabled;
    case TIMER_INT_STATUS:
        return s->int_level;
    case TIMER_FREQ:
        return s->freq;
    default:
        cpu_abort(cpu_single_env, "syborg_timer_read: Bad offset %x\n",
                  (int)offset);
        return 0;
    }
}

static void syborg_timer_write(void *opaque, target_phys_addr_t offset,
                               uint32_t value)
{
    SyborgTimerState *s = (SyborgTimerState *)opaque;

    DPRINTF("Reg write %d\n", (int)offset);
    offset &= 0xfff;
    switch (offset >> 2) {
    case TIMER_RUNNING:
        if (value == s->running)
            break;
        s->running = value;
        if (value) {
            ptimer_run(s->timer, s->oneshot);
        } else {
            ptimer_stop(s->timer);
        }
        break;
    case TIMER_ONESHOT:
        if (s->running) {
            ptimer_stop(s->timer);
        }
        s->oneshot = value;
        if (s->running) {
            ptimer_run(s->timer, s->oneshot);
        }
        break;
    case TIMER_LIMIT:
        s->limit = value;
        ptimer_set_limit(s->timer, value, 1);
        break;
    case TIMER_VALUE:
        ptimer_set_count(s->timer, value);
        break;
    case TIMER_INT_ENABLE:
        s->int_enabled = value;
        syborg_timer_update(s);
        break;
    case TIMER_INT_STATUS:
        s->int_level &= ~value;
        syborg_timer_update(s);
        break;
    default:
        cpu_abort(cpu_single_env, "syborg_timer_write: Bad offset %x\n",
                  (int)offset);
        break;
    }
}

static CPUReadMemoryFunc *syborg_timer_readfn[] = {
    syborg_timer_read,
    syborg_timer_read,
    syborg_timer_read
};

static CPUWriteMemoryFunc *syborg_timer_writefn[] = {
    syborg_timer_write,
    syborg_timer_write,
    syborg_timer_write
};

static void syborg_timer_save(QEMUFile *f, void *opaque)
{
    SyborgTimerState *s = opaque;

    qemu_put_be32(f, s->running);
    qemu_put_be32(f, s->oneshot);
    qemu_put_be32(f, s->limit);
    qemu_put_be32(f, s->int_level);
    qemu_put_be32(f, s->int_enabled);
    qemu_put_ptimer(f, s->timer);
}

static int syborg_timer_load(QEMUFile *f, void *opaque, int version_id)
{
    SyborgTimerState *s = opaque;

    if (version_id != 1)
        return -EINVAL;

    s->running = qemu_get_be32(f);
    s->oneshot = qemu_get_be32(f);
    s->limit = qemu_get_be32(f);
    s->int_level = qemu_get_be32(f);
    s->int_enabled = qemu_get_be32(f);
    qemu_get_ptimer(f, s->timer);

    return 0;
}

static void syborg_timer_init(SysBusDevice *dev)
{
    SyborgTimerState *s = FROM_SYSBUS(SyborgTimerState, dev);
    QEMUBH *bh;
    int iomemtype;

    s->freq = qdev_get_prop_int(&dev->qdev, "frequency", 0);
    if (s->freq == 0) {
        fprintf(stderr, "syborg_timer: Zero/unset frequency\n");
        exit(1);
    }
    sysbus_init_irq(dev, &s->irq);
    iomemtype = cpu_register_io_memory(0, syborg_timer_readfn,
                                       syborg_timer_writefn, s);
    sysbus_init_mmio(dev, 0x1000, iomemtype);

    bh = qemu_bh_new(syborg_timer_tick, s);
    s->timer = ptimer_init(bh);
    ptimer_set_freq(s->timer, s->freq);
    register_savevm("syborg_timer", -1, 1,
                    syborg_timer_save, syborg_timer_load, s);
}

static SysBusDeviceInfo syborg_timer_info = {
    .init = syborg_timer_init,
    .qdev = {
        .props = (DevicePropList[]) {
              {.name = "frequency", .type = PROP_TYPE_INT},
              {.name = NULL}
        }
    }
};

static void syborg_timer_register_devices(void)
{
    sysbus_register_withprop("syborg,timer", sizeof(SyborgTimerState),
                            &syborg_timer_info);
}

device_init(syborg_timer_register_devices)
Commit	Line	Data
4af39611 PB	1	/*
	2	* Syborg Interval Timer.
	3	*
	4	* Copyright (c) 2008 CodeSourcery
	5	*
	6	* Permission is hereby granted, free of charge, to any person obtaining a copy
	7	* of this software and associated documentation files (the "Software"), to deal
	8	* in the Software without restriction, including without limitation the rights
	9	* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
	10	* copies of the Software, and to permit persons to whom the Software is
	11	* furnished to do so, subject to the following conditions:
	12	*
	13	* The above copyright notice and this permission notice shall be included in
	14	* all copies or substantial portions of the Software.
	15	*
	16	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	17	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	18	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	19	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
	20	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
	21	* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
	22	* THE SOFTWARE.
	23	*/
	24
	25	#include "sysbus.h"
	26	#include "qemu-timer.h"
	27	#include "syborg.h"
	28
	29	//#define DEBUG_SYBORG_TIMER
	30
	31	#ifdef DEBUG_SYBORG_TIMER
	32	#define DPRINTF(fmt, ...) \
	33	do { printf("syborg_timer: " fmt , ##args); } while (0)
	34	#define BADF(fmt, ...) \
	35	do { fprintf(stderr, "syborg_timer: error: " fmt , ## __VA_ARGS__); \
	36	exit(1);} while (0)
	37	#else
	38	#define DPRINTF(fmt, ...) do {} while(0)
	39	#define BADF(fmt, ...) \
	40	do { fprintf(stderr, "syborg_timer: error: " fmt , ## __VA_ARGS__);} while (0)
	41	#endif
	42
	43	enum {
	44	TIMER_ID = 0,
	45	TIMER_RUNNING = 1,
	46	TIMER_ONESHOT = 2,
	47	TIMER_LIMIT = 3,
	48	TIMER_VALUE = 4,
	49	TIMER_INT_ENABLE = 5,
	50	TIMER_INT_STATUS = 6,
	51	TIMER_FREQ = 7
	52	};
	53
	54	typedef struct {
	55	SysBusDevice busdev;
	56	ptimer_state *timer;
	57	int running;
	58	int oneshot;
	59	uint32_t limit;
	60	uint32_t freq;
	61	uint32_t int_level;
	62	uint32_t int_enabled;
	63	qemu_irq irq;
	64	} SyborgTimerState;
65
66	static void syborg_timer_update(SyborgTimerState *s)
67	{
68	/* Update interrupt. */
69	if (s->int_level && s->int_enabled) {
70	qemu_irq_raise(s->irq);
71	} else {
72	qemu_irq_lower(s->irq);
73	}
74	}
75
76	static void syborg_timer_tick(void *opaque)
77	{
78	SyborgTimerState s = (SyborgTimerState )opaque;
79	//DPRINTF("Timer Tick\n");
80	s->int_level = 1;
81	if (s->oneshot)
82	s->running = 0;
83	syborg_timer_update(s);
84	}
85
86	static uint32_t syborg_timer_read(void *opaque, target_phys_addr_t offset)
87	{
88	SyborgTimerState s = (SyborgTimerState )opaque;
89
90	DPRINTF("Reg read %d\n", (int)offset);
91	offset &= 0xfff;
92	switch (offset >> 2) {
93	case TIMER_ID:
94	return SYBORG_ID_TIMER;
95	case TIMER_RUNNING:
96	return s->running;
97	case TIMER_ONESHOT:
98	return s->oneshot;
99	case TIMER_LIMIT:
100	return s->limit;
101	case TIMER_VALUE:
102	return ptimer_get_count(s->timer);
103	case TIMER_INT_ENABLE:
104	return s->int_enabled;
105	case TIMER_INT_STATUS:
106	return s->int_level;
107	case TIMER_FREQ:
108	return s->freq;
109	default:
110	cpu_abort(cpu_single_env, "syborg_timer_read: Bad offset %x\n",
111	(int)offset);
112	return 0;
113	}
114	}
115
116	static void syborg_timer_write(void *opaque, target_phys_addr_t offset,
117	uint32_t value)
118	{
119	SyborgTimerState s = (SyborgTimerState )opaque;
120
121	DPRINTF("Reg write %d\n", (int)offset);
122	offset &= 0xfff;
123	switch (offset >> 2) {
124	case TIMER_RUNNING:
125	if (value == s->running)
126	break;
127	s->running = value;
128	if (value) {
129	ptimer_run(s->timer, s->oneshot);
130	} else {
131	ptimer_stop(s->timer);
132	}
133	break;
134	case TIMER_ONESHOT:
135	if (s->running) {
136	ptimer_stop(s->timer);
137	}
138	s->oneshot = value;
139	if (s->running) {
140	ptimer_run(s->timer, s->oneshot);
141	}
142	break;
143	case TIMER_LIMIT:
144	s->limit = value;
145	ptimer_set_limit(s->timer, value, 1);
146	break;
147	case TIMER_VALUE:
148	ptimer_set_count(s->timer, value);
149	break;
150	case TIMER_INT_ENABLE:
151	s->int_enabled = value;
152	syborg_timer_update(s);
153	break;
154	case TIMER_INT_STATUS:
155	s->int_level &= ~value;
156	syborg_timer_update(s);
157	break;
158	default:
159	cpu_abort(cpu_single_env, "syborg_timer_write: Bad offset %x\n",
160	(int)offset);
161	break;
162	}
163	}
164
165	static CPUReadMemoryFunc *syborg_timer_readfn[] = {
166	syborg_timer_read,
167	syborg_timer_read,
168	syborg_timer_read
169	};
170
171	static CPUWriteMemoryFunc *syborg_timer_writefn[] = {
172	syborg_timer_write,
173	syborg_timer_write,
174	syborg_timer_write
175	};
176
177	static void syborg_timer_save(QEMUFile f, void opaque)
178	{
179	SyborgTimerState *s = opaque;
180
181	qemu_put_be32(f, s->running);
182	qemu_put_be32(f, s->oneshot);
183	qemu_put_be32(f, s->limit);
184	qemu_put_be32(f, s->int_level);
185	qemu_put_be32(f, s->int_enabled);
186	qemu_put_ptimer(f, s->timer);
187	}
188
189	static int syborg_timer_load(QEMUFile f, void opaque, int version_id)
190	{
191	SyborgTimerState *s = opaque;
192
193	if (version_id != 1)
194	return -EINVAL;
195
196	s->running = qemu_get_be32(f);
197	s->oneshot = qemu_get_be32(f);
198	s->limit = qemu_get_be32(f);
199	s->int_level = qemu_get_be32(f);
200	s->int_enabled = qemu_get_be32(f);
201	qemu_get_ptimer(f, s->timer);
202
203	return 0;
204	}
205
206	static void syborg_timer_init(SysBusDevice *dev)
207	{
208	SyborgTimerState *s = FROM_SYSBUS(SyborgTimerState, dev);
209	QEMUBH *bh;
210	int iomemtype;
211
212	s->freq = qdev_get_prop_int(&dev->qdev, "frequency", 0);
213	if (s->freq == 0) {
214	fprintf(stderr, "syborg_timer: Zero/unset frequency\n");
215	exit(1);
216	}
217	sysbus_init_irq(dev, &s->irq);
218	iomemtype = cpu_register_io_memory(0, syborg_timer_readfn,
219	syborg_timer_writefn, s);
220	sysbus_init_mmio(dev, 0x1000, iomemtype);
221
222	bh = qemu_bh_new(syborg_timer_tick, s);
223	s->timer = ptimer_init(bh);
224	ptimer_set_freq(s->timer, s->freq);
225	register_savevm("syborg_timer", -1, 1,
226	syborg_timer_save, syborg_timer_load, s);
227	}
228
1431b6a1 PB	229	static SysBusDeviceInfo syborg_timer_info = {
	230	.init = syborg_timer_init,
	231	.qdev = {
	232	.props = (DevicePropList[]) {
	233	{.name = "frequency", .type = PROP_TYPE_INT},
	234	{.name = NULL}
	235	}
	236	}
	237	};
	238
4af39611 PB	239	static void syborg_timer_register_devices(void)
4af39611 PB	240	{
1431b6a1 PB	241	sysbus_register_withprop("syborg,timer", sizeof(SyborgTimerState),
1431b6a1 PB	242	&syborg_timer_info);
4af39611 PB	243	}
	244
	245	device_init(syborg_timer_register_devices)