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3efda49d 1/*
7fc42b4b 2 * TI TSC2102 (touchscreen/sensors/audio controller) emulator.
a5d7eb65 3 * TI TSC2301 (touchscreen/sensors/keypad).
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4 *
5 * Copyright (c) 2006 Andrzej Zaborowski <balrog@zabor.org>
a5d7eb65 6 * Copyright (C) 2008 Nokia Corporation
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7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
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10 * published by the Free Software Foundation; either version 2 or
11 * (at your option) version 3 of the License.
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12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
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18 * You should have received a copy of the GNU General Public License along
19 * with this program; if not, write to the Free Software Foundation, Inc.,
20 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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21 */
22
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23#include "hw.h"
24#include "audio/audio.h"
25#include "qemu-timer.h"
26#include "console.h"
bc24a225 27#include "omap.h" /* For I2SCodec and uWireSlave */
b1d8e52e 28#include "devices.h"
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29
30#define TSC_DATA_REGISTERS_PAGE 0x0
31#define TSC_CONTROL_REGISTERS_PAGE 0x1
32#define TSC_AUDIO_REGISTERS_PAGE 0x2
33
34#define TSC_VERBOSE
35
36#define TSC_CUT_RESOLUTION(value, p) ((value) >> (16 - resolution[p]))
37
bc24a225 38typedef struct {
3efda49d 39 qemu_irq pint;
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40 qemu_irq kbint;
41 qemu_irq davint;
3efda49d 42 QEMUTimer *timer;
d8f699cb 43 QEMUSoundCard card;
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44 uWireSlave chip;
45 I2SCodec codec;
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46 uint8_t in_fifo[16384];
47 uint8_t out_fifo[16384];
a5d7eb65 48 uint16_t model;
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49
50 int x, y;
51 int pressure;
52
53 int state, page, offset, irq;
54 uint16_t command, dav;
55
56 int busy;
57 int enabled;
58 int host_mode;
59 int function;
60 int nextfunction;
61 int precision;
62 int nextprecision;
63 int filter;
64 int pin_func;
65 int ref;
66 int timing;
67 int noise;
68
69 uint16_t audio_ctrl1;
70 uint16_t audio_ctrl2;
71 uint16_t audio_ctrl3;
a5d7eb65 72 uint16_t pll[3];
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73 uint16_t volume;
74 int64_t volume_change;
75 int softstep;
76 uint16_t dac_power;
77 int64_t powerdown;
78 uint16_t filter_data[0x14];
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79
80 const char *name;
81 SWVoiceIn *adc_voice[1];
82 SWVoiceOut *dac_voice[1];
83 int i2s_rx_rate;
84 int i2s_tx_rate;
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85
86 int tr[8];
87
88 struct {
89 uint16_t down;
90 uint16_t mask;
91 int scan;
92 int debounce;
93 int mode;
94 int intr;
95 } kb;
bc24a225 96} TSC210xState;
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97
98static const int resolution[4] = { 12, 8, 10, 12 };
99
100#define TSC_MODE_NO_SCAN 0x0
101#define TSC_MODE_XY_SCAN 0x1
102#define TSC_MODE_XYZ_SCAN 0x2
103#define TSC_MODE_X 0x3
104#define TSC_MODE_Y 0x4
105#define TSC_MODE_Z 0x5
106#define TSC_MODE_BAT1 0x6
107#define TSC_MODE_BAT2 0x7
108#define TSC_MODE_AUX 0x8
109#define TSC_MODE_AUX_SCAN 0x9
110#define TSC_MODE_TEMP1 0xa
111#define TSC_MODE_PORT_SCAN 0xb
112#define TSC_MODE_TEMP2 0xc
113#define TSC_MODE_XX_DRV 0xd
114#define TSC_MODE_YY_DRV 0xe
115#define TSC_MODE_YX_DRV 0xf
116
117static const uint16_t mode_regs[16] = {
118 0x0000, /* No scan */
119 0x0600, /* X, Y scan */
120 0x0780, /* X, Y, Z scan */
121 0x0400, /* X */
122 0x0200, /* Y */
123 0x0180, /* Z */
124 0x0040, /* BAT1 */
125 0x0030, /* BAT2 */
126 0x0010, /* AUX */
127 0x0010, /* AUX scan */
128 0x0004, /* TEMP1 */
129 0x0070, /* Port scan */
130 0x0002, /* TEMP2 */
131 0x0000, /* X+, X- drivers */
132 0x0000, /* Y+, Y- drivers */
133 0x0000, /* Y+, X- drivers */
134};
135
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136#define X_TRANSFORM(s) \
137 ((s->y * s->tr[0] - s->x * s->tr[1]) / s->tr[2] + s->tr[3])
138#define Y_TRANSFORM(s) \
139 ((s->y * s->tr[4] - s->x * s->tr[5]) / s->tr[6] + s->tr[7])
3efda49d 140#define Z1_TRANSFORM(s) \
8ef6367e 141 ((400 - ((s)->x >> 7) + ((s)->pressure << 10)) << 4)
3efda49d 142#define Z2_TRANSFORM(s) \
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143 ((4000 + ((s)->y >> 7) - ((s)->pressure << 10)) << 4)
144
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145#define BAT1_VAL 0x8660
146#define BAT2_VAL 0x0000
147#define AUX1_VAL 0x35c0
148#define AUX2_VAL 0xffff
149#define TEMP1_VAL 0x8c70
150#define TEMP2_VAL 0xa5b0
151
152#define TSC_POWEROFF_DELAY 50
153#define TSC_SOFTSTEP_DELAY 50
154
bc24a225 155static void tsc210x_reset(TSC210xState *s)
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156{
157 s->state = 0;
158 s->pin_func = 2;
159 s->enabled = 0;
160 s->busy = 0;
161 s->nextfunction = 0;
162 s->ref = 0;
163 s->timing = 0;
164 s->irq = 0;
165 s->dav = 0;
166
167 s->audio_ctrl1 = 0x0000;
168 s->audio_ctrl2 = 0x4410;
169 s->audio_ctrl3 = 0x0000;
170 s->pll[0] = 0x1004;
171 s->pll[1] = 0x0000;
a5d7eb65 172 s->pll[2] = 0x1fff;
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173 s->volume = 0xffff;
174 s->dac_power = 0x8540;
175 s->softstep = 1;
176 s->volume_change = 0;
177 s->powerdown = 0;
178 s->filter_data[0x00] = 0x6be3;
179 s->filter_data[0x01] = 0x9666;
180 s->filter_data[0x02] = 0x675d;
181 s->filter_data[0x03] = 0x6be3;
182 s->filter_data[0x04] = 0x9666;
183 s->filter_data[0x05] = 0x675d;
184 s->filter_data[0x06] = 0x7d83;
185 s->filter_data[0x07] = 0x84ee;
186 s->filter_data[0x08] = 0x7d83;
187 s->filter_data[0x09] = 0x84ee;
188 s->filter_data[0x0a] = 0x6be3;
189 s->filter_data[0x0b] = 0x9666;
190 s->filter_data[0x0c] = 0x675d;
191 s->filter_data[0x0d] = 0x6be3;
192 s->filter_data[0x0e] = 0x9666;
193 s->filter_data[0x0f] = 0x675d;
194 s->filter_data[0x10] = 0x7d83;
195 s->filter_data[0x11] = 0x84ee;
196 s->filter_data[0x12] = 0x7d83;
197 s->filter_data[0x13] = 0x84ee;
198
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199 s->i2s_tx_rate = 0;
200 s->i2s_rx_rate = 0;
201
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202 s->kb.scan = 1;
203 s->kb.debounce = 0;
204 s->kb.mask = 0x0000;
205 s->kb.mode = 3;
206 s->kb.intr = 0;
207
7fc42b4b 208 qemu_set_irq(s->pint, !s->irq);
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209 qemu_set_irq(s->davint, !s->dav);
210 qemu_irq_raise(s->kbint);
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211}
212
bc24a225 213typedef struct {
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214 int rate;
215 int dsor;
216 int fsref;
bc24a225 217} TSC210xRateInfo;
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218
219/* { rate, dsor, fsref } */
bc24a225 220static const TSC210xRateInfo tsc2101_rates[] = {
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221 /* Fsref / 6.0 */
222 { 7350, 7, 1 },
223 { 8000, 7, 0 },
224 /* Fsref / 5.5 */
225 { 8018, 6, 1 },
226 { 8727, 6, 0 },
227 /* Fsref / 5.0 */
228 { 8820, 5, 1 },
229 { 9600, 5, 0 },
230 /* Fsref / 4.0 */
231 { 11025, 4, 1 },
232 { 12000, 4, 0 },
233 /* Fsref / 3.0 */
234 { 14700, 3, 1 },
235 { 16000, 3, 0 },
236 /* Fsref / 2.0 */
237 { 22050, 2, 1 },
238 { 24000, 2, 0 },
239 /* Fsref / 1.5 */
240 { 29400, 1, 1 },
241 { 32000, 1, 0 },
242 /* Fsref */
243 { 44100, 0, 1 },
244 { 48000, 0, 0 },
245
246 { 0, 0, 0 },
247};
248
249/* { rate, dsor, fsref } */
bc24a225 250static const TSC210xRateInfo tsc2102_rates[] = {
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251 /* Fsref / 6.0 */
252 { 7350, 63, 1 },
253 { 8000, 63, 0 },
254 /* Fsref / 6.0 */
255 { 7350, 54, 1 },
256 { 8000, 54, 0 },
257 /* Fsref / 5.0 */
258 { 8820, 45, 1 },
259 { 9600, 45, 0 },
260 /* Fsref / 4.0 */
261 { 11025, 36, 1 },
262 { 12000, 36, 0 },
263 /* Fsref / 3.0 */
264 { 14700, 27, 1 },
265 { 16000, 27, 0 },
266 /* Fsref / 2.0 */
267 { 22050, 18, 1 },
268 { 24000, 18, 0 },
269 /* Fsref / 1.5 */
270 { 29400, 9, 1 },
271 { 32000, 9, 0 },
272 /* Fsref */
273 { 44100, 0, 1 },
274 { 48000, 0, 0 },
275
276 { 0, 0, 0 },
277};
278
bc24a225 279static inline void tsc210x_out_flush(TSC210xState *s, int len)
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280{
281 uint8_t *data = s->codec.out.fifo + s->codec.out.start;
282 uint8_t *end = data + len;
283
284 while (data < end)
285 data += AUD_write(s->dac_voice[0], data, end - data) ?: (end - data);
286
287 s->codec.out.len -= len;
288 if (s->codec.out.len)
289 memmove(s->codec.out.fifo, end, s->codec.out.len);
290 s->codec.out.start = 0;
291}
292
bc24a225 293static void tsc210x_audio_out_cb(TSC210xState *s, int free_b)
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294{
295 if (s->codec.out.len >= free_b) {
296 tsc210x_out_flush(s, free_b);
297 return;
298 }
299
300 s->codec.out.size = MIN(free_b, 16384);
301 qemu_irq_raise(s->codec.tx_start);
302}
303
bc24a225 304static void tsc2102_audio_rate_update(TSC210xState *s)
d8f699cb 305{
bc24a225 306 const TSC210xRateInfo *rate;
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307
308 s->codec.tx_rate = 0;
309 s->codec.rx_rate = 0;
310 if (s->dac_power & (1 << 15)) /* PWDNC */
311 return;
312
313 for (rate = tsc2102_rates; rate->rate; rate ++)
314 if (rate->dsor == (s->audio_ctrl1 & 0x3f) && /* DACFS */
315 rate->fsref == ((s->audio_ctrl3 >> 13) & 1))/* REFFS */
316 break;
317 if (!rate->rate) {
318 printf("%s: unknown sampling rate configured\n", __FUNCTION__);
319 return;
320 }
321
322 s->codec.tx_rate = rate->rate;
323}
324
bc24a225 325static void tsc2102_audio_output_update(TSC210xState *s)
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326{
327 int enable;
1ea879e5 328 struct audsettings fmt;
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329
330 if (s->dac_voice[0]) {
331 tsc210x_out_flush(s, s->codec.out.len);
332 s->codec.out.size = 0;
333 AUD_set_active_out(s->dac_voice[0], 0);
334 AUD_close_out(&s->card, s->dac_voice[0]);
335 s->dac_voice[0] = 0;
336 }
73560bc8 337 s->codec.cts = 0;
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338
339 enable =
340 (~s->dac_power & (1 << 15)) && /* PWDNC */
341 (~s->dac_power & (1 << 10)); /* DAPWDN */
73560bc8 342 if (!enable || !s->codec.tx_rate)
d8f699cb 343 return;
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344
345 /* Force our own sampling rate even in slave DAC mode */
346 fmt.endianness = 0;
347 fmt.nchannels = 2;
73560bc8 348 fmt.freq = s->codec.tx_rate;
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349 fmt.fmt = AUD_FMT_S16;
350
351 s->dac_voice[0] = AUD_open_out(&s->card, s->dac_voice[0],
352 "tsc2102.sink", s, (void *) tsc210x_audio_out_cb, &fmt);
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353 if (s->dac_voice[0]) {
354 s->codec.cts = 1;
d8f699cb 355 AUD_set_active_out(s->dac_voice[0], 1);
73560bc8 356 }
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357}
358
bc24a225 359static uint16_t tsc2102_data_register_read(TSC210xState *s, int reg)
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360{
361 switch (reg) {
362 case 0x00: /* X */
363 s->dav &= 0xfbff;
a5d7eb65 364 return TSC_CUT_RESOLUTION(X_TRANSFORM(s), s->precision) +
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365 (s->noise & 3);
366
367 case 0x01: /* Y */
368 s->noise ++;
369 s->dav &= 0xfdff;
a5d7eb65 370 return TSC_CUT_RESOLUTION(Y_TRANSFORM(s), s->precision) ^
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371 (s->noise & 3);
372
373 case 0x02: /* Z1 */
374 s->dav &= 0xfeff;
375 return TSC_CUT_RESOLUTION(Z1_TRANSFORM(s), s->precision) -
376 (s->noise & 3);
377
378 case 0x03: /* Z2 */
379 s->dav &= 0xff7f;
380 return TSC_CUT_RESOLUTION(Z2_TRANSFORM(s), s->precision) |
381 (s->noise & 3);
382
383 case 0x04: /* KPData */
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384 if ((s->model & 0xff00) == 0x2300) {
385 if (s->kb.intr && (s->kb.mode & 2)) {
386 s->kb.intr = 0;
387 qemu_irq_raise(s->kbint);
388 }
389 return s->kb.down;
390 }
391
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392 return 0xffff;
393
394 case 0x05: /* BAT1 */
395 s->dav &= 0xffbf;
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396 return TSC_CUT_RESOLUTION(BAT1_VAL, s->precision) +
397 (s->noise & 6);
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398
399 case 0x06: /* BAT2 */
400 s->dav &= 0xffdf;
401 return TSC_CUT_RESOLUTION(BAT2_VAL, s->precision);
402
403 case 0x07: /* AUX1 */
404 s->dav &= 0xffef;
405 return TSC_CUT_RESOLUTION(AUX1_VAL, s->precision);
406
407 case 0x08: /* AUX2 */
408 s->dav &= 0xfff7;
409 return 0xffff;
410
411 case 0x09: /* TEMP1 */
412 s->dav &= 0xfffb;
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413 return TSC_CUT_RESOLUTION(TEMP1_VAL, s->precision) -
414 (s->noise & 5);
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415
416 case 0x0a: /* TEMP2 */
417 s->dav &= 0xfffd;
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418 return TSC_CUT_RESOLUTION(TEMP2_VAL, s->precision) ^
419 (s->noise & 3);
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420
421 case 0x0b: /* DAC */
422 s->dav &= 0xfffe;
423 return 0xffff;
424
425 default:
426#ifdef TSC_VERBOSE
427 fprintf(stderr, "tsc2102_data_register_read: "
428 "no such register: 0x%02x\n", reg);
429#endif
430 return 0xffff;
431 }
432}
433
434static uint16_t tsc2102_control_register_read(
bc24a225 435 TSC210xState *s, int reg)
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436{
437 switch (reg) {
438 case 0x00: /* TSC ADC */
439 return (s->pressure << 15) | ((!s->busy) << 14) |
440 (s->nextfunction << 10) | (s->nextprecision << 8) | s->filter;
441
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442 case 0x01: /* Status / Keypad Control */
443 if ((s->model & 0xff00) == 0x2100)
444 return (s->pin_func << 14) | ((!s->enabled) << 13) |
445 (s->host_mode << 12) | ((!!s->dav) << 11) | s->dav;
446 else
447 return (s->kb.intr << 15) | ((s->kb.scan || !s->kb.down) << 14) |
448 (s->kb.debounce << 11);
449
450 case 0x02: /* DAC Control */
451 if ((s->model & 0xff00) == 0x2300)
452 return s->dac_power & 0x8000;
453 else
454 goto bad_reg;
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455
456 case 0x03: /* Reference */
457 return s->ref;
458
459 case 0x04: /* Reset */
460 return 0xffff;
461
462 case 0x05: /* Configuration */
463 return s->timing;
464
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465 case 0x06: /* Secondary configuration */
466 if ((s->model & 0xff00) == 0x2100)
467 goto bad_reg;
468 return ((!s->dav) << 15) | ((s->kb.mode & 1) << 14) | s->pll[2];
469
470 case 0x10: /* Keypad Mask */
471 if ((s->model & 0xff00) == 0x2100)
472 goto bad_reg;
473 return s->kb.mask;
474
3efda49d 475 default:
a5d7eb65 476 bad_reg:
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477#ifdef TSC_VERBOSE
478 fprintf(stderr, "tsc2102_control_register_read: "
479 "no such register: 0x%02x\n", reg);
480#endif
481 return 0xffff;
482 }
483}
484
bc24a225 485static uint16_t tsc2102_audio_register_read(TSC210xState *s, int reg)
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486{
487 int l_ch, r_ch;
488 uint16_t val;
489
490 switch (reg) {
491 case 0x00: /* Audio Control 1 */
492 return s->audio_ctrl1;
493
494 case 0x01:
495 return 0xff00;
496
497 case 0x02: /* DAC Volume Control */
498 return s->volume;
499
500 case 0x03:
501 return 0x8b00;
502
503 case 0x04: /* Audio Control 2 */
504 l_ch = 1;
505 r_ch = 1;
506 if (s->softstep && !(s->dac_power & (1 << 10))) {
507 l_ch = (qemu_get_clock(vm_clock) >
508 s->volume_change + TSC_SOFTSTEP_DELAY);
509 r_ch = (qemu_get_clock(vm_clock) >
510 s->volume_change + TSC_SOFTSTEP_DELAY);
511 }
512
513 return s->audio_ctrl2 | (l_ch << 3) | (r_ch << 2);
514
515 case 0x05: /* Stereo DAC Power Control */
516 return 0x2aa0 | s->dac_power |
517 (((s->dac_power & (1 << 10)) &&
518 (qemu_get_clock(vm_clock) >
519 s->powerdown + TSC_POWEROFF_DELAY)) << 6);
520
521 case 0x06: /* Audio Control 3 */
522 val = s->audio_ctrl3 | 0x0001;
523 s->audio_ctrl3 &= 0xff3f;
524 return val;
525
526 case 0x07: /* LCH_BASS_BOOST_N0 */
527 case 0x08: /* LCH_BASS_BOOST_N1 */
528 case 0x09: /* LCH_BASS_BOOST_N2 */
529 case 0x0a: /* LCH_BASS_BOOST_N3 */
530 case 0x0b: /* LCH_BASS_BOOST_N4 */
531 case 0x0c: /* LCH_BASS_BOOST_N5 */
532 case 0x0d: /* LCH_BASS_BOOST_D1 */
533 case 0x0e: /* LCH_BASS_BOOST_D2 */
534 case 0x0f: /* LCH_BASS_BOOST_D4 */
535 case 0x10: /* LCH_BASS_BOOST_D5 */
536 case 0x11: /* RCH_BASS_BOOST_N0 */
537 case 0x12: /* RCH_BASS_BOOST_N1 */
538 case 0x13: /* RCH_BASS_BOOST_N2 */
539 case 0x14: /* RCH_BASS_BOOST_N3 */
540 case 0x15: /* RCH_BASS_BOOST_N4 */
541 case 0x16: /* RCH_BASS_BOOST_N5 */
542 case 0x17: /* RCH_BASS_BOOST_D1 */
543 case 0x18: /* RCH_BASS_BOOST_D2 */
544 case 0x19: /* RCH_BASS_BOOST_D4 */
545 case 0x1a: /* RCH_BASS_BOOST_D5 */
546 return s->filter_data[reg - 0x07];
547
548 case 0x1b: /* PLL Programmability 1 */
549 return s->pll[0];
550
551 case 0x1c: /* PLL Programmability 2 */
552 return s->pll[1];
553
554 case 0x1d: /* Audio Control 4 */
555 return (!s->softstep) << 14;
556
557 default:
558#ifdef TSC_VERBOSE
559 fprintf(stderr, "tsc2102_audio_register_read: "
560 "no such register: 0x%02x\n", reg);
561#endif
562 return 0xffff;
563 }
564}
565
566static void tsc2102_data_register_write(
bc24a225 567 TSC210xState *s, int reg, uint16_t value)
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568{
569 switch (reg) {
570 case 0x00: /* X */
571 case 0x01: /* Y */
572 case 0x02: /* Z1 */
573 case 0x03: /* Z2 */
574 case 0x05: /* BAT1 */
575 case 0x06: /* BAT2 */
576 case 0x07: /* AUX1 */
577 case 0x08: /* AUX2 */
578 case 0x09: /* TEMP1 */
579 case 0x0a: /* TEMP2 */
580 return;
581
582 default:
583#ifdef TSC_VERBOSE
584 fprintf(stderr, "tsc2102_data_register_write: "
585 "no such register: 0x%02x\n", reg);
586#endif
587 }
588}
589
590static void tsc2102_control_register_write(
bc24a225 591 TSC210xState *s, int reg, uint16_t value)
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592{
593 switch (reg) {
594 case 0x00: /* TSC ADC */
595 s->host_mode = value >> 15;
596 s->enabled = !(value & 0x4000);
597 if (s->busy && !s->enabled)
598 qemu_del_timer(s->timer);
599 s->busy &= s->enabled;
600 s->nextfunction = (value >> 10) & 0xf;
601 s->nextprecision = (value >> 8) & 3;
602 s->filter = value & 0xff;
603 return;
604
a5d7eb65
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605 case 0x01: /* Status / Keypad Control */
606 if ((s->model & 0xff00) == 0x2100)
607 s->pin_func = value >> 14;
608 else {
609 s->kb.scan = (value >> 14) & 1;
610 s->kb.debounce = (value >> 11) & 7;
611 if (s->kb.intr && s->kb.scan) {
612 s->kb.intr = 0;
613 qemu_irq_raise(s->kbint);
614 }
615 }
3efda49d
AZ
616 return;
617
a5d7eb65
AZ
618 case 0x02: /* DAC Control */
619 if ((s->model & 0xff00) == 0x2300) {
620 s->dac_power &= 0x7fff;
621 s->dac_power |= 0x8000 & value;
622 } else
623 goto bad_reg;
624 break;
625
3efda49d
AZ
626 case 0x03: /* Reference */
627 s->ref = value & 0x1f;
628 return;
629
630 case 0x04: /* Reset */
631 if (value == 0xbb00) {
632 if (s->busy)
633 qemu_del_timer(s->timer);
634 tsc210x_reset(s);
635#ifdef TSC_VERBOSE
636 } else {
637 fprintf(stderr, "tsc2102_control_register_write: "
638 "wrong value written into RESET\n");
639#endif
640 }
641 return;
642
643 case 0x05: /* Configuration */
644 s->timing = value & 0x3f;
645#ifdef TSC_VERBOSE
646 if (value & ~0x3f)
647 fprintf(stderr, "tsc2102_control_register_write: "
648 "wrong value written into CONFIG\n");
649#endif
650 return;
651
a5d7eb65
AZ
652 case 0x06: /* Secondary configuration */
653 if ((s->model & 0xff00) == 0x2100)
654 goto bad_reg;
655 s->kb.mode = value >> 14;
656 s->pll[2] = value & 0x3ffff;
657 return;
658
659 case 0x10: /* Keypad Mask */
660 if ((s->model & 0xff00) == 0x2100)
661 goto bad_reg;
662 s->kb.mask = value;
663 return;
664
3efda49d 665 default:
a5d7eb65 666 bad_reg:
3efda49d
AZ
667#ifdef TSC_VERBOSE
668 fprintf(stderr, "tsc2102_control_register_write: "
669 "no such register: 0x%02x\n", reg);
670#endif
671 }
672}
673
674static void tsc2102_audio_register_write(
bc24a225 675 TSC210xState *s, int reg, uint16_t value)
3efda49d
AZ
676{
677 switch (reg) {
678 case 0x00: /* Audio Control 1 */
679 s->audio_ctrl1 = value & 0x0f3f;
680#ifdef TSC_VERBOSE
681 if ((value & ~0x0f3f) || ((value & 7) != ((value >> 3) & 7)))
682 fprintf(stderr, "tsc2102_audio_register_write: "
683 "wrong value written into Audio 1\n");
684#endif
73560bc8 685 tsc2102_audio_rate_update(s);
22d83b14 686 tsc2102_audio_output_update(s);
3efda49d
AZ
687 return;
688
689 case 0x01:
690#ifdef TSC_VERBOSE
691 if (value != 0xff00)
692 fprintf(stderr, "tsc2102_audio_register_write: "
693 "wrong value written into reg 0x01\n");
694#endif
695 return;
696
697 case 0x02: /* DAC Volume Control */
698 s->volume = value;
699 s->volume_change = qemu_get_clock(vm_clock);
700 return;
701
702 case 0x03:
703#ifdef TSC_VERBOSE
704 if (value != 0x8b00)
705 fprintf(stderr, "tsc2102_audio_register_write: "
706 "wrong value written into reg 0x03\n");
707#endif
708 return;
709
710 case 0x04: /* Audio Control 2 */
711 s->audio_ctrl2 = value & 0xf7f2;
712#ifdef TSC_VERBOSE
713 if (value & ~0xf7fd)
714 fprintf(stderr, "tsc2102_audio_register_write: "
715 "wrong value written into Audio 2\n");
716#endif
717 return;
718
719 case 0x05: /* Stereo DAC Power Control */
720 if ((value & ~s->dac_power) & (1 << 10))
721 s->powerdown = qemu_get_clock(vm_clock);
722
723 s->dac_power = value & 0x9543;
724#ifdef TSC_VERBOSE
725 if ((value & ~0x9543) != 0x2aa0)
726 fprintf(stderr, "tsc2102_audio_register_write: "
727 "wrong value written into Power\n");
728#endif
73560bc8 729 tsc2102_audio_rate_update(s);
22d83b14 730 tsc2102_audio_output_update(s);
3efda49d
AZ
731 return;
732
733 case 0x06: /* Audio Control 3 */
734 s->audio_ctrl3 &= 0x00c0;
735 s->audio_ctrl3 |= value & 0xf800;
736#ifdef TSC_VERBOSE
737 if (value & ~0xf8c7)
738 fprintf(stderr, "tsc2102_audio_register_write: "
739 "wrong value written into Audio 3\n");
740#endif
22d83b14 741 tsc2102_audio_output_update(s);
3efda49d
AZ
742 return;
743
744 case 0x07: /* LCH_BASS_BOOST_N0 */
745 case 0x08: /* LCH_BASS_BOOST_N1 */
746 case 0x09: /* LCH_BASS_BOOST_N2 */
747 case 0x0a: /* LCH_BASS_BOOST_N3 */
748 case 0x0b: /* LCH_BASS_BOOST_N4 */
749 case 0x0c: /* LCH_BASS_BOOST_N5 */
750 case 0x0d: /* LCH_BASS_BOOST_D1 */
751 case 0x0e: /* LCH_BASS_BOOST_D2 */
752 case 0x0f: /* LCH_BASS_BOOST_D4 */
753 case 0x10: /* LCH_BASS_BOOST_D5 */
754 case 0x11: /* RCH_BASS_BOOST_N0 */
755 case 0x12: /* RCH_BASS_BOOST_N1 */
756 case 0x13: /* RCH_BASS_BOOST_N2 */
757 case 0x14: /* RCH_BASS_BOOST_N3 */
758 case 0x15: /* RCH_BASS_BOOST_N4 */
759 case 0x16: /* RCH_BASS_BOOST_N5 */
760 case 0x17: /* RCH_BASS_BOOST_D1 */
761 case 0x18: /* RCH_BASS_BOOST_D2 */
762 case 0x19: /* RCH_BASS_BOOST_D4 */
763 case 0x1a: /* RCH_BASS_BOOST_D5 */
764 s->filter_data[reg - 0x07] = value;
765 return;
766
767 case 0x1b: /* PLL Programmability 1 */
768 s->pll[0] = value & 0xfffc;
769#ifdef TSC_VERBOSE
770 if (value & ~0xfffc)
771 fprintf(stderr, "tsc2102_audio_register_write: "
772 "wrong value written into PLL 1\n");
773#endif
774 return;
775
776 case 0x1c: /* PLL Programmability 2 */
777 s->pll[1] = value & 0xfffc;
778#ifdef TSC_VERBOSE
779 if (value & ~0xfffc)
780 fprintf(stderr, "tsc2102_audio_register_write: "
781 "wrong value written into PLL 2\n");
782#endif
783 return;
784
785 case 0x1d: /* Audio Control 4 */
786 s->softstep = !(value & 0x4000);
787#ifdef TSC_VERBOSE
788 if (value & ~0x4000)
789 fprintf(stderr, "tsc2102_audio_register_write: "
790 "wrong value written into Audio 4\n");
791#endif
792 return;
793
794 default:
795#ifdef TSC_VERBOSE
796 fprintf(stderr, "tsc2102_audio_register_write: "
797 "no such register: 0x%02x\n", reg);
798#endif
799 }
800}
801
802/* This handles most of the chip logic. */
bc24a225 803static void tsc210x_pin_update(TSC210xState *s)
3efda49d
AZ
804{
805 int64_t expires;
806 int pin_state;
807
808 switch (s->pin_func) {
809 case 0:
810 pin_state = s->pressure;
811 break;
812 case 1:
813 pin_state = !!s->dav;
814 break;
815 case 2:
816 default:
817 pin_state = s->pressure && !s->dav;
818 }
819
820 if (!s->enabled)
821 pin_state = 0;
822
823 if (pin_state != s->irq) {
824 s->irq = pin_state;
7fc42b4b 825 qemu_set_irq(s->pint, !s->irq);
3efda49d
AZ
826 }
827
828 switch (s->nextfunction) {
829 case TSC_MODE_XY_SCAN:
830 case TSC_MODE_XYZ_SCAN:
831 if (!s->pressure)
832 return;
833 break;
834
835 case TSC_MODE_X:
836 case TSC_MODE_Y:
837 case TSC_MODE_Z:
838 if (!s->pressure)
839 return;
840 /* Fall through */
841 case TSC_MODE_BAT1:
842 case TSC_MODE_BAT2:
843 case TSC_MODE_AUX:
844 case TSC_MODE_TEMP1:
845 case TSC_MODE_TEMP2:
846 if (s->dav)
847 s->enabled = 0;
848 break;
849
850 case TSC_MODE_AUX_SCAN:
851 case TSC_MODE_PORT_SCAN:
852 break;
853
854 case TSC_MODE_NO_SCAN:
855 case TSC_MODE_XX_DRV:
856 case TSC_MODE_YY_DRV:
857 case TSC_MODE_YX_DRV:
858 default:
859 return;
860 }
861
a5d7eb65 862 if (!s->enabled || s->busy || s->dav)
3efda49d
AZ
863 return;
864
865 s->busy = 1;
866 s->precision = s->nextprecision;
867 s->function = s->nextfunction;
868 expires = qemu_get_clock(vm_clock) + (ticks_per_sec >> 10);
869 qemu_mod_timer(s->timer, expires);
870}
871
bc24a225 872static uint16_t tsc210x_read(TSC210xState *s)
3efda49d
AZ
873{
874 uint16_t ret = 0x0000;
875
876 if (!s->command)
877 fprintf(stderr, "tsc210x_read: SPI underrun!\n");
878
879 switch (s->page) {
880 case TSC_DATA_REGISTERS_PAGE:
881 ret = tsc2102_data_register_read(s, s->offset);
a5d7eb65
AZ
882 if (!s->dav)
883 qemu_irq_raise(s->davint);
3efda49d
AZ
884 break;
885 case TSC_CONTROL_REGISTERS_PAGE:
886 ret = tsc2102_control_register_read(s, s->offset);
887 break;
888 case TSC_AUDIO_REGISTERS_PAGE:
889 ret = tsc2102_audio_register_read(s, s->offset);
890 break;
891 default:
2ac71179 892 hw_error("tsc210x_read: wrong memory page\n");
3efda49d
AZ
893 }
894
895 tsc210x_pin_update(s);
896
897 /* Allow sequential reads. */
898 s->offset ++;
899 s->state = 0;
900 return ret;
901}
902
bc24a225 903static void tsc210x_write(TSC210xState *s, uint16_t value)
3efda49d
AZ
904{
905 /*
906 * This is a two-state state machine for reading
907 * command and data every second time.
908 */
909 if (!s->state) {
910 s->command = value >> 15;
911 s->page = (value >> 11) & 0x0f;
912 s->offset = (value >> 5) & 0x3f;
913 s->state = 1;
914 } else {
915 if (s->command)
916 fprintf(stderr, "tsc210x_write: SPI overrun!\n");
917 else
918 switch (s->page) {
919 case TSC_DATA_REGISTERS_PAGE:
920 tsc2102_data_register_write(s, s->offset, value);
921 break;
922 case TSC_CONTROL_REGISTERS_PAGE:
923 tsc2102_control_register_write(s, s->offset, value);
924 break;
925 case TSC_AUDIO_REGISTERS_PAGE:
926 tsc2102_audio_register_write(s, s->offset, value);
927 break;
928 default:
2ac71179 929 hw_error("tsc210x_write: wrong memory page\n");
3efda49d
AZ
930 }
931
932 tsc210x_pin_update(s);
933 s->state = 0;
934 }
935}
936
e927bb00 937uint32_t tsc210x_txrx(void *opaque, uint32_t value, int len)
a5d7eb65 938{
bc24a225 939 TSC210xState *s = opaque;
a5d7eb65
AZ
940 uint32_t ret = 0;
941
e927bb00 942 if (len != 16)
2ac71179 943 hw_error("%s: FIXME: bad SPI word width %i\n", __FUNCTION__, len);
e927bb00 944
a5d7eb65
AZ
945 /* TODO: sequential reads etc - how do we make sure the host doesn't
946 * unintentionally read out a conversion result from a register while
947 * transmitting the command word of the next command? */
948 if (!value || (s->state && s->command))
949 ret = tsc210x_read(s);
950 if (value || (s->state && !s->command))
951 tsc210x_write(s, value);
952
953 return ret;
954}
955
3efda49d
AZ
956static void tsc210x_timer_tick(void *opaque)
957{
bc24a225 958 TSC210xState *s = opaque;
3efda49d
AZ
959
960 /* Timer ticked -- a set of conversions has been finished. */
961
962 if (!s->busy)
963 return;
964
965 s->busy = 0;
966 s->dav |= mode_regs[s->function];
967 tsc210x_pin_update(s);
a5d7eb65 968 qemu_irq_lower(s->davint);
3efda49d
AZ
969}
970
971static void tsc210x_touchscreen_event(void *opaque,
972 int x, int y, int z, int buttons_state)
973{
bc24a225 974 TSC210xState *s = opaque;
3efda49d
AZ
975 int p = s->pressure;
976
977 if (buttons_state) {
978 s->x = x;
979 s->y = y;
980 }
981 s->pressure = !!buttons_state;
982
983 /*
984 * Note: We would get better responsiveness in the guest by
985 * signaling TS events immediately, but for now we simulate
986 * the first conversion delay for sake of correctness.
987 */
988 if (p != s->pressure)
989 tsc210x_pin_update(s);
990}
991
bc24a225 992static void tsc210x_i2s_swallow(TSC210xState *s)
d8f699cb
AZ
993{
994 if (s->dac_voice[0])
995 tsc210x_out_flush(s, s->codec.out.len);
996 else
997 s->codec.out.len = 0;
998}
999
bc24a225 1000static void tsc210x_i2s_set_rate(TSC210xState *s, int in, int out)
d8f699cb
AZ
1001{
1002 s->i2s_tx_rate = out;
1003 s->i2s_rx_rate = in;
1004}
1005
3efda49d
AZ
1006static void tsc210x_save(QEMUFile *f, void *opaque)
1007{
bc24a225 1008 TSC210xState *s = (TSC210xState *) opaque;
3efda49d
AZ
1009 int64_t now = qemu_get_clock(vm_clock);
1010 int i;
1011
1012 qemu_put_be16(f, s->x);
1013 qemu_put_be16(f, s->y);
1014 qemu_put_byte(f, s->pressure);
1015
1016 qemu_put_byte(f, s->state);
1017 qemu_put_byte(f, s->page);
1018 qemu_put_byte(f, s->offset);
1019 qemu_put_byte(f, s->command);
1020
1021 qemu_put_byte(f, s->irq);
1022 qemu_put_be16s(f, &s->dav);
1023
1024 qemu_put_timer(f, s->timer);
1025 qemu_put_byte(f, s->enabled);
1026 qemu_put_byte(f, s->host_mode);
1027 qemu_put_byte(f, s->function);
1028 qemu_put_byte(f, s->nextfunction);
1029 qemu_put_byte(f, s->precision);
1030 qemu_put_byte(f, s->nextprecision);
1031 qemu_put_byte(f, s->filter);
1032 qemu_put_byte(f, s->pin_func);
1033 qemu_put_byte(f, s->ref);
1034 qemu_put_byte(f, s->timing);
1035 qemu_put_be32(f, s->noise);
1036
1037 qemu_put_be16s(f, &s->audio_ctrl1);
1038 qemu_put_be16s(f, &s->audio_ctrl2);
1039 qemu_put_be16s(f, &s->audio_ctrl3);
1040 qemu_put_be16s(f, &s->pll[0]);
1041 qemu_put_be16s(f, &s->pll[1]);
1042 qemu_put_be16s(f, &s->volume);
b6c4f71f
BS
1043 qemu_put_sbe64(f, (s->volume_change - now));
1044 qemu_put_sbe64(f, (s->powerdown - now));
3efda49d
AZ
1045 qemu_put_byte(f, s->softstep);
1046 qemu_put_be16s(f, &s->dac_power);
1047
1048 for (i = 0; i < 0x14; i ++)
1049 qemu_put_be16s(f, &s->filter_data[i]);
1050}
1051
1052static int tsc210x_load(QEMUFile *f, void *opaque, int version_id)
1053{
bc24a225 1054 TSC210xState *s = (TSC210xState *) opaque;
3efda49d
AZ
1055 int64_t now = qemu_get_clock(vm_clock);
1056 int i;
1057
1058 s->x = qemu_get_be16(f);
1059 s->y = qemu_get_be16(f);
1060 s->pressure = qemu_get_byte(f);
1061
1062 s->state = qemu_get_byte(f);
1063 s->page = qemu_get_byte(f);
1064 s->offset = qemu_get_byte(f);
1065 s->command = qemu_get_byte(f);
1066
1067 s->irq = qemu_get_byte(f);
1068 qemu_get_be16s(f, &s->dav);
1069
1070 qemu_get_timer(f, s->timer);
1071 s->enabled = qemu_get_byte(f);
1072 s->host_mode = qemu_get_byte(f);
1073 s->function = qemu_get_byte(f);
1074 s->nextfunction = qemu_get_byte(f);
1075 s->precision = qemu_get_byte(f);
1076 s->nextprecision = qemu_get_byte(f);
1077 s->filter = qemu_get_byte(f);
1078 s->pin_func = qemu_get_byte(f);
1079 s->ref = qemu_get_byte(f);
1080 s->timing = qemu_get_byte(f);
1081 s->noise = qemu_get_be32(f);
1082
1083 qemu_get_be16s(f, &s->audio_ctrl1);
1084 qemu_get_be16s(f, &s->audio_ctrl2);
1085 qemu_get_be16s(f, &s->audio_ctrl3);
1086 qemu_get_be16s(f, &s->pll[0]);
1087 qemu_get_be16s(f, &s->pll[1]);
1088 qemu_get_be16s(f, &s->volume);
b6c4f71f
BS
1089 s->volume_change = qemu_get_sbe64(f) + now;
1090 s->powerdown = qemu_get_sbe64(f) + now;
3efda49d
AZ
1091 s->softstep = qemu_get_byte(f);
1092 qemu_get_be16s(f, &s->dac_power);
1093
1094 for (i = 0; i < 0x14; i ++)
1095 qemu_get_be16s(f, &s->filter_data[i]);
1096
1097 s->busy = qemu_timer_pending(s->timer);
7fc42b4b 1098 qemu_set_irq(s->pint, !s->irq);
a5d7eb65 1099 qemu_set_irq(s->davint, !s->dav);
3efda49d
AZ
1100
1101 return 0;
1102}
1103
22d83b14 1104uWireSlave *tsc2102_init(qemu_irq pint)
3efda49d 1105{
bc24a225 1106 TSC210xState *s;
3efda49d 1107
bc24a225
PB
1108 s = (TSC210xState *)
1109 qemu_mallocz(sizeof(TSC210xState));
1110 memset(s, 0, sizeof(TSC210xState));
3efda49d
AZ
1111 s->x = 160;
1112 s->y = 160;
1113 s->pressure = 0;
1114 s->precision = s->nextprecision = 0;
1115 s->timer = qemu_new_timer(vm_clock, tsc210x_timer_tick, s);
1116 s->pint = pint;
a5d7eb65 1117 s->model = 0x2102;
d8f699cb 1118 s->name = "tsc2102";
3efda49d 1119
a5d7eb65
AZ
1120 s->tr[0] = 0;
1121 s->tr[1] = 1;
e927bb00
AZ
1122 s->tr[2] = 1;
1123 s->tr[3] = 0;
a5d7eb65
AZ
1124 s->tr[4] = 1;
1125 s->tr[5] = 0;
e927bb00
AZ
1126 s->tr[6] = 1;
1127 s->tr[7] = 0;
a5d7eb65 1128
3efda49d
AZ
1129 s->chip.opaque = s;
1130 s->chip.send = (void *) tsc210x_write;
1131 s->chip.receive = (void *) tsc210x_read;
1132
d8f699cb
AZ
1133 s->codec.opaque = s;
1134 s->codec.tx_swallow = (void *) tsc210x_i2s_swallow;
1135 s->codec.set_rate = (void *) tsc210x_i2s_set_rate;
1136 s->codec.in.fifo = s->in_fifo;
1137 s->codec.out.fifo = s->out_fifo;
1138
3efda49d
AZ
1139 tsc210x_reset(s);
1140
1141 qemu_add_mouse_event_handler(tsc210x_touchscreen_event, s, 1,
1142 "QEMU TSC2102-driven Touchscreen");
1143
1a7dafce 1144 AUD_register_card(s->name, &s->card);
d8f699cb 1145
8217606e 1146 qemu_register_reset((void *) tsc210x_reset, 0, s);
18be5187 1147 register_savevm(s->name, -1, 0,
3efda49d
AZ
1148 tsc210x_save, tsc210x_load, s);
1149
1150 return &s->chip;
1151}
d8f699cb 1152
22d83b14 1153uWireSlave *tsc2301_init(qemu_irq penirq, qemu_irq kbirq, qemu_irq dav)
a5d7eb65 1154{
bc24a225 1155 TSC210xState *s;
a5d7eb65 1156
bc24a225
PB
1157 s = (TSC210xState *)
1158 qemu_mallocz(sizeof(TSC210xState));
1159 memset(s, 0, sizeof(TSC210xState));
a5d7eb65
AZ
1160 s->x = 400;
1161 s->y = 240;
1162 s->pressure = 0;
1163 s->precision = s->nextprecision = 0;
1164 s->timer = qemu_new_timer(vm_clock, tsc210x_timer_tick, s);
1165 s->pint = penirq;
1166 s->kbint = kbirq;
1167 s->davint = dav;
1168 s->model = 0x2301;
1169 s->name = "tsc2301";
a5d7eb65
AZ
1170
1171 s->tr[0] = 0;
1172 s->tr[1] = 1;
e927bb00
AZ
1173 s->tr[2] = 1;
1174 s->tr[3] = 0;
a5d7eb65
AZ
1175 s->tr[4] = 1;
1176 s->tr[5] = 0;
e927bb00
AZ
1177 s->tr[6] = 1;
1178 s->tr[7] = 0;
a5d7eb65
AZ
1179
1180 s->chip.opaque = s;
1181 s->chip.send = (void *) tsc210x_write;
1182 s->chip.receive = (void *) tsc210x_read;
1183
1184 s->codec.opaque = s;
1185 s->codec.tx_swallow = (void *) tsc210x_i2s_swallow;
1186 s->codec.set_rate = (void *) tsc210x_i2s_set_rate;
1187 s->codec.in.fifo = s->in_fifo;
1188 s->codec.out.fifo = s->out_fifo;
1189
1190 tsc210x_reset(s);
1191
1192 qemu_add_mouse_event_handler(tsc210x_touchscreen_event, s, 1,
1193 "QEMU TSC2301-driven Touchscreen");
1194
1a7dafce 1195 AUD_register_card(s->name, &s->card);
a5d7eb65 1196
8217606e 1197 qemu_register_reset((void *) tsc210x_reset, 0, s);
18be5187 1198 register_savevm(s->name, -1, 0, tsc210x_save, tsc210x_load, s);
a5d7eb65
AZ
1199
1200 return &s->chip;
1201}
1202
bc24a225 1203I2SCodec *tsc210x_codec(uWireSlave *chip)
d8f699cb 1204{
bc24a225 1205 TSC210xState *s = (TSC210xState *) chip->opaque;
d8f699cb
AZ
1206
1207 return &s->codec;
1208}
a5d7eb65
AZ
1209
1210/*
1211 * Use tslib generated calibration data to generate ADC input values
1212 * from the touchscreen. Assuming 12-bit precision was used during
1213 * tslib calibration.
1214 */
bc24a225
PB
1215void tsc210x_set_transform(uWireSlave *chip,
1216 MouseTransformInfo *info)
a5d7eb65 1217{
bc24a225 1218 TSC210xState *s = (TSC210xState *) chip->opaque;
a5d7eb65
AZ
1219#if 0
1220 int64_t ltr[8];
1221
1222 ltr[0] = (int64_t) info->a[1] * info->y;
1223 ltr[1] = (int64_t) info->a[4] * info->x;
1224 ltr[2] = (int64_t) info->a[1] * info->a[3] -
1225 (int64_t) info->a[4] * info->a[0];
1226 ltr[3] = (int64_t) info->a[2] * info->a[4] -
1227 (int64_t) info->a[5] * info->a[1];
1228 ltr[4] = (int64_t) info->a[0] * info->y;
1229 ltr[5] = (int64_t) info->a[3] * info->x;
1230 ltr[6] = (int64_t) info->a[4] * info->a[0] -
1231 (int64_t) info->a[1] * info->a[3];
1232 ltr[7] = (int64_t) info->a[2] * info->a[3] -
1233 (int64_t) info->a[5] * info->a[0];
1234
1235 /* Avoid integer overflow */
1236 s->tr[0] = ltr[0] >> 11;
1237 s->tr[1] = ltr[1] >> 11;
1238 s->tr[2] = muldiv64(ltr[2], 1, info->a[6]);
1239 s->tr[3] = muldiv64(ltr[3], 1 << 4, ltr[2]);
1240 s->tr[4] = ltr[4] >> 11;
1241 s->tr[5] = ltr[5] >> 11;
1242 s->tr[6] = muldiv64(ltr[6], 1, info->a[6]);
1243 s->tr[7] = muldiv64(ltr[7], 1 << 4, ltr[6]);
1244#else
1245
1246 /* This version assumes touchscreen X & Y axis are parallel or
1247 * perpendicular to LCD's X & Y axis in some way. */
1248 if (abs(info->a[0]) > abs(info->a[1])) {
1249 s->tr[0] = 0;
1250 s->tr[1] = -info->a[6] * info->x;
1251 s->tr[2] = info->a[0];
1252 s->tr[3] = -info->a[2] / info->a[0];
1253 s->tr[4] = info->a[6] * info->y;
1254 s->tr[5] = 0;
1255 s->tr[6] = info->a[4];
1256 s->tr[7] = -info->a[5] / info->a[4];
1257 } else {
1258 s->tr[0] = info->a[6] * info->y;
1259 s->tr[1] = 0;
1260 s->tr[2] = info->a[1];
1261 s->tr[3] = -info->a[2] / info->a[1];
1262 s->tr[4] = 0;
1263 s->tr[5] = -info->a[6] * info->x;
1264 s->tr[6] = info->a[3];
1265 s->tr[7] = -info->a[5] / info->a[3];
1266 }
1267
1268 s->tr[0] >>= 11;
1269 s->tr[1] >>= 11;
1270 s->tr[3] <<= 4;
1271 s->tr[4] >>= 11;
1272 s->tr[5] >>= 11;
1273 s->tr[7] <<= 4;
1274#endif
1275}
1276
bc24a225 1277void tsc210x_key_event(uWireSlave *chip, int key, int down)
a5d7eb65 1278{
bc24a225 1279 TSC210xState *s = (TSC210xState *) chip->opaque;
a5d7eb65
AZ
1280
1281 if (down)
1282 s->kb.down |= 1 << key;
1283 else
1284 s->kb.down &= ~(1 << key);
1285
1286 if (down && (s->kb.down & ~s->kb.mask) && !s->kb.intr) {
1287 s->kb.intr = 1;
1288 qemu_irq_lower(s->kbint);
1289 } else if (s->kb.intr && !(s->kb.down & ~s->kb.mask) &&
1290 !(s->kb.mode & 1)) {
1291 s->kb.intr = 0;
1292 qemu_irq_raise(s->kbint);
1293 }
1294}