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Commit | Line | Data |
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3efda49d | 1 | /* |
7fc42b4b | 2 | * TI TSC2102 (touchscreen/sensors/audio controller) emulator. |
a5d7eb65 | 3 | * TI TSC2301 (touchscreen/sensors/keypad). |
3efda49d AZ |
4 | * |
5 | * Copyright (c) 2006 Andrzej Zaborowski <balrog@zabor.org> | |
a5d7eb65 | 6 | * Copyright (C) 2008 Nokia Corporation |
3efda49d AZ |
7 | * |
8 | * This program is free software; you can redistribute it and/or | |
9 | * modify it under the terms of the GNU General Public License as | |
a5d7eb65 AZ |
10 | * published by the Free Software Foundation; either version 2 or |
11 | * (at your option) version 3 of the License. | |
3efda49d AZ |
12 | * |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
fad6cb1a AJ |
18 | * You should have received a copy of the GNU General Public License along |
19 | * with this program; if not, write to the Free Software Foundation, Inc., | |
20 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. | |
3efda49d AZ |
21 | */ |
22 | ||
87ecb68b PB |
23 | #include "hw.h" |
24 | #include "audio/audio.h" | |
25 | #include "qemu-timer.h" | |
26 | #include "console.h" | |
bc24a225 | 27 | #include "omap.h" /* For I2SCodec and uWireSlave */ |
b1d8e52e | 28 | #include "devices.h" |
3efda49d AZ |
29 | |
30 | #define TSC_DATA_REGISTERS_PAGE 0x0 | |
31 | #define TSC_CONTROL_REGISTERS_PAGE 0x1 | |
32 | #define TSC_AUDIO_REGISTERS_PAGE 0x2 | |
33 | ||
34 | #define TSC_VERBOSE | |
35 | ||
36 | #define TSC_CUT_RESOLUTION(value, p) ((value) >> (16 - resolution[p])) | |
37 | ||
bc24a225 | 38 | typedef struct { |
3efda49d | 39 | qemu_irq pint; |
a5d7eb65 AZ |
40 | qemu_irq kbint; |
41 | qemu_irq davint; | |
3efda49d | 42 | QEMUTimer *timer; |
d8f699cb | 43 | QEMUSoundCard card; |
bc24a225 PB |
44 | uWireSlave chip; |
45 | I2SCodec codec; | |
d8f699cb AZ |
46 | uint8_t in_fifo[16384]; |
47 | uint8_t out_fifo[16384]; | |
a5d7eb65 | 48 | uint16_t model; |
3efda49d AZ |
49 | |
50 | int x, y; | |
51 | int pressure; | |
52 | ||
53 | int state, page, offset, irq; | |
54 | uint16_t command, dav; | |
55 | ||
56 | int busy; | |
57 | int enabled; | |
58 | int host_mode; | |
59 | int function; | |
60 | int nextfunction; | |
61 | int precision; | |
62 | int nextprecision; | |
63 | int filter; | |
64 | int pin_func; | |
65 | int ref; | |
66 | int timing; | |
67 | int noise; | |
68 | ||
69 | uint16_t audio_ctrl1; | |
70 | uint16_t audio_ctrl2; | |
71 | uint16_t audio_ctrl3; | |
a5d7eb65 | 72 | uint16_t pll[3]; |
3efda49d AZ |
73 | uint16_t volume; |
74 | int64_t volume_change; | |
75 | int softstep; | |
76 | uint16_t dac_power; | |
77 | int64_t powerdown; | |
78 | uint16_t filter_data[0x14]; | |
d8f699cb AZ |
79 | |
80 | const char *name; | |
81 | SWVoiceIn *adc_voice[1]; | |
82 | SWVoiceOut *dac_voice[1]; | |
83 | int i2s_rx_rate; | |
84 | int i2s_tx_rate; | |
85 | AudioState *audio; | |
a5d7eb65 AZ |
86 | |
87 | int tr[8]; | |
88 | ||
89 | struct { | |
90 | uint16_t down; | |
91 | uint16_t mask; | |
92 | int scan; | |
93 | int debounce; | |
94 | int mode; | |
95 | int intr; | |
96 | } kb; | |
bc24a225 | 97 | } TSC210xState; |
3efda49d AZ |
98 | |
99 | static const int resolution[4] = { 12, 8, 10, 12 }; | |
100 | ||
101 | #define TSC_MODE_NO_SCAN 0x0 | |
102 | #define TSC_MODE_XY_SCAN 0x1 | |
103 | #define TSC_MODE_XYZ_SCAN 0x2 | |
104 | #define TSC_MODE_X 0x3 | |
105 | #define TSC_MODE_Y 0x4 | |
106 | #define TSC_MODE_Z 0x5 | |
107 | #define TSC_MODE_BAT1 0x6 | |
108 | #define TSC_MODE_BAT2 0x7 | |
109 | #define TSC_MODE_AUX 0x8 | |
110 | #define TSC_MODE_AUX_SCAN 0x9 | |
111 | #define TSC_MODE_TEMP1 0xa | |
112 | #define TSC_MODE_PORT_SCAN 0xb | |
113 | #define TSC_MODE_TEMP2 0xc | |
114 | #define TSC_MODE_XX_DRV 0xd | |
115 | #define TSC_MODE_YY_DRV 0xe | |
116 | #define TSC_MODE_YX_DRV 0xf | |
117 | ||
118 | static const uint16_t mode_regs[16] = { | |
119 | 0x0000, /* No scan */ | |
120 | 0x0600, /* X, Y scan */ | |
121 | 0x0780, /* X, Y, Z scan */ | |
122 | 0x0400, /* X */ | |
123 | 0x0200, /* Y */ | |
124 | 0x0180, /* Z */ | |
125 | 0x0040, /* BAT1 */ | |
126 | 0x0030, /* BAT2 */ | |
127 | 0x0010, /* AUX */ | |
128 | 0x0010, /* AUX scan */ | |
129 | 0x0004, /* TEMP1 */ | |
130 | 0x0070, /* Port scan */ | |
131 | 0x0002, /* TEMP2 */ | |
132 | 0x0000, /* X+, X- drivers */ | |
133 | 0x0000, /* Y+, Y- drivers */ | |
134 | 0x0000, /* Y+, X- drivers */ | |
135 | }; | |
136 | ||
a5d7eb65 AZ |
137 | #define X_TRANSFORM(s) \ |
138 | ((s->y * s->tr[0] - s->x * s->tr[1]) / s->tr[2] + s->tr[3]) | |
139 | #define Y_TRANSFORM(s) \ | |
140 | ((s->y * s->tr[4] - s->x * s->tr[5]) / s->tr[6] + s->tr[7]) | |
3efda49d | 141 | #define Z1_TRANSFORM(s) \ |
8ef6367e | 142 | ((400 - ((s)->x >> 7) + ((s)->pressure << 10)) << 4) |
3efda49d | 143 | #define Z2_TRANSFORM(s) \ |
8ef6367e AZ |
144 | ((4000 + ((s)->y >> 7) - ((s)->pressure << 10)) << 4) |
145 | ||
3efda49d AZ |
146 | #define BAT1_VAL 0x8660 |
147 | #define BAT2_VAL 0x0000 | |
148 | #define AUX1_VAL 0x35c0 | |
149 | #define AUX2_VAL 0xffff | |
150 | #define TEMP1_VAL 0x8c70 | |
151 | #define TEMP2_VAL 0xa5b0 | |
152 | ||
153 | #define TSC_POWEROFF_DELAY 50 | |
154 | #define TSC_SOFTSTEP_DELAY 50 | |
155 | ||
bc24a225 | 156 | static void tsc210x_reset(TSC210xState *s) |
3efda49d AZ |
157 | { |
158 | s->state = 0; | |
159 | s->pin_func = 2; | |
160 | s->enabled = 0; | |
161 | s->busy = 0; | |
162 | s->nextfunction = 0; | |
163 | s->ref = 0; | |
164 | s->timing = 0; | |
165 | s->irq = 0; | |
166 | s->dav = 0; | |
167 | ||
168 | s->audio_ctrl1 = 0x0000; | |
169 | s->audio_ctrl2 = 0x4410; | |
170 | s->audio_ctrl3 = 0x0000; | |
171 | s->pll[0] = 0x1004; | |
172 | s->pll[1] = 0x0000; | |
a5d7eb65 | 173 | s->pll[2] = 0x1fff; |
3efda49d AZ |
174 | s->volume = 0xffff; |
175 | s->dac_power = 0x8540; | |
176 | s->softstep = 1; | |
177 | s->volume_change = 0; | |
178 | s->powerdown = 0; | |
179 | s->filter_data[0x00] = 0x6be3; | |
180 | s->filter_data[0x01] = 0x9666; | |
181 | s->filter_data[0x02] = 0x675d; | |
182 | s->filter_data[0x03] = 0x6be3; | |
183 | s->filter_data[0x04] = 0x9666; | |
184 | s->filter_data[0x05] = 0x675d; | |
185 | s->filter_data[0x06] = 0x7d83; | |
186 | s->filter_data[0x07] = 0x84ee; | |
187 | s->filter_data[0x08] = 0x7d83; | |
188 | s->filter_data[0x09] = 0x84ee; | |
189 | s->filter_data[0x0a] = 0x6be3; | |
190 | s->filter_data[0x0b] = 0x9666; | |
191 | s->filter_data[0x0c] = 0x675d; | |
192 | s->filter_data[0x0d] = 0x6be3; | |
193 | s->filter_data[0x0e] = 0x9666; | |
194 | s->filter_data[0x0f] = 0x675d; | |
195 | s->filter_data[0x10] = 0x7d83; | |
196 | s->filter_data[0x11] = 0x84ee; | |
197 | s->filter_data[0x12] = 0x7d83; | |
198 | s->filter_data[0x13] = 0x84ee; | |
199 | ||
d8f699cb AZ |
200 | s->i2s_tx_rate = 0; |
201 | s->i2s_rx_rate = 0; | |
202 | ||
a5d7eb65 AZ |
203 | s->kb.scan = 1; |
204 | s->kb.debounce = 0; | |
205 | s->kb.mask = 0x0000; | |
206 | s->kb.mode = 3; | |
207 | s->kb.intr = 0; | |
208 | ||
7fc42b4b | 209 | qemu_set_irq(s->pint, !s->irq); |
a5d7eb65 AZ |
210 | qemu_set_irq(s->davint, !s->dav); |
211 | qemu_irq_raise(s->kbint); | |
3efda49d AZ |
212 | } |
213 | ||
bc24a225 | 214 | typedef struct { |
d8f699cb AZ |
215 | int rate; |
216 | int dsor; | |
217 | int fsref; | |
bc24a225 | 218 | } TSC210xRateInfo; |
d8f699cb AZ |
219 | |
220 | /* { rate, dsor, fsref } */ | |
bc24a225 | 221 | static const TSC210xRateInfo tsc2101_rates[] = { |
d8f699cb AZ |
222 | /* Fsref / 6.0 */ |
223 | { 7350, 7, 1 }, | |
224 | { 8000, 7, 0 }, | |
225 | /* Fsref / 5.5 */ | |
226 | { 8018, 6, 1 }, | |
227 | { 8727, 6, 0 }, | |
228 | /* Fsref / 5.0 */ | |
229 | { 8820, 5, 1 }, | |
230 | { 9600, 5, 0 }, | |
231 | /* Fsref / 4.0 */ | |
232 | { 11025, 4, 1 }, | |
233 | { 12000, 4, 0 }, | |
234 | /* Fsref / 3.0 */ | |
235 | { 14700, 3, 1 }, | |
236 | { 16000, 3, 0 }, | |
237 | /* Fsref / 2.0 */ | |
238 | { 22050, 2, 1 }, | |
239 | { 24000, 2, 0 }, | |
240 | /* Fsref / 1.5 */ | |
241 | { 29400, 1, 1 }, | |
242 | { 32000, 1, 0 }, | |
243 | /* Fsref */ | |
244 | { 44100, 0, 1 }, | |
245 | { 48000, 0, 0 }, | |
246 | ||
247 | { 0, 0, 0 }, | |
248 | }; | |
249 | ||
250 | /* { rate, dsor, fsref } */ | |
bc24a225 | 251 | static const TSC210xRateInfo tsc2102_rates[] = { |
d8f699cb AZ |
252 | /* Fsref / 6.0 */ |
253 | { 7350, 63, 1 }, | |
254 | { 8000, 63, 0 }, | |
255 | /* Fsref / 6.0 */ | |
256 | { 7350, 54, 1 }, | |
257 | { 8000, 54, 0 }, | |
258 | /* Fsref / 5.0 */ | |
259 | { 8820, 45, 1 }, | |
260 | { 9600, 45, 0 }, | |
261 | /* Fsref / 4.0 */ | |
262 | { 11025, 36, 1 }, | |
263 | { 12000, 36, 0 }, | |
264 | /* Fsref / 3.0 */ | |
265 | { 14700, 27, 1 }, | |
266 | { 16000, 27, 0 }, | |
267 | /* Fsref / 2.0 */ | |
268 | { 22050, 18, 1 }, | |
269 | { 24000, 18, 0 }, | |
270 | /* Fsref / 1.5 */ | |
271 | { 29400, 9, 1 }, | |
272 | { 32000, 9, 0 }, | |
273 | /* Fsref */ | |
274 | { 44100, 0, 1 }, | |
275 | { 48000, 0, 0 }, | |
276 | ||
277 | { 0, 0, 0 }, | |
278 | }; | |
279 | ||
bc24a225 | 280 | static inline void tsc210x_out_flush(TSC210xState *s, int len) |
d8f699cb AZ |
281 | { |
282 | uint8_t *data = s->codec.out.fifo + s->codec.out.start; | |
283 | uint8_t *end = data + len; | |
284 | ||
285 | while (data < end) | |
286 | data += AUD_write(s->dac_voice[0], data, end - data) ?: (end - data); | |
287 | ||
288 | s->codec.out.len -= len; | |
289 | if (s->codec.out.len) | |
290 | memmove(s->codec.out.fifo, end, s->codec.out.len); | |
291 | s->codec.out.start = 0; | |
292 | } | |
293 | ||
bc24a225 | 294 | static void tsc210x_audio_out_cb(TSC210xState *s, int free_b) |
d8f699cb AZ |
295 | { |
296 | if (s->codec.out.len >= free_b) { | |
297 | tsc210x_out_flush(s, free_b); | |
298 | return; | |
299 | } | |
300 | ||
301 | s->codec.out.size = MIN(free_b, 16384); | |
302 | qemu_irq_raise(s->codec.tx_start); | |
303 | } | |
304 | ||
bc24a225 | 305 | static void tsc2102_audio_rate_update(TSC210xState *s) |
d8f699cb | 306 | { |
bc24a225 | 307 | const TSC210xRateInfo *rate; |
73560bc8 AZ |
308 | |
309 | s->codec.tx_rate = 0; | |
310 | s->codec.rx_rate = 0; | |
311 | if (s->dac_power & (1 << 15)) /* PWDNC */ | |
312 | return; | |
313 | ||
314 | for (rate = tsc2102_rates; rate->rate; rate ++) | |
315 | if (rate->dsor == (s->audio_ctrl1 & 0x3f) && /* DACFS */ | |
316 | rate->fsref == ((s->audio_ctrl3 >> 13) & 1))/* REFFS */ | |
317 | break; | |
318 | if (!rate->rate) { | |
319 | printf("%s: unknown sampling rate configured\n", __FUNCTION__); | |
320 | return; | |
321 | } | |
322 | ||
323 | s->codec.tx_rate = rate->rate; | |
324 | } | |
325 | ||
bc24a225 | 326 | static void tsc2102_audio_output_update(TSC210xState *s) |
73560bc8 AZ |
327 | { |
328 | int enable; | |
1ea879e5 | 329 | struct audsettings fmt; |
d8f699cb AZ |
330 | |
331 | if (s->dac_voice[0]) { | |
332 | tsc210x_out_flush(s, s->codec.out.len); | |
333 | s->codec.out.size = 0; | |
334 | AUD_set_active_out(s->dac_voice[0], 0); | |
335 | AUD_close_out(&s->card, s->dac_voice[0]); | |
336 | s->dac_voice[0] = 0; | |
337 | } | |
73560bc8 | 338 | s->codec.cts = 0; |
d8f699cb AZ |
339 | |
340 | enable = | |
341 | (~s->dac_power & (1 << 15)) && /* PWDNC */ | |
342 | (~s->dac_power & (1 << 10)); /* DAPWDN */ | |
73560bc8 | 343 | if (!enable || !s->codec.tx_rate) |
d8f699cb | 344 | return; |
d8f699cb AZ |
345 | |
346 | /* Force our own sampling rate even in slave DAC mode */ | |
347 | fmt.endianness = 0; | |
348 | fmt.nchannels = 2; | |
73560bc8 | 349 | fmt.freq = s->codec.tx_rate; |
d8f699cb AZ |
350 | fmt.fmt = AUD_FMT_S16; |
351 | ||
352 | s->dac_voice[0] = AUD_open_out(&s->card, s->dac_voice[0], | |
353 | "tsc2102.sink", s, (void *) tsc210x_audio_out_cb, &fmt); | |
73560bc8 AZ |
354 | if (s->dac_voice[0]) { |
355 | s->codec.cts = 1; | |
d8f699cb | 356 | AUD_set_active_out(s->dac_voice[0], 1); |
73560bc8 | 357 | } |
d8f699cb AZ |
358 | } |
359 | ||
bc24a225 | 360 | static uint16_t tsc2102_data_register_read(TSC210xState *s, int reg) |
3efda49d AZ |
361 | { |
362 | switch (reg) { | |
363 | case 0x00: /* X */ | |
364 | s->dav &= 0xfbff; | |
a5d7eb65 | 365 | return TSC_CUT_RESOLUTION(X_TRANSFORM(s), s->precision) + |
3efda49d AZ |
366 | (s->noise & 3); |
367 | ||
368 | case 0x01: /* Y */ | |
369 | s->noise ++; | |
370 | s->dav &= 0xfdff; | |
a5d7eb65 | 371 | return TSC_CUT_RESOLUTION(Y_TRANSFORM(s), s->precision) ^ |
3efda49d AZ |
372 | (s->noise & 3); |
373 | ||
374 | case 0x02: /* Z1 */ | |
375 | s->dav &= 0xfeff; | |
376 | return TSC_CUT_RESOLUTION(Z1_TRANSFORM(s), s->precision) - | |
377 | (s->noise & 3); | |
378 | ||
379 | case 0x03: /* Z2 */ | |
380 | s->dav &= 0xff7f; | |
381 | return TSC_CUT_RESOLUTION(Z2_TRANSFORM(s), s->precision) | | |
382 | (s->noise & 3); | |
383 | ||
384 | case 0x04: /* KPData */ | |
a5d7eb65 AZ |
385 | if ((s->model & 0xff00) == 0x2300) { |
386 | if (s->kb.intr && (s->kb.mode & 2)) { | |
387 | s->kb.intr = 0; | |
388 | qemu_irq_raise(s->kbint); | |
389 | } | |
390 | return s->kb.down; | |
391 | } | |
392 | ||
3efda49d AZ |
393 | return 0xffff; |
394 | ||
395 | case 0x05: /* BAT1 */ | |
396 | s->dav &= 0xffbf; | |
8ef6367e AZ |
397 | return TSC_CUT_RESOLUTION(BAT1_VAL, s->precision) + |
398 | (s->noise & 6); | |
3efda49d AZ |
399 | |
400 | case 0x06: /* BAT2 */ | |
401 | s->dav &= 0xffdf; | |
402 | return TSC_CUT_RESOLUTION(BAT2_VAL, s->precision); | |
403 | ||
404 | case 0x07: /* AUX1 */ | |
405 | s->dav &= 0xffef; | |
406 | return TSC_CUT_RESOLUTION(AUX1_VAL, s->precision); | |
407 | ||
408 | case 0x08: /* AUX2 */ | |
409 | s->dav &= 0xfff7; | |
410 | return 0xffff; | |
411 | ||
412 | case 0x09: /* TEMP1 */ | |
413 | s->dav &= 0xfffb; | |
8ef6367e AZ |
414 | return TSC_CUT_RESOLUTION(TEMP1_VAL, s->precision) - |
415 | (s->noise & 5); | |
3efda49d AZ |
416 | |
417 | case 0x0a: /* TEMP2 */ | |
418 | s->dav &= 0xfffd; | |
8ef6367e AZ |
419 | return TSC_CUT_RESOLUTION(TEMP2_VAL, s->precision) ^ |
420 | (s->noise & 3); | |
3efda49d AZ |
421 | |
422 | case 0x0b: /* DAC */ | |
423 | s->dav &= 0xfffe; | |
424 | return 0xffff; | |
425 | ||
426 | default: | |
427 | #ifdef TSC_VERBOSE | |
428 | fprintf(stderr, "tsc2102_data_register_read: " | |
429 | "no such register: 0x%02x\n", reg); | |
430 | #endif | |
431 | return 0xffff; | |
432 | } | |
433 | } | |
434 | ||
435 | static uint16_t tsc2102_control_register_read( | |
bc24a225 | 436 | TSC210xState *s, int reg) |
3efda49d AZ |
437 | { |
438 | switch (reg) { | |
439 | case 0x00: /* TSC ADC */ | |
440 | return (s->pressure << 15) | ((!s->busy) << 14) | | |
441 | (s->nextfunction << 10) | (s->nextprecision << 8) | s->filter; | |
442 | ||
a5d7eb65 AZ |
443 | case 0x01: /* Status / Keypad Control */ |
444 | if ((s->model & 0xff00) == 0x2100) | |
445 | return (s->pin_func << 14) | ((!s->enabled) << 13) | | |
446 | (s->host_mode << 12) | ((!!s->dav) << 11) | s->dav; | |
447 | else | |
448 | return (s->kb.intr << 15) | ((s->kb.scan || !s->kb.down) << 14) | | |
449 | (s->kb.debounce << 11); | |
450 | ||
451 | case 0x02: /* DAC Control */ | |
452 | if ((s->model & 0xff00) == 0x2300) | |
453 | return s->dac_power & 0x8000; | |
454 | else | |
455 | goto bad_reg; | |
3efda49d AZ |
456 | |
457 | case 0x03: /* Reference */ | |
458 | return s->ref; | |
459 | ||
460 | case 0x04: /* Reset */ | |
461 | return 0xffff; | |
462 | ||
463 | case 0x05: /* Configuration */ | |
464 | return s->timing; | |
465 | ||
a5d7eb65 AZ |
466 | case 0x06: /* Secondary configuration */ |
467 | if ((s->model & 0xff00) == 0x2100) | |
468 | goto bad_reg; | |
469 | return ((!s->dav) << 15) | ((s->kb.mode & 1) << 14) | s->pll[2]; | |
470 | ||
471 | case 0x10: /* Keypad Mask */ | |
472 | if ((s->model & 0xff00) == 0x2100) | |
473 | goto bad_reg; | |
474 | return s->kb.mask; | |
475 | ||
3efda49d | 476 | default: |
a5d7eb65 | 477 | bad_reg: |
3efda49d AZ |
478 | #ifdef TSC_VERBOSE |
479 | fprintf(stderr, "tsc2102_control_register_read: " | |
480 | "no such register: 0x%02x\n", reg); | |
481 | #endif | |
482 | return 0xffff; | |
483 | } | |
484 | } | |
485 | ||
bc24a225 | 486 | static uint16_t tsc2102_audio_register_read(TSC210xState *s, int reg) |
3efda49d AZ |
487 | { |
488 | int l_ch, r_ch; | |
489 | uint16_t val; | |
490 | ||
491 | switch (reg) { | |
492 | case 0x00: /* Audio Control 1 */ | |
493 | return s->audio_ctrl1; | |
494 | ||
495 | case 0x01: | |
496 | return 0xff00; | |
497 | ||
498 | case 0x02: /* DAC Volume Control */ | |
499 | return s->volume; | |
500 | ||
501 | case 0x03: | |
502 | return 0x8b00; | |
503 | ||
504 | case 0x04: /* Audio Control 2 */ | |
505 | l_ch = 1; | |
506 | r_ch = 1; | |
507 | if (s->softstep && !(s->dac_power & (1 << 10))) { | |
508 | l_ch = (qemu_get_clock(vm_clock) > | |
509 | s->volume_change + TSC_SOFTSTEP_DELAY); | |
510 | r_ch = (qemu_get_clock(vm_clock) > | |
511 | s->volume_change + TSC_SOFTSTEP_DELAY); | |
512 | } | |
513 | ||
514 | return s->audio_ctrl2 | (l_ch << 3) | (r_ch << 2); | |
515 | ||
516 | case 0x05: /* Stereo DAC Power Control */ | |
517 | return 0x2aa0 | s->dac_power | | |
518 | (((s->dac_power & (1 << 10)) && | |
519 | (qemu_get_clock(vm_clock) > | |
520 | s->powerdown + TSC_POWEROFF_DELAY)) << 6); | |
521 | ||
522 | case 0x06: /* Audio Control 3 */ | |
523 | val = s->audio_ctrl3 | 0x0001; | |
524 | s->audio_ctrl3 &= 0xff3f; | |
525 | return val; | |
526 | ||
527 | case 0x07: /* LCH_BASS_BOOST_N0 */ | |
528 | case 0x08: /* LCH_BASS_BOOST_N1 */ | |
529 | case 0x09: /* LCH_BASS_BOOST_N2 */ | |
530 | case 0x0a: /* LCH_BASS_BOOST_N3 */ | |
531 | case 0x0b: /* LCH_BASS_BOOST_N4 */ | |
532 | case 0x0c: /* LCH_BASS_BOOST_N5 */ | |
533 | case 0x0d: /* LCH_BASS_BOOST_D1 */ | |
534 | case 0x0e: /* LCH_BASS_BOOST_D2 */ | |
535 | case 0x0f: /* LCH_BASS_BOOST_D4 */ | |
536 | case 0x10: /* LCH_BASS_BOOST_D5 */ | |
537 | case 0x11: /* RCH_BASS_BOOST_N0 */ | |
538 | case 0x12: /* RCH_BASS_BOOST_N1 */ | |
539 | case 0x13: /* RCH_BASS_BOOST_N2 */ | |
540 | case 0x14: /* RCH_BASS_BOOST_N3 */ | |
541 | case 0x15: /* RCH_BASS_BOOST_N4 */ | |
542 | case 0x16: /* RCH_BASS_BOOST_N5 */ | |
543 | case 0x17: /* RCH_BASS_BOOST_D1 */ | |
544 | case 0x18: /* RCH_BASS_BOOST_D2 */ | |
545 | case 0x19: /* RCH_BASS_BOOST_D4 */ | |
546 | case 0x1a: /* RCH_BASS_BOOST_D5 */ | |
547 | return s->filter_data[reg - 0x07]; | |
548 | ||
549 | case 0x1b: /* PLL Programmability 1 */ | |
550 | return s->pll[0]; | |
551 | ||
552 | case 0x1c: /* PLL Programmability 2 */ | |
553 | return s->pll[1]; | |
554 | ||
555 | case 0x1d: /* Audio Control 4 */ | |
556 | return (!s->softstep) << 14; | |
557 | ||
558 | default: | |
559 | #ifdef TSC_VERBOSE | |
560 | fprintf(stderr, "tsc2102_audio_register_read: " | |
561 | "no such register: 0x%02x\n", reg); | |
562 | #endif | |
563 | return 0xffff; | |
564 | } | |
565 | } | |
566 | ||
567 | static void tsc2102_data_register_write( | |
bc24a225 | 568 | TSC210xState *s, int reg, uint16_t value) |
3efda49d AZ |
569 | { |
570 | switch (reg) { | |
571 | case 0x00: /* X */ | |
572 | case 0x01: /* Y */ | |
573 | case 0x02: /* Z1 */ | |
574 | case 0x03: /* Z2 */ | |
575 | case 0x05: /* BAT1 */ | |
576 | case 0x06: /* BAT2 */ | |
577 | case 0x07: /* AUX1 */ | |
578 | case 0x08: /* AUX2 */ | |
579 | case 0x09: /* TEMP1 */ | |
580 | case 0x0a: /* TEMP2 */ | |
581 | return; | |
582 | ||
583 | default: | |
584 | #ifdef TSC_VERBOSE | |
585 | fprintf(stderr, "tsc2102_data_register_write: " | |
586 | "no such register: 0x%02x\n", reg); | |
587 | #endif | |
588 | } | |
589 | } | |
590 | ||
591 | static void tsc2102_control_register_write( | |
bc24a225 | 592 | TSC210xState *s, int reg, uint16_t value) |
3efda49d AZ |
593 | { |
594 | switch (reg) { | |
595 | case 0x00: /* TSC ADC */ | |
596 | s->host_mode = value >> 15; | |
597 | s->enabled = !(value & 0x4000); | |
598 | if (s->busy && !s->enabled) | |
599 | qemu_del_timer(s->timer); | |
600 | s->busy &= s->enabled; | |
601 | s->nextfunction = (value >> 10) & 0xf; | |
602 | s->nextprecision = (value >> 8) & 3; | |
603 | s->filter = value & 0xff; | |
604 | return; | |
605 | ||
a5d7eb65 AZ |
606 | case 0x01: /* Status / Keypad Control */ |
607 | if ((s->model & 0xff00) == 0x2100) | |
608 | s->pin_func = value >> 14; | |
609 | else { | |
610 | s->kb.scan = (value >> 14) & 1; | |
611 | s->kb.debounce = (value >> 11) & 7; | |
612 | if (s->kb.intr && s->kb.scan) { | |
613 | s->kb.intr = 0; | |
614 | qemu_irq_raise(s->kbint); | |
615 | } | |
616 | } | |
3efda49d AZ |
617 | return; |
618 | ||
a5d7eb65 AZ |
619 | case 0x02: /* DAC Control */ |
620 | if ((s->model & 0xff00) == 0x2300) { | |
621 | s->dac_power &= 0x7fff; | |
622 | s->dac_power |= 0x8000 & value; | |
623 | } else | |
624 | goto bad_reg; | |
625 | break; | |
626 | ||
3efda49d AZ |
627 | case 0x03: /* Reference */ |
628 | s->ref = value & 0x1f; | |
629 | return; | |
630 | ||
631 | case 0x04: /* Reset */ | |
632 | if (value == 0xbb00) { | |
633 | if (s->busy) | |
634 | qemu_del_timer(s->timer); | |
635 | tsc210x_reset(s); | |
636 | #ifdef TSC_VERBOSE | |
637 | } else { | |
638 | fprintf(stderr, "tsc2102_control_register_write: " | |
639 | "wrong value written into RESET\n"); | |
640 | #endif | |
641 | } | |
642 | return; | |
643 | ||
644 | case 0x05: /* Configuration */ | |
645 | s->timing = value & 0x3f; | |
646 | #ifdef TSC_VERBOSE | |
647 | if (value & ~0x3f) | |
648 | fprintf(stderr, "tsc2102_control_register_write: " | |
649 | "wrong value written into CONFIG\n"); | |
650 | #endif | |
651 | return; | |
652 | ||
a5d7eb65 AZ |
653 | case 0x06: /* Secondary configuration */ |
654 | if ((s->model & 0xff00) == 0x2100) | |
655 | goto bad_reg; | |
656 | s->kb.mode = value >> 14; | |
657 | s->pll[2] = value & 0x3ffff; | |
658 | return; | |
659 | ||
660 | case 0x10: /* Keypad Mask */ | |
661 | if ((s->model & 0xff00) == 0x2100) | |
662 | goto bad_reg; | |
663 | s->kb.mask = value; | |
664 | return; | |
665 | ||
3efda49d | 666 | default: |
a5d7eb65 | 667 | bad_reg: |
3efda49d AZ |
668 | #ifdef TSC_VERBOSE |
669 | fprintf(stderr, "tsc2102_control_register_write: " | |
670 | "no such register: 0x%02x\n", reg); | |
671 | #endif | |
672 | } | |
673 | } | |
674 | ||
675 | static void tsc2102_audio_register_write( | |
bc24a225 | 676 | TSC210xState *s, int reg, uint16_t value) |
3efda49d AZ |
677 | { |
678 | switch (reg) { | |
679 | case 0x00: /* Audio Control 1 */ | |
680 | s->audio_ctrl1 = value & 0x0f3f; | |
681 | #ifdef TSC_VERBOSE | |
682 | if ((value & ~0x0f3f) || ((value & 7) != ((value >> 3) & 7))) | |
683 | fprintf(stderr, "tsc2102_audio_register_write: " | |
684 | "wrong value written into Audio 1\n"); | |
685 | #endif | |
73560bc8 | 686 | tsc2102_audio_rate_update(s); |
22d83b14 | 687 | tsc2102_audio_output_update(s); |
3efda49d AZ |
688 | return; |
689 | ||
690 | case 0x01: | |
691 | #ifdef TSC_VERBOSE | |
692 | if (value != 0xff00) | |
693 | fprintf(stderr, "tsc2102_audio_register_write: " | |
694 | "wrong value written into reg 0x01\n"); | |
695 | #endif | |
696 | return; | |
697 | ||
698 | case 0x02: /* DAC Volume Control */ | |
699 | s->volume = value; | |
700 | s->volume_change = qemu_get_clock(vm_clock); | |
701 | return; | |
702 | ||
703 | case 0x03: | |
704 | #ifdef TSC_VERBOSE | |
705 | if (value != 0x8b00) | |
706 | fprintf(stderr, "tsc2102_audio_register_write: " | |
707 | "wrong value written into reg 0x03\n"); | |
708 | #endif | |
709 | return; | |
710 | ||
711 | case 0x04: /* Audio Control 2 */ | |
712 | s->audio_ctrl2 = value & 0xf7f2; | |
713 | #ifdef TSC_VERBOSE | |
714 | if (value & ~0xf7fd) | |
715 | fprintf(stderr, "tsc2102_audio_register_write: " | |
716 | "wrong value written into Audio 2\n"); | |
717 | #endif | |
718 | return; | |
719 | ||
720 | case 0x05: /* Stereo DAC Power Control */ | |
721 | if ((value & ~s->dac_power) & (1 << 10)) | |
722 | s->powerdown = qemu_get_clock(vm_clock); | |
723 | ||
724 | s->dac_power = value & 0x9543; | |
725 | #ifdef TSC_VERBOSE | |
726 | if ((value & ~0x9543) != 0x2aa0) | |
727 | fprintf(stderr, "tsc2102_audio_register_write: " | |
728 | "wrong value written into Power\n"); | |
729 | #endif | |
73560bc8 | 730 | tsc2102_audio_rate_update(s); |
22d83b14 | 731 | tsc2102_audio_output_update(s); |
3efda49d AZ |
732 | return; |
733 | ||
734 | case 0x06: /* Audio Control 3 */ | |
735 | s->audio_ctrl3 &= 0x00c0; | |
736 | s->audio_ctrl3 |= value & 0xf800; | |
737 | #ifdef TSC_VERBOSE | |
738 | if (value & ~0xf8c7) | |
739 | fprintf(stderr, "tsc2102_audio_register_write: " | |
740 | "wrong value written into Audio 3\n"); | |
741 | #endif | |
22d83b14 | 742 | tsc2102_audio_output_update(s); |
3efda49d AZ |
743 | return; |
744 | ||
745 | case 0x07: /* LCH_BASS_BOOST_N0 */ | |
746 | case 0x08: /* LCH_BASS_BOOST_N1 */ | |
747 | case 0x09: /* LCH_BASS_BOOST_N2 */ | |
748 | case 0x0a: /* LCH_BASS_BOOST_N3 */ | |
749 | case 0x0b: /* LCH_BASS_BOOST_N4 */ | |
750 | case 0x0c: /* LCH_BASS_BOOST_N5 */ | |
751 | case 0x0d: /* LCH_BASS_BOOST_D1 */ | |
752 | case 0x0e: /* LCH_BASS_BOOST_D2 */ | |
753 | case 0x0f: /* LCH_BASS_BOOST_D4 */ | |
754 | case 0x10: /* LCH_BASS_BOOST_D5 */ | |
755 | case 0x11: /* RCH_BASS_BOOST_N0 */ | |
756 | case 0x12: /* RCH_BASS_BOOST_N1 */ | |
757 | case 0x13: /* RCH_BASS_BOOST_N2 */ | |
758 | case 0x14: /* RCH_BASS_BOOST_N3 */ | |
759 | case 0x15: /* RCH_BASS_BOOST_N4 */ | |
760 | case 0x16: /* RCH_BASS_BOOST_N5 */ | |
761 | case 0x17: /* RCH_BASS_BOOST_D1 */ | |
762 | case 0x18: /* RCH_BASS_BOOST_D2 */ | |
763 | case 0x19: /* RCH_BASS_BOOST_D4 */ | |
764 | case 0x1a: /* RCH_BASS_BOOST_D5 */ | |
765 | s->filter_data[reg - 0x07] = value; | |
766 | return; | |
767 | ||
768 | case 0x1b: /* PLL Programmability 1 */ | |
769 | s->pll[0] = value & 0xfffc; | |
770 | #ifdef TSC_VERBOSE | |
771 | if (value & ~0xfffc) | |
772 | fprintf(stderr, "tsc2102_audio_register_write: " | |
773 | "wrong value written into PLL 1\n"); | |
774 | #endif | |
775 | return; | |
776 | ||
777 | case 0x1c: /* PLL Programmability 2 */ | |
778 | s->pll[1] = value & 0xfffc; | |
779 | #ifdef TSC_VERBOSE | |
780 | if (value & ~0xfffc) | |
781 | fprintf(stderr, "tsc2102_audio_register_write: " | |
782 | "wrong value written into PLL 2\n"); | |
783 | #endif | |
784 | return; | |
785 | ||
786 | case 0x1d: /* Audio Control 4 */ | |
787 | s->softstep = !(value & 0x4000); | |
788 | #ifdef TSC_VERBOSE | |
789 | if (value & ~0x4000) | |
790 | fprintf(stderr, "tsc2102_audio_register_write: " | |
791 | "wrong value written into Audio 4\n"); | |
792 | #endif | |
793 | return; | |
794 | ||
795 | default: | |
796 | #ifdef TSC_VERBOSE | |
797 | fprintf(stderr, "tsc2102_audio_register_write: " | |
798 | "no such register: 0x%02x\n", reg); | |
799 | #endif | |
800 | } | |
801 | } | |
802 | ||
803 | /* This handles most of the chip logic. */ | |
bc24a225 | 804 | static void tsc210x_pin_update(TSC210xState *s) |
3efda49d AZ |
805 | { |
806 | int64_t expires; | |
807 | int pin_state; | |
808 | ||
809 | switch (s->pin_func) { | |
810 | case 0: | |
811 | pin_state = s->pressure; | |
812 | break; | |
813 | case 1: | |
814 | pin_state = !!s->dav; | |
815 | break; | |
816 | case 2: | |
817 | default: | |
818 | pin_state = s->pressure && !s->dav; | |
819 | } | |
820 | ||
821 | if (!s->enabled) | |
822 | pin_state = 0; | |
823 | ||
824 | if (pin_state != s->irq) { | |
825 | s->irq = pin_state; | |
7fc42b4b | 826 | qemu_set_irq(s->pint, !s->irq); |
3efda49d AZ |
827 | } |
828 | ||
829 | switch (s->nextfunction) { | |
830 | case TSC_MODE_XY_SCAN: | |
831 | case TSC_MODE_XYZ_SCAN: | |
832 | if (!s->pressure) | |
833 | return; | |
834 | break; | |
835 | ||
836 | case TSC_MODE_X: | |
837 | case TSC_MODE_Y: | |
838 | case TSC_MODE_Z: | |
839 | if (!s->pressure) | |
840 | return; | |
841 | /* Fall through */ | |
842 | case TSC_MODE_BAT1: | |
843 | case TSC_MODE_BAT2: | |
844 | case TSC_MODE_AUX: | |
845 | case TSC_MODE_TEMP1: | |
846 | case TSC_MODE_TEMP2: | |
847 | if (s->dav) | |
848 | s->enabled = 0; | |
849 | break; | |
850 | ||
851 | case TSC_MODE_AUX_SCAN: | |
852 | case TSC_MODE_PORT_SCAN: | |
853 | break; | |
854 | ||
855 | case TSC_MODE_NO_SCAN: | |
856 | case TSC_MODE_XX_DRV: | |
857 | case TSC_MODE_YY_DRV: | |
858 | case TSC_MODE_YX_DRV: | |
859 | default: | |
860 | return; | |
861 | } | |
862 | ||
a5d7eb65 | 863 | if (!s->enabled || s->busy || s->dav) |
3efda49d AZ |
864 | return; |
865 | ||
866 | s->busy = 1; | |
867 | s->precision = s->nextprecision; | |
868 | s->function = s->nextfunction; | |
869 | expires = qemu_get_clock(vm_clock) + (ticks_per_sec >> 10); | |
870 | qemu_mod_timer(s->timer, expires); | |
871 | } | |
872 | ||
bc24a225 | 873 | static uint16_t tsc210x_read(TSC210xState *s) |
3efda49d AZ |
874 | { |
875 | uint16_t ret = 0x0000; | |
876 | ||
877 | if (!s->command) | |
878 | fprintf(stderr, "tsc210x_read: SPI underrun!\n"); | |
879 | ||
880 | switch (s->page) { | |
881 | case TSC_DATA_REGISTERS_PAGE: | |
882 | ret = tsc2102_data_register_read(s, s->offset); | |
a5d7eb65 AZ |
883 | if (!s->dav) |
884 | qemu_irq_raise(s->davint); | |
3efda49d AZ |
885 | break; |
886 | case TSC_CONTROL_REGISTERS_PAGE: | |
887 | ret = tsc2102_control_register_read(s, s->offset); | |
888 | break; | |
889 | case TSC_AUDIO_REGISTERS_PAGE: | |
890 | ret = tsc2102_audio_register_read(s, s->offset); | |
891 | break; | |
892 | default: | |
2ac71179 | 893 | hw_error("tsc210x_read: wrong memory page\n"); |
3efda49d AZ |
894 | } |
895 | ||
896 | tsc210x_pin_update(s); | |
897 | ||
898 | /* Allow sequential reads. */ | |
899 | s->offset ++; | |
900 | s->state = 0; | |
901 | return ret; | |
902 | } | |
903 | ||
bc24a225 | 904 | static void tsc210x_write(TSC210xState *s, uint16_t value) |
3efda49d AZ |
905 | { |
906 | /* | |
907 | * This is a two-state state machine for reading | |
908 | * command and data every second time. | |
909 | */ | |
910 | if (!s->state) { | |
911 | s->command = value >> 15; | |
912 | s->page = (value >> 11) & 0x0f; | |
913 | s->offset = (value >> 5) & 0x3f; | |
914 | s->state = 1; | |
915 | } else { | |
916 | if (s->command) | |
917 | fprintf(stderr, "tsc210x_write: SPI overrun!\n"); | |
918 | else | |
919 | switch (s->page) { | |
920 | case TSC_DATA_REGISTERS_PAGE: | |
921 | tsc2102_data_register_write(s, s->offset, value); | |
922 | break; | |
923 | case TSC_CONTROL_REGISTERS_PAGE: | |
924 | tsc2102_control_register_write(s, s->offset, value); | |
925 | break; | |
926 | case TSC_AUDIO_REGISTERS_PAGE: | |
927 | tsc2102_audio_register_write(s, s->offset, value); | |
928 | break; | |
929 | default: | |
2ac71179 | 930 | hw_error("tsc210x_write: wrong memory page\n"); |
3efda49d AZ |
931 | } |
932 | ||
933 | tsc210x_pin_update(s); | |
934 | s->state = 0; | |
935 | } | |
936 | } | |
937 | ||
e927bb00 | 938 | uint32_t tsc210x_txrx(void *opaque, uint32_t value, int len) |
a5d7eb65 | 939 | { |
bc24a225 | 940 | TSC210xState *s = opaque; |
a5d7eb65 AZ |
941 | uint32_t ret = 0; |
942 | ||
e927bb00 | 943 | if (len != 16) |
2ac71179 | 944 | hw_error("%s: FIXME: bad SPI word width %i\n", __FUNCTION__, len); |
e927bb00 | 945 | |
a5d7eb65 AZ |
946 | /* TODO: sequential reads etc - how do we make sure the host doesn't |
947 | * unintentionally read out a conversion result from a register while | |
948 | * transmitting the command word of the next command? */ | |
949 | if (!value || (s->state && s->command)) | |
950 | ret = tsc210x_read(s); | |
951 | if (value || (s->state && !s->command)) | |
952 | tsc210x_write(s, value); | |
953 | ||
954 | return ret; | |
955 | } | |
956 | ||
3efda49d AZ |
957 | static void tsc210x_timer_tick(void *opaque) |
958 | { | |
bc24a225 | 959 | TSC210xState *s = opaque; |
3efda49d AZ |
960 | |
961 | /* Timer ticked -- a set of conversions has been finished. */ | |
962 | ||
963 | if (!s->busy) | |
964 | return; | |
965 | ||
966 | s->busy = 0; | |
967 | s->dav |= mode_regs[s->function]; | |
968 | tsc210x_pin_update(s); | |
a5d7eb65 | 969 | qemu_irq_lower(s->davint); |
3efda49d AZ |
970 | } |
971 | ||
972 | static void tsc210x_touchscreen_event(void *opaque, | |
973 | int x, int y, int z, int buttons_state) | |
974 | { | |
bc24a225 | 975 | TSC210xState *s = opaque; |
3efda49d AZ |
976 | int p = s->pressure; |
977 | ||
978 | if (buttons_state) { | |
979 | s->x = x; | |
980 | s->y = y; | |
981 | } | |
982 | s->pressure = !!buttons_state; | |
983 | ||
984 | /* | |
985 | * Note: We would get better responsiveness in the guest by | |
986 | * signaling TS events immediately, but for now we simulate | |
987 | * the first conversion delay for sake of correctness. | |
988 | */ | |
989 | if (p != s->pressure) | |
990 | tsc210x_pin_update(s); | |
991 | } | |
992 | ||
bc24a225 | 993 | static void tsc210x_i2s_swallow(TSC210xState *s) |
d8f699cb AZ |
994 | { |
995 | if (s->dac_voice[0]) | |
996 | tsc210x_out_flush(s, s->codec.out.len); | |
997 | else | |
998 | s->codec.out.len = 0; | |
999 | } | |
1000 | ||
bc24a225 | 1001 | static void tsc210x_i2s_set_rate(TSC210xState *s, int in, int out) |
d8f699cb AZ |
1002 | { |
1003 | s->i2s_tx_rate = out; | |
1004 | s->i2s_rx_rate = in; | |
1005 | } | |
1006 | ||
3efda49d AZ |
1007 | static void tsc210x_save(QEMUFile *f, void *opaque) |
1008 | { | |
bc24a225 | 1009 | TSC210xState *s = (TSC210xState *) opaque; |
3efda49d AZ |
1010 | int64_t now = qemu_get_clock(vm_clock); |
1011 | int i; | |
1012 | ||
1013 | qemu_put_be16(f, s->x); | |
1014 | qemu_put_be16(f, s->y); | |
1015 | qemu_put_byte(f, s->pressure); | |
1016 | ||
1017 | qemu_put_byte(f, s->state); | |
1018 | qemu_put_byte(f, s->page); | |
1019 | qemu_put_byte(f, s->offset); | |
1020 | qemu_put_byte(f, s->command); | |
1021 | ||
1022 | qemu_put_byte(f, s->irq); | |
1023 | qemu_put_be16s(f, &s->dav); | |
1024 | ||
1025 | qemu_put_timer(f, s->timer); | |
1026 | qemu_put_byte(f, s->enabled); | |
1027 | qemu_put_byte(f, s->host_mode); | |
1028 | qemu_put_byte(f, s->function); | |
1029 | qemu_put_byte(f, s->nextfunction); | |
1030 | qemu_put_byte(f, s->precision); | |
1031 | qemu_put_byte(f, s->nextprecision); | |
1032 | qemu_put_byte(f, s->filter); | |
1033 | qemu_put_byte(f, s->pin_func); | |
1034 | qemu_put_byte(f, s->ref); | |
1035 | qemu_put_byte(f, s->timing); | |
1036 | qemu_put_be32(f, s->noise); | |
1037 | ||
1038 | qemu_put_be16s(f, &s->audio_ctrl1); | |
1039 | qemu_put_be16s(f, &s->audio_ctrl2); | |
1040 | qemu_put_be16s(f, &s->audio_ctrl3); | |
1041 | qemu_put_be16s(f, &s->pll[0]); | |
1042 | qemu_put_be16s(f, &s->pll[1]); | |
1043 | qemu_put_be16s(f, &s->volume); | |
b6c4f71f BS |
1044 | qemu_put_sbe64(f, (s->volume_change - now)); |
1045 | qemu_put_sbe64(f, (s->powerdown - now)); | |
3efda49d AZ |
1046 | qemu_put_byte(f, s->softstep); |
1047 | qemu_put_be16s(f, &s->dac_power); | |
1048 | ||
1049 | for (i = 0; i < 0x14; i ++) | |
1050 | qemu_put_be16s(f, &s->filter_data[i]); | |
1051 | } | |
1052 | ||
1053 | static int tsc210x_load(QEMUFile *f, void *opaque, int version_id) | |
1054 | { | |
bc24a225 | 1055 | TSC210xState *s = (TSC210xState *) opaque; |
3efda49d AZ |
1056 | int64_t now = qemu_get_clock(vm_clock); |
1057 | int i; | |
1058 | ||
1059 | s->x = qemu_get_be16(f); | |
1060 | s->y = qemu_get_be16(f); | |
1061 | s->pressure = qemu_get_byte(f); | |
1062 | ||
1063 | s->state = qemu_get_byte(f); | |
1064 | s->page = qemu_get_byte(f); | |
1065 | s->offset = qemu_get_byte(f); | |
1066 | s->command = qemu_get_byte(f); | |
1067 | ||
1068 | s->irq = qemu_get_byte(f); | |
1069 | qemu_get_be16s(f, &s->dav); | |
1070 | ||
1071 | qemu_get_timer(f, s->timer); | |
1072 | s->enabled = qemu_get_byte(f); | |
1073 | s->host_mode = qemu_get_byte(f); | |
1074 | s->function = qemu_get_byte(f); | |
1075 | s->nextfunction = qemu_get_byte(f); | |
1076 | s->precision = qemu_get_byte(f); | |
1077 | s->nextprecision = qemu_get_byte(f); | |
1078 | s->filter = qemu_get_byte(f); | |
1079 | s->pin_func = qemu_get_byte(f); | |
1080 | s->ref = qemu_get_byte(f); | |
1081 | s->timing = qemu_get_byte(f); | |
1082 | s->noise = qemu_get_be32(f); | |
1083 | ||
1084 | qemu_get_be16s(f, &s->audio_ctrl1); | |
1085 | qemu_get_be16s(f, &s->audio_ctrl2); | |
1086 | qemu_get_be16s(f, &s->audio_ctrl3); | |
1087 | qemu_get_be16s(f, &s->pll[0]); | |
1088 | qemu_get_be16s(f, &s->pll[1]); | |
1089 | qemu_get_be16s(f, &s->volume); | |
b6c4f71f BS |
1090 | s->volume_change = qemu_get_sbe64(f) + now; |
1091 | s->powerdown = qemu_get_sbe64(f) + now; | |
3efda49d AZ |
1092 | s->softstep = qemu_get_byte(f); |
1093 | qemu_get_be16s(f, &s->dac_power); | |
1094 | ||
1095 | for (i = 0; i < 0x14; i ++) | |
1096 | qemu_get_be16s(f, &s->filter_data[i]); | |
1097 | ||
1098 | s->busy = qemu_timer_pending(s->timer); | |
7fc42b4b | 1099 | qemu_set_irq(s->pint, !s->irq); |
a5d7eb65 | 1100 | qemu_set_irq(s->davint, !s->dav); |
3efda49d AZ |
1101 | |
1102 | return 0; | |
1103 | } | |
1104 | ||
22d83b14 | 1105 | uWireSlave *tsc2102_init(qemu_irq pint) |
3efda49d | 1106 | { |
bc24a225 | 1107 | TSC210xState *s; |
3efda49d | 1108 | |
bc24a225 PB |
1109 | s = (TSC210xState *) |
1110 | qemu_mallocz(sizeof(TSC210xState)); | |
1111 | memset(s, 0, sizeof(TSC210xState)); | |
3efda49d AZ |
1112 | s->x = 160; |
1113 | s->y = 160; | |
1114 | s->pressure = 0; | |
1115 | s->precision = s->nextprecision = 0; | |
1116 | s->timer = qemu_new_timer(vm_clock, tsc210x_timer_tick, s); | |
1117 | s->pint = pint; | |
a5d7eb65 | 1118 | s->model = 0x2102; |
d8f699cb | 1119 | s->name = "tsc2102"; |
22d83b14 | 1120 | s->audio = AUD_init();; |
3efda49d | 1121 | |
a5d7eb65 AZ |
1122 | s->tr[0] = 0; |
1123 | s->tr[1] = 1; | |
e927bb00 AZ |
1124 | s->tr[2] = 1; |
1125 | s->tr[3] = 0; | |
a5d7eb65 AZ |
1126 | s->tr[4] = 1; |
1127 | s->tr[5] = 0; | |
e927bb00 AZ |
1128 | s->tr[6] = 1; |
1129 | s->tr[7] = 0; | |
a5d7eb65 | 1130 | |
3efda49d AZ |
1131 | s->chip.opaque = s; |
1132 | s->chip.send = (void *) tsc210x_write; | |
1133 | s->chip.receive = (void *) tsc210x_read; | |
1134 | ||
d8f699cb AZ |
1135 | s->codec.opaque = s; |
1136 | s->codec.tx_swallow = (void *) tsc210x_i2s_swallow; | |
1137 | s->codec.set_rate = (void *) tsc210x_i2s_set_rate; | |
1138 | s->codec.in.fifo = s->in_fifo; | |
1139 | s->codec.out.fifo = s->out_fifo; | |
1140 | ||
3efda49d AZ |
1141 | tsc210x_reset(s); |
1142 | ||
1143 | qemu_add_mouse_event_handler(tsc210x_touchscreen_event, s, 1, | |
1144 | "QEMU TSC2102-driven Touchscreen"); | |
1145 | ||
22d83b14 | 1146 | AUD_register_card(s->audio, s->name, &s->card); |
d8f699cb | 1147 | |
3efda49d | 1148 | qemu_register_reset((void *) tsc210x_reset, s); |
18be5187 | 1149 | register_savevm(s->name, -1, 0, |
3efda49d AZ |
1150 | tsc210x_save, tsc210x_load, s); |
1151 | ||
1152 | return &s->chip; | |
1153 | } | |
d8f699cb | 1154 | |
22d83b14 | 1155 | uWireSlave *tsc2301_init(qemu_irq penirq, qemu_irq kbirq, qemu_irq dav) |
a5d7eb65 | 1156 | { |
bc24a225 | 1157 | TSC210xState *s; |
a5d7eb65 | 1158 | |
bc24a225 PB |
1159 | s = (TSC210xState *) |
1160 | qemu_mallocz(sizeof(TSC210xState)); | |
1161 | memset(s, 0, sizeof(TSC210xState)); | |
a5d7eb65 AZ |
1162 | s->x = 400; |
1163 | s->y = 240; | |
1164 | s->pressure = 0; | |
1165 | s->precision = s->nextprecision = 0; | |
1166 | s->timer = qemu_new_timer(vm_clock, tsc210x_timer_tick, s); | |
1167 | s->pint = penirq; | |
1168 | s->kbint = kbirq; | |
1169 | s->davint = dav; | |
1170 | s->model = 0x2301; | |
1171 | s->name = "tsc2301"; | |
22d83b14 | 1172 | s->audio = AUD_init(); |
a5d7eb65 AZ |
1173 | |
1174 | s->tr[0] = 0; | |
1175 | s->tr[1] = 1; | |
e927bb00 AZ |
1176 | s->tr[2] = 1; |
1177 | s->tr[3] = 0; | |
a5d7eb65 AZ |
1178 | s->tr[4] = 1; |
1179 | s->tr[5] = 0; | |
e927bb00 AZ |
1180 | s->tr[6] = 1; |
1181 | s->tr[7] = 0; | |
a5d7eb65 AZ |
1182 | |
1183 | s->chip.opaque = s; | |
1184 | s->chip.send = (void *) tsc210x_write; | |
1185 | s->chip.receive = (void *) tsc210x_read; | |
1186 | ||
1187 | s->codec.opaque = s; | |
1188 | s->codec.tx_swallow = (void *) tsc210x_i2s_swallow; | |
1189 | s->codec.set_rate = (void *) tsc210x_i2s_set_rate; | |
1190 | s->codec.in.fifo = s->in_fifo; | |
1191 | s->codec.out.fifo = s->out_fifo; | |
1192 | ||
1193 | tsc210x_reset(s); | |
1194 | ||
1195 | qemu_add_mouse_event_handler(tsc210x_touchscreen_event, s, 1, | |
1196 | "QEMU TSC2301-driven Touchscreen"); | |
1197 | ||
22d83b14 | 1198 | AUD_register_card(s->audio, s->name, &s->card); |
a5d7eb65 AZ |
1199 | |
1200 | qemu_register_reset((void *) tsc210x_reset, s); | |
18be5187 | 1201 | register_savevm(s->name, -1, 0, tsc210x_save, tsc210x_load, s); |
a5d7eb65 AZ |
1202 | |
1203 | return &s->chip; | |
1204 | } | |
1205 | ||
bc24a225 | 1206 | I2SCodec *tsc210x_codec(uWireSlave *chip) |
d8f699cb | 1207 | { |
bc24a225 | 1208 | TSC210xState *s = (TSC210xState *) chip->opaque; |
d8f699cb AZ |
1209 | |
1210 | return &s->codec; | |
1211 | } | |
a5d7eb65 AZ |
1212 | |
1213 | /* | |
1214 | * Use tslib generated calibration data to generate ADC input values | |
1215 | * from the touchscreen. Assuming 12-bit precision was used during | |
1216 | * tslib calibration. | |
1217 | */ | |
bc24a225 PB |
1218 | void tsc210x_set_transform(uWireSlave *chip, |
1219 | MouseTransformInfo *info) | |
a5d7eb65 | 1220 | { |
bc24a225 | 1221 | TSC210xState *s = (TSC210xState *) chip->opaque; |
a5d7eb65 AZ |
1222 | #if 0 |
1223 | int64_t ltr[8]; | |
1224 | ||
1225 | ltr[0] = (int64_t) info->a[1] * info->y; | |
1226 | ltr[1] = (int64_t) info->a[4] * info->x; | |
1227 | ltr[2] = (int64_t) info->a[1] * info->a[3] - | |
1228 | (int64_t) info->a[4] * info->a[0]; | |
1229 | ltr[3] = (int64_t) info->a[2] * info->a[4] - | |
1230 | (int64_t) info->a[5] * info->a[1]; | |
1231 | ltr[4] = (int64_t) info->a[0] * info->y; | |
1232 | ltr[5] = (int64_t) info->a[3] * info->x; | |
1233 | ltr[6] = (int64_t) info->a[4] * info->a[0] - | |
1234 | (int64_t) info->a[1] * info->a[3]; | |
1235 | ltr[7] = (int64_t) info->a[2] * info->a[3] - | |
1236 | (int64_t) info->a[5] * info->a[0]; | |
1237 | ||
1238 | /* Avoid integer overflow */ | |
1239 | s->tr[0] = ltr[0] >> 11; | |
1240 | s->tr[1] = ltr[1] >> 11; | |
1241 | s->tr[2] = muldiv64(ltr[2], 1, info->a[6]); | |
1242 | s->tr[3] = muldiv64(ltr[3], 1 << 4, ltr[2]); | |
1243 | s->tr[4] = ltr[4] >> 11; | |
1244 | s->tr[5] = ltr[5] >> 11; | |
1245 | s->tr[6] = muldiv64(ltr[6], 1, info->a[6]); | |
1246 | s->tr[7] = muldiv64(ltr[7], 1 << 4, ltr[6]); | |
1247 | #else | |
1248 | ||
1249 | /* This version assumes touchscreen X & Y axis are parallel or | |
1250 | * perpendicular to LCD's X & Y axis in some way. */ | |
1251 | if (abs(info->a[0]) > abs(info->a[1])) { | |
1252 | s->tr[0] = 0; | |
1253 | s->tr[1] = -info->a[6] * info->x; | |
1254 | s->tr[2] = info->a[0]; | |
1255 | s->tr[3] = -info->a[2] / info->a[0]; | |
1256 | s->tr[4] = info->a[6] * info->y; | |
1257 | s->tr[5] = 0; | |
1258 | s->tr[6] = info->a[4]; | |
1259 | s->tr[7] = -info->a[5] / info->a[4]; | |
1260 | } else { | |
1261 | s->tr[0] = info->a[6] * info->y; | |
1262 | s->tr[1] = 0; | |
1263 | s->tr[2] = info->a[1]; | |
1264 | s->tr[3] = -info->a[2] / info->a[1]; | |
1265 | s->tr[4] = 0; | |
1266 | s->tr[5] = -info->a[6] * info->x; | |
1267 | s->tr[6] = info->a[3]; | |
1268 | s->tr[7] = -info->a[5] / info->a[3]; | |
1269 | } | |
1270 | ||
1271 | s->tr[0] >>= 11; | |
1272 | s->tr[1] >>= 11; | |
1273 | s->tr[3] <<= 4; | |
1274 | s->tr[4] >>= 11; | |
1275 | s->tr[5] >>= 11; | |
1276 | s->tr[7] <<= 4; | |
1277 | #endif | |
1278 | } | |
1279 | ||
bc24a225 | 1280 | void tsc210x_key_event(uWireSlave *chip, int key, int down) |
a5d7eb65 | 1281 | { |
bc24a225 | 1282 | TSC210xState *s = (TSC210xState *) chip->opaque; |
a5d7eb65 AZ |
1283 | |
1284 | if (down) | |
1285 | s->kb.down |= 1 << key; | |
1286 | else | |
1287 | s->kb.down &= ~(1 << key); | |
1288 | ||
1289 | if (down && (s->kb.down & ~s->kb.mask) && !s->kb.intr) { | |
1290 | s->kb.intr = 1; | |
1291 | qemu_irq_lower(s->kbint); | |
1292 | } else if (s->kb.intr && !(s->kb.down & ~s->kb.mask) && | |
1293 | !(s->kb.mode & 1)) { | |
1294 | s->kb.intr = 0; | |
1295 | qemu_irq_raise(s->kbint); | |
1296 | } | |
1297 | } |