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omap: switch omap_lpg to vm_clock
[qemu.git] / hw / twl92230.c
CommitLineData
7e7c5e4c
AZ		 1/*
2 * TI TWL92230C energy-management companion device for the OMAP24xx.
3 * Aka. Menelaus (N4200 MENELAUS1_V2.2)
4 *
5 * Copyright (C) 2008 Nokia Corporation
6 * Written by Andrzej Zaborowski <andrew@openedhand.com>
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 or
11 * (at your option) version 3 of the License.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
fad6cb1a 18 * You should have received a copy of the GNU General Public License along
8167ee88 19 * with this program; if not, see <http://www.gnu.org/licenses/>.
7e7c5e4c
AZ		 20 */
21
22#include "hw.h"
23#include "qemu-timer.h"
24#include "i2c.h"
7e7c5e4c
AZ		 25#include "console.h"
26
27#define VERBOSE 1
28
bc24a225 29typedef struct {
9e07bdf8 30 I2CSlave i2c;
7e7c5e4c
AZ		 31
32 int firstbyte;
33 uint8_t reg;
34
35 uint8_t vcore[5];
36 uint8_t dcdc[3];
37 uint8_t ldo[8];
38 uint8_t sleep[2];
39 uint8_t osc;
40 uint8_t detect;
41 uint16_t mask;
42 uint16_t status;
43 uint8_t dir;
44 uint8_t inputs;
45 uint8_t outputs;
46 uint8_t bbsms;
47 uint8_t pull[4];
48 uint8_t mmc_ctrl[3];
49 uint8_t mmc_debounce;
50 struct {
51 uint8_t ctrl;
52 uint16_t comp;
b0f74c87 53 QEMUTimer *hz_tm;
7e7c5e4c
AZ		 54 int64_t next;
55 struct tm tm;
56 struct tm new;
57 struct tm alm;
aec454d2
AZ		 58 int sec_offset;
59 int alm_sec;
60 int next_comp;
7e7c5e4c 61 } rtc;
f0495f56 62 uint16_t rtc_next_vmstate;
d3356811 63 qemu_irq out[4];
b53d44e5 64 uint8_t pwrbtn_state;
bc24a225 65} MenelausState;
7e7c5e4c 66
bc24a225 67static inline void menelaus_update(MenelausState *s)
7e7c5e4c 68{
d3356811 69 qemu_set_irq(s->out[3], s->status & ~s->mask);
7e7c5e4c
AZ		 70}
71
bc24a225 72static inline void menelaus_rtc_start(MenelausState *s)
7e7c5e4c 73{
7bd427d8 74 s->rtc.next += qemu_get_clock_ms(rt_clock);
b0f74c87 75 qemu_mod_timer(s->rtc.hz_tm, s->rtc.next);
7e7c5e4c
AZ		 76}
77
bc24a225 78static inline void menelaus_rtc_stop(MenelausState *s)
7e7c5e4c 79{
b0f74c87 80 qemu_del_timer(s->rtc.hz_tm);
7bd427d8 81 s->rtc.next -= qemu_get_clock_ms(rt_clock);
7e7c5e4c
AZ		 82 if (s->rtc.next < 1)
83 s->rtc.next = 1;
84}
85
bc24a225 86static void menelaus_rtc_update(MenelausState *s)
7e7c5e4c 87{
aec454d2 88 qemu_get_timedate(&s->rtc.tm, s->rtc.sec_offset);
7e7c5e4c
AZ		 89}
90
bc24a225 91static void menelaus_alm_update(MenelausState *s)
7e7c5e4c
AZ		 92{
93 if ((s->rtc.ctrl & 3) == 3)
aec454d2 94 s->rtc.alm_sec = qemu_timedate_diff(&s->rtc.alm) - s->rtc.sec_offset;
7e7c5e4c
AZ		 95}
96
97static void menelaus_rtc_hz(void *opaque)
98{
bc24a225 99 MenelausState *s = (MenelausState *) opaque;
7e7c5e4c 100
aec454d2
AZ		 101 s->rtc.next_comp --;
102 s->rtc.alm_sec --;
7e7c5e4c 103 s->rtc.next += 1000;
b0f74c87 104 qemu_mod_timer(s->rtc.hz_tm, s->rtc.next);
7e7c5e4c
AZ		 105 if ((s->rtc.ctrl >> 3) & 3) { /* EVERY */
106 menelaus_rtc_update(s);
107 if (((s->rtc.ctrl >> 3) & 3) == 1 && !s->rtc.tm.tm_sec)
108 s->status |= 1 << 8; /* RTCTMR */
109 else if (((s->rtc.ctrl >> 3) & 3) == 2 && !s->rtc.tm.tm_min)
110 s->status |= 1 << 8; /* RTCTMR */
111 else if (!s->rtc.tm.tm_hour)
112 s->status |= 1 << 8; /* RTCTMR */
113 } else
114 s->status |= 1 << 8; /* RTCTMR */
115 if ((s->rtc.ctrl >> 1) & 1) { /* RTC_AL_EN */
aec454d2 116 if (s->rtc.alm_sec == 0)
7e7c5e4c
AZ		 117 s->status |= 1 << 9; /* RTCALM */
118 /* TODO: wake-up */
119 }
aec454d2 120 if (s->rtc.next_comp <= 0) {
7e7c5e4c 121 s->rtc.next -= muldiv64((int16_t) s->rtc.comp, 1000, 0x8000);
aec454d2 122 s->rtc.next_comp = 3600;
7e7c5e4c
AZ		 123 }
124 menelaus_update(s);
125}
126
9e07bdf8 127static void menelaus_reset(I2CSlave *i2c)
7e7c5e4c 128{
bc24a225 129 MenelausState *s = (MenelausState *) i2c;
7e7c5e4c
AZ		 130 s->reg = 0x00;
131
132 s->vcore[0] = 0x0c; /* XXX: X-loader needs 0x8c? check! */
133 s->vcore[1] = 0x05;
134 s->vcore[2] = 0x02;
135 s->vcore[3] = 0x0c;
136 s->vcore[4] = 0x03;
137 s->dcdc[0] = 0x33; /* Depends on wiring */
138 s->dcdc[1] = 0x03;
139 s->dcdc[2] = 0x00;
140 s->ldo[0] = 0x95;
141 s->ldo[1] = 0x7e;
142 s->ldo[2] = 0x00;
143 s->ldo[3] = 0x00; /* Depends on wiring */
144 s->ldo[4] = 0x03; /* Depends on wiring */
145 s->ldo[5] = 0x00;
146 s->ldo[6] = 0x00;
147 s->ldo[7] = 0x00;
148 s->sleep[0] = 0x00;
149 s->sleep[1] = 0x00;
150 s->osc = 0x01;
151 s->detect = 0x09;
152 s->mask = 0x0fff;
153 s->status = 0;
154 s->dir = 0x07;
155 s->outputs = 0x00;
156 s->bbsms = 0x00;
157 s->pull[0] = 0x00;
158 s->pull[1] = 0x00;
159 s->pull[2] = 0x00;
160 s->pull[3] = 0x00;
161 s->mmc_ctrl[0] = 0x03;
162 s->mmc_ctrl[1] = 0xc0;
163 s->mmc_ctrl[2] = 0x00;
164 s->mmc_debounce = 0x05;
165
7e7c5e4c
AZ		 166 if (s->rtc.ctrl & 1)
167 menelaus_rtc_stop(s);
168 s->rtc.ctrl = 0x00;
169 s->rtc.comp = 0x0000;
170 s->rtc.next = 1000;
aec454d2
AZ		 171 s->rtc.sec_offset = 0;
172 s->rtc.next_comp = 1800;
173 s->rtc.alm_sec = 1800;
7e7c5e4c
AZ		 174 s->rtc.alm.tm_sec = 0x00;
175 s->rtc.alm.tm_min = 0x00;
176 s->rtc.alm.tm_hour = 0x00;
177 s->rtc.alm.tm_mday = 0x01;
178 s->rtc.alm.tm_mon = 0x00;
179 s->rtc.alm.tm_year = 2004;
180 menelaus_update(s);
181}
182
7e7c5e4c
AZ		 183static void menelaus_gpio_set(void *opaque, int line, int level)
184{
bc24a225 185 MenelausState *s = (MenelausState *) opaque;
7e7c5e4c 186
dd4427a6
PB		 187 if (line < 3) {
188 /* No interrupt generated */
189 s->inputs &= ~(1 << line);
190 s->inputs |= level << line;
191 return;
192 }
7e7c5e4c
AZ		 193
194 if (!s->pwrbtn_state && level) {
195 s->status |= 1 << 11; /* PSHBTN */
196 menelaus_update(s);
197 }
198 s->pwrbtn_state = level;
199}
200
201#define MENELAUS_REV 0x01
202#define MENELAUS_VCORE_CTRL1 0x02
203#define MENELAUS_VCORE_CTRL2 0x03
204#define MENELAUS_VCORE_CTRL3 0x04
205#define MENELAUS_VCORE_CTRL4 0x05
206#define MENELAUS_VCORE_CTRL5 0x06
207#define MENELAUS_DCDC_CTRL1 0x07
208#define MENELAUS_DCDC_CTRL2 0x08
209#define MENELAUS_DCDC_CTRL3 0x09
210#define MENELAUS_LDO_CTRL1 0x0a
211#define MENELAUS_LDO_CTRL2 0x0b
212#define MENELAUS_LDO_CTRL3 0x0c
213#define MENELAUS_LDO_CTRL4 0x0d
214#define MENELAUS_LDO_CTRL5 0x0e
215#define MENELAUS_LDO_CTRL6 0x0f
216#define MENELAUS_LDO_CTRL7 0x10
217#define MENELAUS_LDO_CTRL8 0x11
218#define MENELAUS_SLEEP_CTRL1 0x12
219#define MENELAUS_SLEEP_CTRL2 0x13
220#define MENELAUS_DEVICE_OFF 0x14
221#define MENELAUS_OSC_CTRL 0x15
222#define MENELAUS_DETECT_CTRL 0x16
223#define MENELAUS_INT_MASK1 0x17
224#define MENELAUS_INT_MASK2 0x18
225#define MENELAUS_INT_STATUS1 0x19
226#define MENELAUS_INT_STATUS2 0x1a
227#define MENELAUS_INT_ACK1 0x1b
228#define MENELAUS_INT_ACK2 0x1c
229#define MENELAUS_GPIO_CTRL 0x1d
230#define MENELAUS_GPIO_IN 0x1e
231#define MENELAUS_GPIO_OUT 0x1f
232#define MENELAUS_BBSMS 0x20
233#define MENELAUS_RTC_CTRL 0x21
234#define MENELAUS_RTC_UPDATE 0x22
235#define MENELAUS_RTC_SEC 0x23
236#define MENELAUS_RTC_MIN 0x24
237#define MENELAUS_RTC_HR 0x25
238#define MENELAUS_RTC_DAY 0x26
239#define MENELAUS_RTC_MON 0x27
240#define MENELAUS_RTC_YR 0x28
241#define MENELAUS_RTC_WKDAY 0x29
242#define MENELAUS_RTC_AL_SEC 0x2a
243#define MENELAUS_RTC_AL_MIN 0x2b
244#define MENELAUS_RTC_AL_HR 0x2c
245#define MENELAUS_RTC_AL_DAY 0x2d
246#define MENELAUS_RTC_AL_MON 0x2e
247#define MENELAUS_RTC_AL_YR 0x2f
248#define MENELAUS_RTC_COMP_MSB 0x30
249#define MENELAUS_RTC_COMP_LSB 0x31
250#define MENELAUS_S1_PULL_EN 0x32
251#define MENELAUS_S1_PULL_DIR 0x33
252#define MENELAUS_S2_PULL_EN 0x34
253#define MENELAUS_S2_PULL_DIR 0x35
254#define MENELAUS_MCT_CTRL1 0x36
255#define MENELAUS_MCT_CTRL2 0x37
256#define MENELAUS_MCT_CTRL3 0x38
257#define MENELAUS_MCT_PIN_ST 0x39
258#define MENELAUS_DEBOUNCE1 0x3a
259
260static uint8_t menelaus_read(void *opaque, uint8_t addr)
261{
bc24a225 262 MenelausState *s = (MenelausState *) opaque;
7e7c5e4c
AZ		 263 int reg = 0;
264
265 switch (addr) {
266 case MENELAUS_REV:
267 return 0x22;
268
269 case MENELAUS_VCORE_CTRL5: reg ++;
270 case MENELAUS_VCORE_CTRL4: reg ++;
271 case MENELAUS_VCORE_CTRL3: reg ++;
272 case MENELAUS_VCORE_CTRL2: reg ++;
273 case MENELAUS_VCORE_CTRL1:
274 return s->vcore[reg];
275
276 case MENELAUS_DCDC_CTRL3: reg ++;
277 case MENELAUS_DCDC_CTRL2: reg ++;
278 case MENELAUS_DCDC_CTRL1:
279 return s->dcdc[reg];
280
281 case MENELAUS_LDO_CTRL8: reg ++;
282 case MENELAUS_LDO_CTRL7: reg ++;
283 case MENELAUS_LDO_CTRL6: reg ++;
284 case MENELAUS_LDO_CTRL5: reg ++;
285 case MENELAUS_LDO_CTRL4: reg ++;
286 case MENELAUS_LDO_CTRL3: reg ++;
287 case MENELAUS_LDO_CTRL2: reg ++;
288 case MENELAUS_LDO_CTRL1:
289 return s->ldo[reg];
290
291 case MENELAUS_SLEEP_CTRL2: reg ++;
292 case MENELAUS_SLEEP_CTRL1:
293 return s->sleep[reg];
294
295 case MENELAUS_DEVICE_OFF:
296 return 0;
297
298 case MENELAUS_OSC_CTRL:
299 return s->osc | (1 << 7); /* CLK32K_GOOD */
300
301 case MENELAUS_DETECT_CTRL:
302 return s->detect;
303
304 case MENELAUS_INT_MASK1:
305 return (s->mask >> 0) & 0xff;
306 case MENELAUS_INT_MASK2:
307 return (s->mask >> 8) & 0xff;
308
309 case MENELAUS_INT_STATUS1:
310 return (s->status >> 0) & 0xff;
311 case MENELAUS_INT_STATUS2:
312 return (s->status >> 8) & 0xff;
313
314 case MENELAUS_INT_ACK1:
315 case MENELAUS_INT_ACK2:
316 return 0;
317
318 case MENELAUS_GPIO_CTRL:
319 return s->dir;
320 case MENELAUS_GPIO_IN:
321 return s->inputs | (~s->dir & s->outputs);
322 case MENELAUS_GPIO_OUT:
323 return s->outputs;
324
325 case MENELAUS_BBSMS:
326 return s->bbsms;
327
328 case MENELAUS_RTC_CTRL:
329 return s->rtc.ctrl;
330 case MENELAUS_RTC_UPDATE:
331 return 0x00;
332 case MENELAUS_RTC_SEC:
333 menelaus_rtc_update(s);
334 return to_bcd(s->rtc.tm.tm_sec);
335 case MENELAUS_RTC_MIN:
336 menelaus_rtc_update(s);
337 return to_bcd(s->rtc.tm.tm_min);
338 case MENELAUS_RTC_HR:
339 menelaus_rtc_update(s);
340 if ((s->rtc.ctrl >> 2) & 1) /* MODE12_n24 */
341 return to_bcd((s->rtc.tm.tm_hour % 12) + 1) |
342 (!!(s->rtc.tm.tm_hour >= 12) << 7); /* PM_nAM */
343 else
344 return to_bcd(s->rtc.tm.tm_hour);
345 case MENELAUS_RTC_DAY:
346 menelaus_rtc_update(s);
347 return to_bcd(s->rtc.tm.tm_mday);
348 case MENELAUS_RTC_MON:
349 menelaus_rtc_update(s);
350 return to_bcd(s->rtc.tm.tm_mon + 1);
351 case MENELAUS_RTC_YR:
352 menelaus_rtc_update(s);
353 return to_bcd(s->rtc.tm.tm_year - 2000);
354 case MENELAUS_RTC_WKDAY:
355 menelaus_rtc_update(s);
356 return to_bcd(s->rtc.tm.tm_wday);
357 case MENELAUS_RTC_AL_SEC:
358 return to_bcd(s->rtc.alm.tm_sec);
359 case MENELAUS_RTC_AL_MIN:
360 return to_bcd(s->rtc.alm.tm_min);
361 case MENELAUS_RTC_AL_HR:
362 if ((s->rtc.ctrl >> 2) & 1) /* MODE12_n24 */
363 return to_bcd((s->rtc.alm.tm_hour % 12) + 1) |
364 (!!(s->rtc.alm.tm_hour >= 12) << 7);/* AL_PM_nAM */
365 else
366 return to_bcd(s->rtc.alm.tm_hour);
367 case MENELAUS_RTC_AL_DAY:
368 return to_bcd(s->rtc.alm.tm_mday);
369 case MENELAUS_RTC_AL_MON:
370 return to_bcd(s->rtc.alm.tm_mon + 1);
371 case MENELAUS_RTC_AL_YR:
372 return to_bcd(s->rtc.alm.tm_year - 2000);
373 case MENELAUS_RTC_COMP_MSB:
374 return (s->rtc.comp >> 8) & 0xff;
375 case MENELAUS_RTC_COMP_LSB:
376 return (s->rtc.comp >> 0) & 0xff;
377
378 case MENELAUS_S1_PULL_EN:
379 return s->pull[0];
380 case MENELAUS_S1_PULL_DIR:
381 return s->pull[1];
382 case MENELAUS_S2_PULL_EN:
383 return s->pull[2];
384 case MENELAUS_S2_PULL_DIR:
385 return s->pull[3];
386
387 case MENELAUS_MCT_CTRL3: reg ++;
388 case MENELAUS_MCT_CTRL2: reg ++;
389 case MENELAUS_MCT_CTRL1:
390 return s->mmc_ctrl[reg];
391 case MENELAUS_MCT_PIN_ST:
392 /* TODO: return the real Card Detect */
393 return 0;
394 case MENELAUS_DEBOUNCE1:
395 return s->mmc_debounce;
396
397 default:
398#ifdef VERBOSE
399 printf("%s: unknown register %02x\n", __FUNCTION__, addr);
400#endif
401 break;
402 }
403 return 0;
404}
405
406static void menelaus_write(void *opaque, uint8_t addr, uint8_t value)
407{
bc24a225 408 MenelausState *s = (MenelausState *) opaque;
7e7c5e4c
AZ		 409 int line;
410 int reg = 0;
411 struct tm tm;
412
413 switch (addr) {
414 case MENELAUS_VCORE_CTRL1:
415 s->vcore[0] = (value & 0xe) | MIN(value & 0x1f, 0x12);
416 break;
417 case MENELAUS_VCORE_CTRL2:
418 s->vcore[1] = value;
419 break;
420 case MENELAUS_VCORE_CTRL3:
421 s->vcore[2] = MIN(value & 0x1f, 0x12);
422 break;
423 case MENELAUS_VCORE_CTRL4:
424 s->vcore[3] = MIN(value & 0x1f, 0x12);
425 break;
426 case MENELAUS_VCORE_CTRL5:
427 s->vcore[4] = value & 3;
428 /* XXX
429 * auto set to 3 on M_Active, nRESWARM
430 * auto set to 0 on M_WaitOn, M_Backup
431 */
432 break;
433
434 case MENELAUS_DCDC_CTRL1:
435 s->dcdc[0] = value & 0x3f;
436 break;
437 case MENELAUS_DCDC_CTRL2:
438 s->dcdc[1] = value & 0x07;
439 /* XXX
440 * auto set to 3 on M_Active, nRESWARM
441 * auto set to 0 on M_WaitOn, M_Backup
442 */
443 break;
444 case MENELAUS_DCDC_CTRL3:
445 s->dcdc[2] = value & 0x07;
446 break;
447
448 case MENELAUS_LDO_CTRL1:
449 s->ldo[0] = value;
450 break;
451 case MENELAUS_LDO_CTRL2:
452 s->ldo[1] = value & 0x7f;
453 /* XXX
454 * auto set to 0x7e on M_WaitOn, M_Backup
455 */
456 break;
457 case MENELAUS_LDO_CTRL3:
458 s->ldo[2] = value & 3;
459 /* XXX
460 * auto set to 3 on M_Active, nRESWARM
461 * auto set to 0 on M_WaitOn, M_Backup
462 */
463 break;
464 case MENELAUS_LDO_CTRL4:
465 s->ldo[3] = value & 3;
466 /* XXX
467 * auto set to 3 on M_Active, nRESWARM
468 * auto set to 0 on M_WaitOn, M_Backup
469 */
470 break;
471 case MENELAUS_LDO_CTRL5:
472 s->ldo[4] = value & 3;
473 /* XXX
474 * auto set to 3 on M_Active, nRESWARM
475 * auto set to 0 on M_WaitOn, M_Backup
476 */
477 break;
478 case MENELAUS_LDO_CTRL6:
479 s->ldo[5] = value & 3;
480 break;
481 case MENELAUS_LDO_CTRL7:
482 s->ldo[6] = value & 3;
483 break;
484 case MENELAUS_LDO_CTRL8:
485 s->ldo[7] = value & 3;
486 break;
487
488 case MENELAUS_SLEEP_CTRL2: reg ++;
489 case MENELAUS_SLEEP_CTRL1:
490 s->sleep[reg] = value;
491 break;
492
493 case MENELAUS_DEVICE_OFF:
494 if (value & 1)
495 menelaus_reset(&s->i2c);
496 break;
497
498 case MENELAUS_OSC_CTRL:
499 s->osc = value & 7;
500 break;
501
502 case MENELAUS_DETECT_CTRL:
503 s->detect = value & 0x7f;
504 break;
505
506 case MENELAUS_INT_MASK1:
507 s->mask &= 0xf00;
508 s->mask |= value << 0;
509 menelaus_update(s);
510 break;
511 case MENELAUS_INT_MASK2:
512 s->mask &= 0x0ff;
513 s->mask |= value << 8;
514 menelaus_update(s);
515 break;
516
517 case MENELAUS_INT_ACK1:
518 s->status &= ~(((uint16_t) value) << 0);
519 menelaus_update(s);
520 break;
521 case MENELAUS_INT_ACK2:
522 s->status &= ~(((uint16_t) value) << 8);
523 menelaus_update(s);
524 break;
525
526 case MENELAUS_GPIO_CTRL:
d3356811
PB		 527 for (line = 0; line < 3; line ++) {
528 if (((s->dir ^ value) >> line) & 1) {
529 qemu_set_irq(s->out[line],
530 ((s->outputs & ~s->dir) >> line) & 1);
531 }
532 }
7e7c5e4c
AZ		 533 s->dir = value & 0x67;
534 break;
535 case MENELAUS_GPIO_OUT:
d3356811
PB		 536 for (line = 0; line < 3; line ++) {
537 if ((((s->outputs ^ value) & ~s->dir) >> line) & 1) {
538 qemu_set_irq(s->out[line], (s->outputs >> line) & 1);
539 }
540 }
7e7c5e4c
AZ		 541 s->outputs = value & 0x07;
542 break;
543
544 case MENELAUS_BBSMS:
545 s->bbsms = 0x0d;
546 break;
547
548 case MENELAUS_RTC_CTRL:
549 if ((s->rtc.ctrl ^ value) & 1) { /* RTC_EN */
550 if (value & 1)
551 menelaus_rtc_start(s);
552 else
553 menelaus_rtc_stop(s);
554 }
555 s->rtc.ctrl = value & 0x1f;
556 menelaus_alm_update(s);
557 break;
558 case MENELAUS_RTC_UPDATE:
559 menelaus_rtc_update(s);
560 memcpy(&tm, &s->rtc.tm, sizeof(tm));
561 switch (value & 0xf) {
562 case 0:
563 break;
564 case 1:
565 tm.tm_sec = s->rtc.new.tm_sec;
566 break;
567 case 2:
568 tm.tm_min = s->rtc.new.tm_min;
569 break;
570 case 3:
571 if (s->rtc.new.tm_hour > 23)
572 goto rtc_badness;
573 tm.tm_hour = s->rtc.new.tm_hour;
574 break;
575 case 4:
576 if (s->rtc.new.tm_mday < 1)
577 goto rtc_badness;
578 /* TODO check range */
579 tm.tm_mday = s->rtc.new.tm_mday;
580 break;
581 case 5:
582 if (s->rtc.new.tm_mon < 0 || s->rtc.new.tm_mon > 11)
583 goto rtc_badness;
584 tm.tm_mon = s->rtc.new.tm_mon;
585 break;
586 case 6:
587 tm.tm_year = s->rtc.new.tm_year;
588 break;
589 case 7:
590 /* TODO set .tm_mday instead */
591 tm.tm_wday = s->rtc.new.tm_wday;
592 break;
593 case 8:
594 if (s->rtc.new.tm_hour > 23)
595 goto rtc_badness;
596 if (s->rtc.new.tm_mday < 1)
597 goto rtc_badness;
598 if (s->rtc.new.tm_mon < 0 || s->rtc.new.tm_mon > 11)
599 goto rtc_badness;
600 tm.tm_sec = s->rtc.new.tm_sec;
601 tm.tm_min = s->rtc.new.tm_min;
602 tm.tm_hour = s->rtc.new.tm_hour;
603 tm.tm_mday = s->rtc.new.tm_mday;
604 tm.tm_mon = s->rtc.new.tm_mon;
605 tm.tm_year = s->rtc.new.tm_year;
606 break;
607 rtc_badness:
608 default:
609 fprintf(stderr, "%s: bad RTC_UPDATE value %02x\n",
610 __FUNCTION__, value);
611 s->status |= 1 << 10; /* RTCERR */
612 menelaus_update(s);
613 }
aec454d2 614 s->rtc.sec_offset = qemu_timedate_diff(&tm);
7e7c5e4c
AZ		 615 break;
616 case MENELAUS_RTC_SEC:
617 s->rtc.tm.tm_sec = from_bcd(value & 0x7f);
618 break;
619 case MENELAUS_RTC_MIN:
620 s->rtc.tm.tm_min = from_bcd(value & 0x7f);
621 break;
622 case MENELAUS_RTC_HR:
623 s->rtc.tm.tm_hour = (s->rtc.ctrl & (1 << 2)) ? /* MODE12_n24 */
624 MIN(from_bcd(value & 0x3f), 12) + ((value >> 7) ? 11 : -1) :
625 from_bcd(value & 0x3f);
626 break;
627 case MENELAUS_RTC_DAY:
628 s->rtc.tm.tm_mday = from_bcd(value);
629 break;
630 case MENELAUS_RTC_MON:
631 s->rtc.tm.tm_mon = MAX(1, from_bcd(value)) - 1;
632 break;
633 case MENELAUS_RTC_YR:
634 s->rtc.tm.tm_year = 2000 + from_bcd(value);
635 break;
636 case MENELAUS_RTC_WKDAY:
637 s->rtc.tm.tm_mday = from_bcd(value);
638 break;
639 case MENELAUS_RTC_AL_SEC:
640 s->rtc.alm.tm_sec = from_bcd(value & 0x7f);
641 menelaus_alm_update(s);
642 break;
643 case MENELAUS_RTC_AL_MIN:
644 s->rtc.alm.tm_min = from_bcd(value & 0x7f);
645 menelaus_alm_update(s);
646 break;
647 case MENELAUS_RTC_AL_HR:
648 s->rtc.alm.tm_hour = (s->rtc.ctrl & (1 << 2)) ? /* MODE12_n24 */
649 MIN(from_bcd(value & 0x3f), 12) + ((value >> 7) ? 11 : -1) :
650 from_bcd(value & 0x3f);
651 menelaus_alm_update(s);
652 break;
653 case MENELAUS_RTC_AL_DAY:
654 s->rtc.alm.tm_mday = from_bcd(value);
655 menelaus_alm_update(s);
656 break;
657 case MENELAUS_RTC_AL_MON:
658 s->rtc.alm.tm_mon = MAX(1, from_bcd(value)) - 1;
659 menelaus_alm_update(s);
660 break;
661 case MENELAUS_RTC_AL_YR:
662 s->rtc.alm.tm_year = 2000 + from_bcd(value);
663 menelaus_alm_update(s);
664 break;
665 case MENELAUS_RTC_COMP_MSB:
666 s->rtc.comp &= 0xff;
667 s->rtc.comp |= value << 8;
668 break;
669 case MENELAUS_RTC_COMP_LSB:
670 s->rtc.comp &= 0xff << 8;
671 s->rtc.comp |= value;
672 break;
673
674 case MENELAUS_S1_PULL_EN:
675 s->pull[0] = value;
676 break;
677 case MENELAUS_S1_PULL_DIR:
678 s->pull[1] = value & 0x1f;
679 break;
680 case MENELAUS_S2_PULL_EN:
681 s->pull[2] = value;
682 break;
683 case MENELAUS_S2_PULL_DIR:
684 s->pull[3] = value & 0x1f;
685 break;
686
687 case MENELAUS_MCT_CTRL1:
688 s->mmc_ctrl[0] = value & 0x7f;
689 break;
690 case MENELAUS_MCT_CTRL2:
691 s->mmc_ctrl[1] = value;
692 /* TODO update Card Detect interrupts */
693 break;
694 case MENELAUS_MCT_CTRL3:
695 s->mmc_ctrl[2] = value & 0xf;
696 break;
697 case MENELAUS_DEBOUNCE1:
698 s->mmc_debounce = value & 0x3f;
699 break;
700
701 default:
702#ifdef VERBOSE
703 printf("%s: unknown register %02x\n", __FUNCTION__, addr);
704#endif
705 }
706}
707
9e07bdf8 708static void menelaus_event(I2CSlave *i2c, enum i2c_event event)
7e7c5e4c 709{
bc24a225 710 MenelausState *s = (MenelausState *) i2c;
7e7c5e4c
AZ		 711
712 if (event == I2C_START_SEND)
713 s->firstbyte = 1;
714}
715
9e07bdf8 716static int menelaus_tx(I2CSlave *i2c, uint8_t data)
7e7c5e4c 717{
bc24a225 718 MenelausState *s = (MenelausState *) i2c;
7e7c5e4c
AZ		 719 /* Interpret register address byte */
720 if (s->firstbyte) {
721 s->reg = data;
722 s->firstbyte = 0;
723 } else
724 menelaus_write(s, s->reg ++, data);
725
726 return 0;
727}
728
9e07bdf8 729static int menelaus_rx(I2CSlave *i2c)
7e7c5e4c 730{
bc24a225 731 MenelausState *s = (MenelausState *) i2c;
7e7c5e4c
AZ		 732
733 return menelaus_read(s, s->reg ++);
734}
735
f0495f56
JQ		 736/* Save restore 32 bit int as uint16_t
737 This is a Big hack, but it is how the old state did it.
738 Or we broke compatibility in the state, or we can't use struct tm
739 */
7e7c5e4c 740
f0495f56
JQ		 741static int get_int32_as_uint16(QEMUFile *f, void *pv, size_t size)
742{
743 int *v = pv;
744 *v = qemu_get_be16(f);
745 return 0;
7e7c5e4c
AZ		 746}
747
f0495f56 748static void put_int32_as_uint16(QEMUFile *f, void *pv, size_t size)
7e7c5e4c 749{
f0495f56
JQ		 750 int *v = pv;
751 qemu_put_be16(f, *v);
752}
7e7c5e4c 753
d05ac8fa 754static const VMStateInfo vmstate_hack_int32_as_uint16 = {
f0495f56
JQ		 755 .name = "int32_as_uint16",
756 .get = get_int32_as_uint16,
757 .put = put_int32_as_uint16,
758};
7e7c5e4c 759
f0495f56
JQ		 760#define VMSTATE_UINT16_HACK(_f, _s) \
761 VMSTATE_SINGLE(_f, _s, 0, vmstate_hack_int32_as_uint16, int32_t)
762
763
764static const VMStateDescription vmstate_menelaus_tm = {
765 .name = "menelaus_tm",
766 .version_id = 0,
767 .minimum_version_id = 0,
768 .minimum_version_id_old = 0,
769 .fields = (VMStateField []) {
770 VMSTATE_UINT16_HACK(tm_sec, struct tm),
771 VMSTATE_UINT16_HACK(tm_min, struct tm),
772 VMSTATE_UINT16_HACK(tm_hour, struct tm),
773 VMSTATE_UINT16_HACK(tm_mday, struct tm),
774 VMSTATE_UINT16_HACK(tm_min, struct tm),
775 VMSTATE_UINT16_HACK(tm_year, struct tm),
776 VMSTATE_END_OF_LIST()
777 }
778};
7e7c5e4c 779
f0495f56 780static void menelaus_pre_save(void *opaque)
7e7c5e4c 781{
f0495f56
JQ		 782 MenelausState *s = opaque;
783 /* Should be <= 1000 */
7bd427d8 784 s->rtc_next_vmstate = s->rtc.next - qemu_get_clock_ms(rt_clock);
f0495f56 785}
7e7c5e4c 786
f0495f56
JQ		 787static int menelaus_post_load(void *opaque, int version_id)
788{
789 MenelausState *s = opaque;
7e7c5e4c
AZ		 790
791 if (s->rtc.ctrl & 1) /* RTC_EN */
792 menelaus_rtc_stop(s);
f0495f56
JQ		 793
794 s->rtc.next = s->rtc_next_vmstate;
795
7e7c5e4c
AZ		 796 menelaus_alm_update(s);
797 menelaus_update(s);
798 if (s->rtc.ctrl & 1) /* RTC_EN */
799 menelaus_rtc_start(s);
7e7c5e4c
AZ		 800 return 0;
801}
802
f0495f56
JQ		 803static const VMStateDescription vmstate_menelaus = {
804 .name = "menelaus",
805 .version_id = 0,
806 .minimum_version_id = 0,
807 .minimum_version_id_old = 0,
808 .pre_save = menelaus_pre_save,
809 .post_load = menelaus_post_load,
810 .fields = (VMStateField []) {
811 VMSTATE_INT32(firstbyte, MenelausState),
812 VMSTATE_UINT8(reg, MenelausState),
813 VMSTATE_UINT8_ARRAY(vcore, MenelausState, 5),
814 VMSTATE_UINT8_ARRAY(dcdc, MenelausState, 3),
815 VMSTATE_UINT8_ARRAY(ldo, MenelausState, 8),
816 VMSTATE_UINT8_ARRAY(sleep, MenelausState, 2),
817 VMSTATE_UINT8(osc, MenelausState),
818 VMSTATE_UINT8(detect, MenelausState),
819 VMSTATE_UINT16(mask, MenelausState),
820 VMSTATE_UINT16(status, MenelausState),
821 VMSTATE_UINT8(dir, MenelausState),
822 VMSTATE_UINT8(inputs, MenelausState),
823 VMSTATE_UINT8(outputs, MenelausState),
824 VMSTATE_UINT8(bbsms, MenelausState),
825 VMSTATE_UINT8_ARRAY(pull, MenelausState, 4),
826 VMSTATE_UINT8_ARRAY(mmc_ctrl, MenelausState, 3),
827 VMSTATE_UINT8(mmc_debounce, MenelausState),
828 VMSTATE_UINT8(rtc.ctrl, MenelausState),
829 VMSTATE_UINT16(rtc.comp, MenelausState),
830 VMSTATE_UINT16(rtc_next_vmstate, MenelausState),
831 VMSTATE_STRUCT(rtc.new, MenelausState, 0, vmstate_menelaus_tm,
832 struct tm),
833 VMSTATE_STRUCT(rtc.alm, MenelausState, 0, vmstate_menelaus_tm,
834 struct tm),
835 VMSTATE_UINT8(pwrbtn_state, MenelausState),
836 VMSTATE_I2C_SLAVE(i2c, MenelausState),
837 VMSTATE_END_OF_LIST()
838 }
839};
840
9e07bdf8 841static int twl92230_init(I2CSlave *i2c)
7e7c5e4c 842{
d3356811 843 MenelausState *s = FROM_I2C_SLAVE(MenelausState, i2c);
7e7c5e4c 844
7bd427d8 845 s->rtc.hz_tm = qemu_new_timer_ms(rt_clock, menelaus_rtc_hz, s);
d3356811
PB		 846 /* Three output pins plus one interrupt pin. */
847 qdev_init_gpio_out(&i2c->qdev, s->out, 4);
dd4427a6
PB		 848
849 /* Three input pins plus one power-button pin. */
850 qdev_init_gpio_in(&i2c->qdev, menelaus_gpio_set, 4);
7e7c5e4c
AZ		 851
852 menelaus_reset(&s->i2c);
853
81a322d4 854 return 0;
7e7c5e4c
AZ		 855}
856
b5ea9327
AL		 857static void twl92230_class_init(ObjectClass *klass, void *data)
858{
39bffca2 859 DeviceClass *dc = DEVICE_CLASS(klass);
b5ea9327
AL		 860 I2CSlaveClass *sc = I2C_SLAVE_CLASS(klass);
861
862 sc->init = twl92230_init;
863 sc->event = menelaus_event;
864 sc->recv = menelaus_rx;
865 sc->send = menelaus_tx;
39bffca2 866 dc->vmsd = &vmstate_menelaus;
b5ea9327
AL		 867}
868
39bffca2
AL		 869static TypeInfo twl92230_info = {
870 .name = "twl92230",
871 .parent = TYPE_I2C_SLAVE,
872 .instance_size = sizeof(MenelausState),
873 .class_init = twl92230_class_init,
d3356811 874};
7e7c5e4c 875
83f7d43a 876static void twl92230_register_types(void)
7e7c5e4c 877{
39bffca2 878 type_register_static(&twl92230_info);
7e7c5e4c 879}
d3356811 880
83f7d43a 881type_init(twl92230_register_types)
Qemu copy for testing