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[qemu.git] / hw / usb / hcd-ehci-pci.c
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1/*
2 * QEMU USB EHCI Emulation
3 *
4 * This library is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU Lesser General Public
6 * License as published by the Free Software Foundation; either
7 * version 2 of the License, or(at your option) any later version.
8 *
9 * This library is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * Lesser General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, see <http://www.gnu.org/licenses/>.
16 */
17
18#include "hw/usb/hcd-ehci.h"
1de7afc9 19#include "qemu/range.h"
0bf96f94 20
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21typedef struct EHCIPCIInfo {
22 const char *name;
23 uint16_t vendor_id;
24 uint16_t device_id;
25 uint8_t revision;
26} EHCIPCIInfo;
27
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28static int usb_ehci_pci_initfn(PCIDevice *dev)
29{
5aa3ca9f 30 EHCIPCIState *i = PCI_EHCI(dev);
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31 EHCIState *s = &i->ehci;
32 uint8_t *pci_conf = dev->config;
33
34 pci_set_byte(&pci_conf[PCI_CLASS_PROG], 0x20);
35
36 /* capabilities pointer */
37 pci_set_byte(&pci_conf[PCI_CAPABILITY_LIST], 0x00);
38 /* pci_set_byte(&pci_conf[PCI_CAPABILITY_LIST], 0x50); */
39
40 pci_set_byte(&pci_conf[PCI_INTERRUPT_PIN], 4); /* interrupt pin D */
41 pci_set_byte(&pci_conf[PCI_MIN_GNT], 0);
42 pci_set_byte(&pci_conf[PCI_MAX_LAT], 0);
43
44 /* pci_conf[0x50] = 0x01; *//* power management caps */
45
46 pci_set_byte(&pci_conf[USB_SBRN], USB_RELEASE_2); /* release # (2.1.4) */
47 pci_set_byte(&pci_conf[0x61], 0x20); /* frame length adjustment (2.1.5) */
48 pci_set_word(&pci_conf[0x62], 0x00); /* port wake up capability (2.1.6) */
49
50 pci_conf[0x64] = 0x00;
51 pci_conf[0x65] = 0x00;
52 pci_conf[0x66] = 0x00;
53 pci_conf[0x67] = 0x00;
54 pci_conf[0x68] = 0x01;
55 pci_conf[0x69] = 0x00;
56 pci_conf[0x6a] = 0x00;
57 pci_conf[0x6b] = 0x00; /* USBLEGSUP */
58 pci_conf[0x6c] = 0x00;
59 pci_conf[0x6d] = 0x00;
60 pci_conf[0x6e] = 0x00;
61 pci_conf[0x6f] = 0xc0; /* USBLEFCTLSTS */
62
9e64f8a3 63 s->irq = pci_allocate_irq(dev);
df32fd1c 64 s->as = pci_get_address_space(dev);
0bf96f94 65
08f4c90b 66 usb_ehci_realize(s, DEVICE(dev), NULL);
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67 pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->mem);
68
69 return 0;
70}
71
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72static void usb_ehci_pci_init(Object *obj)
73{
74 EHCIPCIState *i = PCI_EHCI(obj);
75 EHCIState *s = &i->ehci;
76
77 s->caps[0x09] = 0x68; /* EECP */
78
79 s->capsbase = 0x00;
80 s->opregbase = 0x20;
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81 s->portscbase = 0x44;
82 s->portnr = NB_PORTS;
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83
84 usb_ehci_init(s, DEVICE(obj));
85}
86
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87static void usb_ehci_pci_write_config(PCIDevice *dev, uint32_t addr,
88 uint32_t val, int l)
89{
5aa3ca9f 90 EHCIPCIState *i = PCI_EHCI(dev);
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91 bool busmaster;
92
93 pci_default_write_config(dev, addr, val, l);
94
95 if (!range_covers_byte(addr, l, PCI_COMMAND)) {
96 return;
97 }
98 busmaster = pci_get_word(dev->config + PCI_COMMAND) & PCI_COMMAND_MASTER;
df32fd1c 99 i->ehci.as = busmaster ? pci_get_address_space(dev) : &address_space_memory;
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100}
101
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102static Property ehci_pci_properties[] = {
103 DEFINE_PROP_UINT32("maxframes", EHCIPCIState, ehci.maxframes, 128),
104 DEFINE_PROP_END_OF_LIST(),
105};
106
107static const VMStateDescription vmstate_ehci_pci = {
108 .name = "ehci",
109 .version_id = 2,
110 .minimum_version_id = 1,
111 .fields = (VMStateField[]) {
112 VMSTATE_PCI_DEVICE(pcidev, EHCIPCIState),
113 VMSTATE_STRUCT(ehci, EHCIPCIState, 2, vmstate_ehci, EHCIState),
9d153047 114 VMSTATE_END_OF_LIST()
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115 }
116};
117
118static void ehci_class_init(ObjectClass *klass, void *data)
119{
120 DeviceClass *dc = DEVICE_CLASS(klass);
121 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
122
123 k->init = usb_ehci_pci_initfn;
0bf96f94 124 k->class_id = PCI_CLASS_SERIAL_USB;
55903f1d 125 k->config_write = usb_ehci_pci_write_config;
6c2d1c32 126 k->no_hotplug = 1;
9d153047 127 dc->vmsd = &vmstate_ehci_pci;
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128 dc->props = ehci_pci_properties;
129}
130
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131static const TypeInfo ehci_pci_type_info = {
132 .name = TYPE_PCI_EHCI,
133 .parent = TYPE_PCI_DEVICE,
134 .instance_size = sizeof(EHCIPCIState),
d4614cc3 135 .instance_init = usb_ehci_pci_init,
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136 .abstract = true,
137 .class_init = ehci_class_init,
138};
139
140static void ehci_data_class_init(ObjectClass *klass, void *data)
141{
142 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
125ee0ed 143 DeviceClass *dc = DEVICE_CLASS(klass);
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144 EHCIPCIInfo *i = data;
145
146 k->vendor_id = i->vendor_id;
147 k->device_id = i->device_id;
148 k->revision = i->revision;
125ee0ed 149 set_bit(DEVICE_CATEGORY_USB, dc->categories);
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150}
151
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152static struct EHCIPCIInfo ehci_pci_info[] = {
153 {
154 .name = "usb-ehci",
155 .vendor_id = PCI_VENDOR_ID_INTEL,
156 .device_id = PCI_DEVICE_ID_INTEL_82801D, /* ich4 */
157 .revision = 0x10,
158 },{
ba07630c 159 .name = "ich9-usb-ehci1", /* 00:1d.7 */
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160 .vendor_id = PCI_VENDOR_ID_INTEL,
161 .device_id = PCI_DEVICE_ID_INTEL_82801I_EHCI1,
162 .revision = 0x03,
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163 },{
164 .name = "ich9-usb-ehci2", /* 00:1a.7 */
165 .vendor_id = PCI_VENDOR_ID_INTEL,
166 .device_id = PCI_DEVICE_ID_INTEL_82801I_EHCI2,
167 .revision = 0x03,
df013187 168 }
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169};
170
171static void ehci_pci_register_types(void)
172{
df013187 173 TypeInfo ehci_type_info = {
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174 .parent = TYPE_PCI_EHCI,
175 .class_init = ehci_data_class_init,
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176 };
177 int i;
178
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179 type_register_static(&ehci_pci_type_info);
180
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181 for (i = 0; i < ARRAY_SIZE(ehci_pci_info); i++) {
182 ehci_type_info.name = ehci_pci_info[i].name;
183 ehci_type_info.class_data = ehci_pci_info + i;
184 type_register(&ehci_type_info);
185 }
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186}
187
188type_init(ehci_pci_register_types)
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189
190struct ehci_companions {
191 const char *name;
192 int func;
193 int port;
194};
195
196static const struct ehci_companions ich9_1d[] = {
197 { .name = "ich9-usb-uhci1", .func = 0, .port = 0 },
198 { .name = "ich9-usb-uhci2", .func = 1, .port = 2 },
199 { .name = "ich9-usb-uhci3", .func = 2, .port = 4 },
200};
201
202static const struct ehci_companions ich9_1a[] = {
203 { .name = "ich9-usb-uhci4", .func = 0, .port = 0 },
204 { .name = "ich9-usb-uhci5", .func = 1, .port = 2 },
205 { .name = "ich9-usb-uhci6", .func = 2, .port = 4 },
206};
207
208int ehci_create_ich9_with_companions(PCIBus *bus, int slot)
209{
210 const struct ehci_companions *comp;
211 PCIDevice *ehci, *uhci;
212 BusState *usbbus;
213 const char *name;
214 int i;
215
216 switch (slot) {
217 case 0x1d:
218 name = "ich9-usb-ehci1";
219 comp = ich9_1d;
220 break;
221 case 0x1a:
222 name = "ich9-usb-ehci2";
223 comp = ich9_1a;
224 break;
225 default:
226 return -1;
227 }
228
229 ehci = pci_create_multifunction(bus, PCI_DEVFN(slot, 7), true, name);
230 qdev_init_nofail(&ehci->qdev);
231 usbbus = QLIST_FIRST(&ehci->qdev.child_bus);
232
233 for (i = 0; i < 3; i++) {
234 uhci = pci_create_multifunction(bus, PCI_DEVFN(slot, comp[i].func),
235 true, comp[i].name);
236 qdev_prop_set_string(&uhci->qdev, "masterbus", usbbus->name);
237 qdev_prop_set_uint32(&uhci->qdev, "firstport", comp[i].port);
238 qdev_init_nofail(&uhci->qdev);
239 }
240 return 0;
241}