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65501a74
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1/*
2 * vfio based device assignment support
3 *
4 * Copyright Red Hat, Inc. 2012
5 *
6 * Authors:
7 * Alex Williamson <alex.williamson@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 * Based on qemu-kvm device-assignment:
13 * Adapted for KVM by Qumranet.
14 * Copyright (c) 2007, Neocleus, Alex Novik (alex@neocleus.com)
15 * Copyright (c) 2007, Neocleus, Guy Zana (guy@neocleus.com)
16 * Copyright (C) 2008, Qumranet, Amit Shah (amit.shah@qumranet.com)
17 * Copyright (C) 2008, Red Hat, Amit Shah (amit.shah@redhat.com)
18 * Copyright (C) 2008, IBM, Muli Ben-Yehuda (muli@il.ibm.com)
19 */
20
21#include <dirent.h>
22#include <unistd.h>
23#include <sys/ioctl.h>
24#include <sys/mman.h>
25#include <sys/stat.h>
26#include <sys/types.h>
27#include <linux/vfio.h>
28
29#include "config.h"
30#include "event_notifier.h"
31#include "exec-memory.h"
32#include "kvm.h"
33#include "memory.h"
a2cb15b0
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34#include "pci/msi.h"
35#include "pci/msix.h"
36#include "pci/pci.h"
5c97e5eb 37#include "qemu-common.h"
65501a74 38#include "qemu-error.h"
5c97e5eb 39#include "qemu-queue.h"
65501a74 40#include "range.h"
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41
42/* #define DEBUG_VFIO */
43#ifdef DEBUG_VFIO
44#define DPRINTF(fmt, ...) \
45 do { fprintf(stderr, "vfio: " fmt, ## __VA_ARGS__); } while (0)
46#else
47#define DPRINTF(fmt, ...) \
48 do { } while (0)
49#endif
50
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51typedef struct VFIOBAR {
52 off_t fd_offset; /* offset of BAR within device fd */
53 int fd; /* device fd, allows us to pass VFIOBAR as opaque data */
54 MemoryRegion mem; /* slow, read/write access */
55 MemoryRegion mmap_mem; /* direct mapped access */
56 void *mmap;
57 size_t size;
58 uint32_t flags; /* VFIO region flags (rd/wr/mmap) */
59 uint8_t nr; /* cache the BAR number for debug */
60} VFIOBAR;
61
62typedef struct VFIOINTx {
63 bool pending; /* interrupt pending */
64 bool kvm_accel; /* set when QEMU bypass through KVM enabled */
65 uint8_t pin; /* which pin to pull for qemu_set_irq */
66 EventNotifier interrupt; /* eventfd triggered on interrupt */
67 EventNotifier unmask; /* eventfd for unmask on QEMU bypass */
68 PCIINTxRoute route; /* routing info for QEMU bypass */
69 uint32_t mmap_timeout; /* delay to re-enable mmaps after interrupt */
70 QEMUTimer *mmap_timer; /* enable mmaps after periods w/o interrupts */
71} VFIOINTx;
72
73struct VFIODevice;
74
75typedef struct VFIOMSIVector {
76 EventNotifier interrupt; /* eventfd triggered on interrupt */
77 struct VFIODevice *vdev; /* back pointer to device */
78 int virq; /* KVM irqchip route for QEMU bypass */
79 bool use;
80} VFIOMSIVector;
81
82enum {
83 VFIO_INT_NONE = 0,
84 VFIO_INT_INTx = 1,
85 VFIO_INT_MSI = 2,
86 VFIO_INT_MSIX = 3,
87};
88
89struct VFIOGroup;
90
91typedef struct VFIOContainer {
92 int fd; /* /dev/vfio/vfio, empowered by the attached groups */
93 struct {
94 /* enable abstraction to support various iommu backends */
95 union {
96 MemoryListener listener; /* Used by type1 iommu */
97 };
98 void (*release)(struct VFIOContainer *);
99 } iommu_data;
100 QLIST_HEAD(, VFIOGroup) group_list;
101 QLIST_ENTRY(VFIOContainer) next;
102} VFIOContainer;
103
104/* Cache of MSI-X setup plus extra mmap and memory region for split BAR map */
105typedef struct VFIOMSIXInfo {
106 uint8_t table_bar;
107 uint8_t pba_bar;
108 uint16_t entries;
109 uint32_t table_offset;
110 uint32_t pba_offset;
111 MemoryRegion mmap_mem;
112 void *mmap;
113} VFIOMSIXInfo;
114
115typedef struct VFIODevice {
116 PCIDevice pdev;
117 int fd;
118 VFIOINTx intx;
119 unsigned int config_size;
120 off_t config_offset; /* Offset of config space region within device fd */
121 unsigned int rom_size;
122 off_t rom_offset; /* Offset of ROM region within device fd */
123 int msi_cap_size;
124 VFIOMSIVector *msi_vectors;
125 VFIOMSIXInfo *msix;
126 int nr_vectors; /* Number of MSI/MSIX vectors currently in use */
127 int interrupt; /* Current interrupt type */
128 VFIOBAR bars[PCI_NUM_REGIONS - 1]; /* No ROM */
129 PCIHostDeviceAddress host;
130 QLIST_ENTRY(VFIODevice) next;
131 struct VFIOGroup *group;
132 bool reset_works;
133} VFIODevice;
134
135typedef struct VFIOGroup {
136 int fd;
137 int groupid;
138 VFIOContainer *container;
139 QLIST_HEAD(, VFIODevice) device_list;
140 QLIST_ENTRY(VFIOGroup) next;
141 QLIST_ENTRY(VFIOGroup) container_next;
142} VFIOGroup;
143
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144#define MSIX_CAP_LENGTH 12
145
146static QLIST_HEAD(, VFIOContainer)
147 container_list = QLIST_HEAD_INITIALIZER(container_list);
148
149static QLIST_HEAD(, VFIOGroup)
150 group_list = QLIST_HEAD_INITIALIZER(group_list);
151
152static void vfio_disable_interrupts(VFIODevice *vdev);
153static uint32_t vfio_pci_read_config(PCIDevice *pdev, uint32_t addr, int len);
154static void vfio_mmap_set_enabled(VFIODevice *vdev, bool enabled);
155
156/*
157 * Common VFIO interrupt disable
158 */
159static void vfio_disable_irqindex(VFIODevice *vdev, int index)
160{
161 struct vfio_irq_set irq_set = {
162 .argsz = sizeof(irq_set),
163 .flags = VFIO_IRQ_SET_DATA_NONE | VFIO_IRQ_SET_ACTION_TRIGGER,
164 .index = index,
165 .start = 0,
166 .count = 0,
167 };
168
169 ioctl(vdev->fd, VFIO_DEVICE_SET_IRQS, &irq_set);
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170}
171
172/*
173 * INTx
174 */
175static void vfio_unmask_intx(VFIODevice *vdev)
176{
177 struct vfio_irq_set irq_set = {
178 .argsz = sizeof(irq_set),
179 .flags = VFIO_IRQ_SET_DATA_NONE | VFIO_IRQ_SET_ACTION_UNMASK,
180 .index = VFIO_PCI_INTX_IRQ_INDEX,
181 .start = 0,
182 .count = 1,
183 };
184
185 ioctl(vdev->fd, VFIO_DEVICE_SET_IRQS, &irq_set);
186}
187
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188#ifdef CONFIG_KVM /* Unused outside of CONFIG_KVM code */
189static void vfio_mask_intx(VFIODevice *vdev)
190{
191 struct vfio_irq_set irq_set = {
192 .argsz = sizeof(irq_set),
193 .flags = VFIO_IRQ_SET_DATA_NONE | VFIO_IRQ_SET_ACTION_MASK,
194 .index = VFIO_PCI_INTX_IRQ_INDEX,
195 .start = 0,
196 .count = 1,
197 };
198
199 ioctl(vdev->fd, VFIO_DEVICE_SET_IRQS, &irq_set);
200}
201#endif
202
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203/*
204 * Disabling BAR mmaping can be slow, but toggling it around INTx can
205 * also be a huge overhead. We try to get the best of both worlds by
206 * waiting until an interrupt to disable mmaps (subsequent transitions
207 * to the same state are effectively no overhead). If the interrupt has
208 * been serviced and the time gap is long enough, we re-enable mmaps for
209 * performance. This works well for things like graphics cards, which
210 * may not use their interrupt at all and are penalized to an unusable
211 * level by read/write BAR traps. Other devices, like NICs, have more
212 * regular interrupts and see much better latency by staying in non-mmap
213 * mode. We therefore set the default mmap_timeout such that a ping
214 * is just enough to keep the mmap disabled. Users can experiment with
215 * other options with the x-intx-mmap-timeout-ms parameter (a value of
216 * zero disables the timer).
217 */
218static void vfio_intx_mmap_enable(void *opaque)
219{
220 VFIODevice *vdev = opaque;
221
222 if (vdev->intx.pending) {
223 qemu_mod_timer(vdev->intx.mmap_timer,
224 qemu_get_clock_ms(vm_clock) + vdev->intx.mmap_timeout);
225 return;
226 }
227
228 vfio_mmap_set_enabled(vdev, true);
229}
230
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231static void vfio_intx_interrupt(void *opaque)
232{
233 VFIODevice *vdev = opaque;
234
235 if (!event_notifier_test_and_clear(&vdev->intx.interrupt)) {
236 return;
237 }
238
239 DPRINTF("%s(%04x:%02x:%02x.%x) Pin %c\n", __func__, vdev->host.domain,
240 vdev->host.bus, vdev->host.slot, vdev->host.function,
241 'A' + vdev->intx.pin);
242
243 vdev->intx.pending = true;
244 qemu_set_irq(vdev->pdev.irq[vdev->intx.pin], 1);
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245 vfio_mmap_set_enabled(vdev, false);
246 if (vdev->intx.mmap_timeout) {
247 qemu_mod_timer(vdev->intx.mmap_timer,
248 qemu_get_clock_ms(vm_clock) + vdev->intx.mmap_timeout);
249 }
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250}
251
252static void vfio_eoi(VFIODevice *vdev)
253{
254 if (!vdev->intx.pending) {
255 return;
256 }
257
258 DPRINTF("%s(%04x:%02x:%02x.%x) EOI\n", __func__, vdev->host.domain,
259 vdev->host.bus, vdev->host.slot, vdev->host.function);
260
261 vdev->intx.pending = false;
262 qemu_set_irq(vdev->pdev.irq[vdev->intx.pin], 0);
263 vfio_unmask_intx(vdev);
264}
265
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266static void vfio_enable_intx_kvm(VFIODevice *vdev)
267{
268#ifdef CONFIG_KVM
269 struct kvm_irqfd irqfd = {
270 .fd = event_notifier_get_fd(&vdev->intx.interrupt),
271 .gsi = vdev->intx.route.irq,
272 .flags = KVM_IRQFD_FLAG_RESAMPLE,
273 };
274 struct vfio_irq_set *irq_set;
275 int ret, argsz;
276 int32_t *pfd;
277
278 if (!kvm_irqchip_in_kernel() ||
279 vdev->intx.route.mode != PCI_INTX_ENABLED ||
280 !kvm_check_extension(kvm_state, KVM_CAP_IRQFD_RESAMPLE)) {
281 return;
282 }
283
284 /* Get to a known interrupt state */
285 qemu_set_fd_handler(irqfd.fd, NULL, NULL, vdev);
286 vfio_mask_intx(vdev);
287 vdev->intx.pending = false;
288 qemu_set_irq(vdev->pdev.irq[vdev->intx.pin], 0);
289
290 /* Get an eventfd for resample/unmask */
291 if (event_notifier_init(&vdev->intx.unmask, 0)) {
292 error_report("vfio: Error: event_notifier_init failed eoi\n");
293 goto fail;
294 }
295
296 /* KVM triggers it, VFIO listens for it */
297 irqfd.resamplefd = event_notifier_get_fd(&vdev->intx.unmask);
298
299 if (kvm_vm_ioctl(kvm_state, KVM_IRQFD, &irqfd)) {
300 error_report("vfio: Error: Failed to setup resample irqfd: %m\n");
301 goto fail_irqfd;
302 }
303
304 argsz = sizeof(*irq_set) + sizeof(*pfd);
305
306 irq_set = g_malloc0(argsz);
307 irq_set->argsz = argsz;
308 irq_set->flags = VFIO_IRQ_SET_DATA_EVENTFD | VFIO_IRQ_SET_ACTION_UNMASK;
309 irq_set->index = VFIO_PCI_INTX_IRQ_INDEX;
310 irq_set->start = 0;
311 irq_set->count = 1;
312 pfd = (int32_t *)&irq_set->data;
313
314 *pfd = irqfd.resamplefd;
315
316 ret = ioctl(vdev->fd, VFIO_DEVICE_SET_IRQS, irq_set);
317 g_free(irq_set);
318 if (ret) {
319 error_report("vfio: Error: Failed to setup INTx unmask fd: %m\n");
320 goto fail_vfio;
321 }
322
323 /* Let'em rip */
324 vfio_unmask_intx(vdev);
325
326 vdev->intx.kvm_accel = true;
327
328 DPRINTF("%s(%04x:%02x:%02x.%x) KVM INTx accel enabled\n",
329 __func__, vdev->host.domain, vdev->host.bus,
330 vdev->host.slot, vdev->host.function);
331
332 return;
333
334fail_vfio:
335 irqfd.flags = KVM_IRQFD_FLAG_DEASSIGN;
336 kvm_vm_ioctl(kvm_state, KVM_IRQFD, &irqfd);
337fail_irqfd:
338 event_notifier_cleanup(&vdev->intx.unmask);
339fail:
340 qemu_set_fd_handler(irqfd.fd, vfio_intx_interrupt, NULL, vdev);
341 vfio_unmask_intx(vdev);
342#endif
343}
344
345static void vfio_disable_intx_kvm(VFIODevice *vdev)
346{
347#ifdef CONFIG_KVM
348 struct kvm_irqfd irqfd = {
349 .fd = event_notifier_get_fd(&vdev->intx.interrupt),
350 .gsi = vdev->intx.route.irq,
351 .flags = KVM_IRQFD_FLAG_DEASSIGN,
352 };
353
354 if (!vdev->intx.kvm_accel) {
355 return;
356 }
357
358 /*
359 * Get to a known state, hardware masked, QEMU ready to accept new
360 * interrupts, QEMU IRQ de-asserted.
361 */
362 vfio_mask_intx(vdev);
363 vdev->intx.pending = false;
364 qemu_set_irq(vdev->pdev.irq[vdev->intx.pin], 0);
365
366 /* Tell KVM to stop listening for an INTx irqfd */
367 if (kvm_vm_ioctl(kvm_state, KVM_IRQFD, &irqfd)) {
368 error_report("vfio: Error: Failed to disable INTx irqfd: %m\n");
369 }
370
371 /* We only need to close the eventfd for VFIO to cleanup the kernel side */
372 event_notifier_cleanup(&vdev->intx.unmask);
373
374 /* QEMU starts listening for interrupt events. */
375 qemu_set_fd_handler(irqfd.fd, vfio_intx_interrupt, NULL, vdev);
376
377 vdev->intx.kvm_accel = false;
378
379 /* If we've missed an event, let it re-fire through QEMU */
380 vfio_unmask_intx(vdev);
381
382 DPRINTF("%s(%04x:%02x:%02x.%x) KVM INTx accel disabled\n",
383 __func__, vdev->host.domain, vdev->host.bus,
384 vdev->host.slot, vdev->host.function);
385#endif
386}
387
388static void vfio_update_irq(PCIDevice *pdev)
389{
390 VFIODevice *vdev = DO_UPCAST(VFIODevice, pdev, pdev);
391 PCIINTxRoute route;
392
393 if (vdev->interrupt != VFIO_INT_INTx) {
394 return;
395 }
396
397 route = pci_device_route_intx_to_irq(&vdev->pdev, vdev->intx.pin);
398
399 if (!pci_intx_route_changed(&vdev->intx.route, &route)) {
400 return; /* Nothing changed */
401 }
402
403 DPRINTF("%s(%04x:%02x:%02x.%x) IRQ moved %d -> %d\n", __func__,
404 vdev->host.domain, vdev->host.bus, vdev->host.slot,
405 vdev->host.function, vdev->intx.route.irq, route.irq);
406
407 vfio_disable_intx_kvm(vdev);
408
409 vdev->intx.route = route;
410
411 if (route.mode != PCI_INTX_ENABLED) {
412 return;
413 }
414
415 vfio_enable_intx_kvm(vdev);
416
417 /* Re-enable the interrupt in cased we missed an EOI */
418 vfio_eoi(vdev);
419}
420
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421static int vfio_enable_intx(VFIODevice *vdev)
422{
65501a74 423 uint8_t pin = vfio_pci_read_config(&vdev->pdev, PCI_INTERRUPT_PIN, 1);
1a403133
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424 int ret, argsz;
425 struct vfio_irq_set *irq_set;
426 int32_t *pfd;
65501a74 427
ea486926 428 if (!pin) {
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429 return 0;
430 }
431
432 vfio_disable_interrupts(vdev);
433
434 vdev->intx.pin = pin - 1; /* Pin A (1) -> irq[0] */
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435
436#ifdef CONFIG_KVM
437 /*
438 * Only conditional to avoid generating error messages on platforms
439 * where we won't actually use the result anyway.
440 */
441 if (kvm_check_extension(kvm_state, KVM_CAP_IRQFD_RESAMPLE)) {
442 vdev->intx.route = pci_device_route_intx_to_irq(&vdev->pdev,
443 vdev->intx.pin);
444 }
445#endif
446
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447 ret = event_notifier_init(&vdev->intx.interrupt, 0);
448 if (ret) {
449 error_report("vfio: Error: event_notifier_init failed\n");
450 return ret;
451 }
452
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453 argsz = sizeof(*irq_set) + sizeof(*pfd);
454
455 irq_set = g_malloc0(argsz);
456 irq_set->argsz = argsz;
457 irq_set->flags = VFIO_IRQ_SET_DATA_EVENTFD | VFIO_IRQ_SET_ACTION_TRIGGER;
458 irq_set->index = VFIO_PCI_INTX_IRQ_INDEX;
459 irq_set->start = 0;
460 irq_set->count = 1;
461 pfd = (int32_t *)&irq_set->data;
462
463 *pfd = event_notifier_get_fd(&vdev->intx.interrupt);
464 qemu_set_fd_handler(*pfd, vfio_intx_interrupt, NULL, vdev);
65501a74 465
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466 ret = ioctl(vdev->fd, VFIO_DEVICE_SET_IRQS, irq_set);
467 g_free(irq_set);
468 if (ret) {
65501a74 469 error_report("vfio: Error: Failed to setup INTx fd: %m\n");
1a403133 470 qemu_set_fd_handler(*pfd, NULL, NULL, vdev);
ce59af2d 471 event_notifier_cleanup(&vdev->intx.interrupt);
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472 return -errno;
473 }
474
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475 vfio_enable_intx_kvm(vdev);
476
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477 vdev->interrupt = VFIO_INT_INTx;
478
479 DPRINTF("%s(%04x:%02x:%02x.%x)\n", __func__, vdev->host.domain,
480 vdev->host.bus, vdev->host.slot, vdev->host.function);
481
482 return 0;
483}
484
485static void vfio_disable_intx(VFIODevice *vdev)
486{
487 int fd;
488
ea486926 489 qemu_del_timer(vdev->intx.mmap_timer);
e1d1e586 490 vfio_disable_intx_kvm(vdev);
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491 vfio_disable_irqindex(vdev, VFIO_PCI_INTX_IRQ_INDEX);
492 vdev->intx.pending = false;
493 qemu_set_irq(vdev->pdev.irq[vdev->intx.pin], 0);
494 vfio_mmap_set_enabled(vdev, true);
495
496 fd = event_notifier_get_fd(&vdev->intx.interrupt);
497 qemu_set_fd_handler(fd, NULL, NULL, vdev);
498 event_notifier_cleanup(&vdev->intx.interrupt);
499
500 vdev->interrupt = VFIO_INT_NONE;
501
502 DPRINTF("%s(%04x:%02x:%02x.%x)\n", __func__, vdev->host.domain,
503 vdev->host.bus, vdev->host.slot, vdev->host.function);
504}
505
506/*
507 * MSI/X
508 */
509static void vfio_msi_interrupt(void *opaque)
510{
511 VFIOMSIVector *vector = opaque;
512 VFIODevice *vdev = vector->vdev;
513 int nr = vector - vdev->msi_vectors;
514
515 if (!event_notifier_test_and_clear(&vector->interrupt)) {
516 return;
517 }
518
519 DPRINTF("%s(%04x:%02x:%02x.%x) vector %d\n", __func__,
520 vdev->host.domain, vdev->host.bus, vdev->host.slot,
521 vdev->host.function, nr);
522
523 if (vdev->interrupt == VFIO_INT_MSIX) {
524 msix_notify(&vdev->pdev, nr);
525 } else if (vdev->interrupt == VFIO_INT_MSI) {
526 msi_notify(&vdev->pdev, nr);
527 } else {
528 error_report("vfio: MSI interrupt receieved, but not enabled?\n");
529 }
530}
531
532static int vfio_enable_vectors(VFIODevice *vdev, bool msix)
533{
534 struct vfio_irq_set *irq_set;
535 int ret = 0, i, argsz;
536 int32_t *fds;
537
538 argsz = sizeof(*irq_set) + (vdev->nr_vectors * sizeof(*fds));
539
540 irq_set = g_malloc0(argsz);
541 irq_set->argsz = argsz;
542 irq_set->flags = VFIO_IRQ_SET_DATA_EVENTFD | VFIO_IRQ_SET_ACTION_TRIGGER;
543 irq_set->index = msix ? VFIO_PCI_MSIX_IRQ_INDEX : VFIO_PCI_MSI_IRQ_INDEX;
544 irq_set->start = 0;
545 irq_set->count = vdev->nr_vectors;
546 fds = (int32_t *)&irq_set->data;
547
548 for (i = 0; i < vdev->nr_vectors; i++) {
549 if (!vdev->msi_vectors[i].use) {
550 fds[i] = -1;
551 continue;
552 }
553
554 fds[i] = event_notifier_get_fd(&vdev->msi_vectors[i].interrupt);
555 }
556
557 ret = ioctl(vdev->fd, VFIO_DEVICE_SET_IRQS, irq_set);
558
559 g_free(irq_set);
560
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561 return ret;
562}
563
564static int vfio_msix_vector_use(PCIDevice *pdev,
565 unsigned int nr, MSIMessage msg)
566{
567 VFIODevice *vdev = DO_UPCAST(VFIODevice, pdev, pdev);
568 VFIOMSIVector *vector;
569 int ret;
570
571 DPRINTF("%s(%04x:%02x:%02x.%x) vector %d used\n", __func__,
572 vdev->host.domain, vdev->host.bus, vdev->host.slot,
573 vdev->host.function, nr);
574
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575 vector = &vdev->msi_vectors[nr];
576 vector->vdev = vdev;
577 vector->use = true;
578
579 msix_vector_use(pdev, nr);
580
581 if (event_notifier_init(&vector->interrupt, 0)) {
582 error_report("vfio: Error: event_notifier_init failed\n");
583 }
584
585 /*
586 * Attempt to enable route through KVM irqchip,
587 * default to userspace handling if unavailable.
588 */
589 vector->virq = kvm_irqchip_add_msi_route(kvm_state, msg);
590 if (vector->virq < 0 ||
591 kvm_irqchip_add_irqfd_notifier(kvm_state, &vector->interrupt,
592 vector->virq) < 0) {
593 if (vector->virq >= 0) {
594 kvm_irqchip_release_virq(kvm_state, vector->virq);
595 vector->virq = -1;
596 }
597 qemu_set_fd_handler(event_notifier_get_fd(&vector->interrupt),
598 vfio_msi_interrupt, NULL, vector);
599 }
600
601 /*
602 * We don't want to have the host allocate all possible MSI vectors
603 * for a device if they're not in use, so we shutdown and incrementally
604 * increase them as needed.
605 */
606 if (vdev->nr_vectors < nr + 1) {
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607 vfio_disable_irqindex(vdev, VFIO_PCI_MSIX_IRQ_INDEX);
608 vdev->nr_vectors = nr + 1;
609 ret = vfio_enable_vectors(vdev, true);
610 if (ret) {
611 error_report("vfio: failed to enable vectors, %d\n", ret);
612 }
65501a74 613 } else {
1a403133
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614 int argsz;
615 struct vfio_irq_set *irq_set;
616 int32_t *pfd;
617
618 argsz = sizeof(*irq_set) + sizeof(*pfd);
619
620 irq_set = g_malloc0(argsz);
621 irq_set->argsz = argsz;
622 irq_set->flags = VFIO_IRQ_SET_DATA_EVENTFD |
623 VFIO_IRQ_SET_ACTION_TRIGGER;
624 irq_set->index = VFIO_PCI_MSIX_IRQ_INDEX;
625 irq_set->start = nr;
626 irq_set->count = 1;
627 pfd = (int32_t *)&irq_set->data;
628
629 *pfd = event_notifier_get_fd(&vector->interrupt);
630
631 ret = ioctl(vdev->fd, VFIO_DEVICE_SET_IRQS, irq_set);
632 g_free(irq_set);
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633 if (ret) {
634 error_report("vfio: failed to modify vector, %d\n", ret);
635 }
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636 }
637
638 return 0;
639}
640
641static void vfio_msix_vector_release(PCIDevice *pdev, unsigned int nr)
642{
643 VFIODevice *vdev = DO_UPCAST(VFIODevice, pdev, pdev);
644 VFIOMSIVector *vector = &vdev->msi_vectors[nr];
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645 int argsz;
646 struct vfio_irq_set *irq_set;
647 int32_t *pfd;
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648
649 DPRINTF("%s(%04x:%02x:%02x.%x) vector %d released\n", __func__,
650 vdev->host.domain, vdev->host.bus, vdev->host.slot,
651 vdev->host.function, nr);
652
653 /*
654 * XXX What's the right thing to do here? This turns off the interrupt
655 * completely, but do we really just want to switch the interrupt to
656 * bouncing through userspace and let msix.c drop it? Not sure.
657 */
658 msix_vector_unuse(pdev, nr);
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659
660 argsz = sizeof(*irq_set) + sizeof(*pfd);
661
662 irq_set = g_malloc0(argsz);
663 irq_set->argsz = argsz;
664 irq_set->flags = VFIO_IRQ_SET_DATA_EVENTFD |
665 VFIO_IRQ_SET_ACTION_TRIGGER;
666 irq_set->index = VFIO_PCI_MSIX_IRQ_INDEX;
667 irq_set->start = nr;
668 irq_set->count = 1;
669 pfd = (int32_t *)&irq_set->data;
670
671 *pfd = -1;
672
673 ioctl(vdev->fd, VFIO_DEVICE_SET_IRQS, irq_set);
674
675 g_free(irq_set);
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676
677 if (vector->virq < 0) {
678 qemu_set_fd_handler(event_notifier_get_fd(&vector->interrupt),
679 NULL, NULL, NULL);
680 } else {
681 kvm_irqchip_remove_irqfd_notifier(kvm_state, &vector->interrupt,
682 vector->virq);
683 kvm_irqchip_release_virq(kvm_state, vector->virq);
684 vector->virq = -1;
685 }
686
687 event_notifier_cleanup(&vector->interrupt);
688 vector->use = false;
689}
690
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691static void vfio_enable_msix(VFIODevice *vdev)
692{
693 vfio_disable_interrupts(vdev);
694
695 vdev->msi_vectors = g_malloc0(vdev->msix->entries * sizeof(VFIOMSIVector));
696
697 vdev->interrupt = VFIO_INT_MSIX;
698
699 if (msix_set_vector_notifiers(&vdev->pdev, vfio_msix_vector_use,
700 vfio_msix_vector_release)) {
701 error_report("vfio: msix_set_vector_notifiers failed\n");
702 }
703
704 DPRINTF("%s(%04x:%02x:%02x.%x)\n", __func__, vdev->host.domain,
705 vdev->host.bus, vdev->host.slot, vdev->host.function);
706}
707
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708static void vfio_enable_msi(VFIODevice *vdev)
709{
710 int ret, i;
711
712 vfio_disable_interrupts(vdev);
713
714 vdev->nr_vectors = msi_nr_vectors_allocated(&vdev->pdev);
715retry:
716 vdev->msi_vectors = g_malloc0(vdev->nr_vectors * sizeof(VFIOMSIVector));
717
718 for (i = 0; i < vdev->nr_vectors; i++) {
719 MSIMessage msg;
720 VFIOMSIVector *vector = &vdev->msi_vectors[i];
721
722 vector->vdev = vdev;
723 vector->use = true;
724
725 if (event_notifier_init(&vector->interrupt, 0)) {
726 error_report("vfio: Error: event_notifier_init failed\n");
727 }
728
a771c517 729 msg = msi_get_message(&vdev->pdev, i);
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730
731 /*
732 * Attempt to enable route through KVM irqchip,
733 * default to userspace handling if unavailable.
734 */
735 vector->virq = kvm_irqchip_add_msi_route(kvm_state, msg);
736 if (vector->virq < 0 ||
737 kvm_irqchip_add_irqfd_notifier(kvm_state, &vector->interrupt,
738 vector->virq) < 0) {
739 qemu_set_fd_handler(event_notifier_get_fd(&vector->interrupt),
740 vfio_msi_interrupt, NULL, vector);
741 }
742 }
743
744 ret = vfio_enable_vectors(vdev, false);
745 if (ret) {
746 if (ret < 0) {
747 error_report("vfio: Error: Failed to setup MSI fds: %m\n");
748 } else if (ret != vdev->nr_vectors) {
749 error_report("vfio: Error: Failed to enable %d "
750 "MSI vectors, retry with %d\n", vdev->nr_vectors, ret);
751 }
752
753 for (i = 0; i < vdev->nr_vectors; i++) {
754 VFIOMSIVector *vector = &vdev->msi_vectors[i];
755 if (vector->virq >= 0) {
756 kvm_irqchip_remove_irqfd_notifier(kvm_state, &vector->interrupt,
757 vector->virq);
758 kvm_irqchip_release_virq(kvm_state, vector->virq);
759 vector->virq = -1;
760 } else {
761 qemu_set_fd_handler(event_notifier_get_fd(&vector->interrupt),
762 NULL, NULL, NULL);
763 }
764 event_notifier_cleanup(&vector->interrupt);
765 }
766
767 g_free(vdev->msi_vectors);
768
769 if (ret > 0 && ret != vdev->nr_vectors) {
770 vdev->nr_vectors = ret;
771 goto retry;
772 }
773 vdev->nr_vectors = 0;
774
775 return;
776 }
777
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778 vdev->interrupt = VFIO_INT_MSI;
779
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780 DPRINTF("%s(%04x:%02x:%02x.%x) Enabled %d MSI vectors\n", __func__,
781 vdev->host.domain, vdev->host.bus, vdev->host.slot,
782 vdev->host.function, vdev->nr_vectors);
783}
784
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785static void vfio_disable_msi_common(VFIODevice *vdev)
786{
787 g_free(vdev->msi_vectors);
788 vdev->msi_vectors = NULL;
789 vdev->nr_vectors = 0;
790 vdev->interrupt = VFIO_INT_NONE;
791
792 vfio_enable_intx(vdev);
793}
794
795static void vfio_disable_msix(VFIODevice *vdev)
796{
797 msix_unset_vector_notifiers(&vdev->pdev);
798
799 if (vdev->nr_vectors) {
800 vfio_disable_irqindex(vdev, VFIO_PCI_MSIX_IRQ_INDEX);
801 }
802
803 vfio_disable_msi_common(vdev);
804
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805 DPRINTF("%s(%04x:%02x:%02x.%x)\n", __func__, vdev->host.domain,
806 vdev->host.bus, vdev->host.slot, vdev->host.function);
fd704adc
AW
807}
808
809static void vfio_disable_msi(VFIODevice *vdev)
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810{
811 int i;
812
fd704adc 813 vfio_disable_irqindex(vdev, VFIO_PCI_MSI_IRQ_INDEX);
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814
815 for (i = 0; i < vdev->nr_vectors; i++) {
816 VFIOMSIVector *vector = &vdev->msi_vectors[i];
817
818 if (!vector->use) {
819 continue;
820 }
821
822 if (vector->virq >= 0) {
823 kvm_irqchip_remove_irqfd_notifier(kvm_state,
824 &vector->interrupt, vector->virq);
825 kvm_irqchip_release_virq(kvm_state, vector->virq);
826 vector->virq = -1;
827 } else {
828 qemu_set_fd_handler(event_notifier_get_fd(&vector->interrupt),
829 NULL, NULL, NULL);
830 }
831
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832 event_notifier_cleanup(&vector->interrupt);
833 }
834
fd704adc 835 vfio_disable_msi_common(vdev);
65501a74 836
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837 DPRINTF("%s(%04x:%02x:%02x.%x)\n", __func__, vdev->host.domain,
838 vdev->host.bus, vdev->host.slot, vdev->host.function);
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839}
840
841/*
842 * IO Port/MMIO - Beware of the endians, VFIO is always little endian
843 */
a8170e5e 844static void vfio_bar_write(void *opaque, hwaddr addr,
65501a74
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845 uint64_t data, unsigned size)
846{
847 VFIOBAR *bar = opaque;
848 union {
849 uint8_t byte;
850 uint16_t word;
851 uint32_t dword;
852 uint64_t qword;
853 } buf;
854
855 switch (size) {
856 case 1:
857 buf.byte = data;
858 break;
859 case 2:
860 buf.word = cpu_to_le16(data);
861 break;
862 case 4:
863 buf.dword = cpu_to_le32(data);
864 break;
865 default:
866 hw_error("vfio: unsupported write size, %d bytes\n", size);
867 break;
868 }
869
870 if (pwrite(bar->fd, &buf, size, bar->fd_offset + addr) != size) {
a8170e5e 871 error_report("%s(,0x%"HWADDR_PRIx", 0x%"PRIx64", %d) failed: %m\n",
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872 __func__, addr, data, size);
873 }
874
a8170e5e 875 DPRINTF("%s(BAR%d+0x%"HWADDR_PRIx", 0x%"PRIx64", %d)\n",
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876 __func__, bar->nr, addr, data, size);
877
878 /*
879 * A read or write to a BAR always signals an INTx EOI. This will
880 * do nothing if not pending (including not in INTx mode). We assume
881 * that a BAR access is in response to an interrupt and that BAR
882 * accesses will service the interrupt. Unfortunately, we don't know
883 * which access will service the interrupt, so we're potentially
884 * getting quite a few host interrupts per guest interrupt.
885 */
3a4f2816 886 vfio_eoi(container_of(bar, VFIODevice, bars[bar->nr]));
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887}
888
889static uint64_t vfio_bar_read(void *opaque,
a8170e5e 890 hwaddr addr, unsigned size)
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891{
892 VFIOBAR *bar = opaque;
893 union {
894 uint8_t byte;
895 uint16_t word;
896 uint32_t dword;
897 uint64_t qword;
898 } buf;
899 uint64_t data = 0;
900
901 if (pread(bar->fd, &buf, size, bar->fd_offset + addr) != size) {
a8170e5e 902 error_report("%s(,0x%"HWADDR_PRIx", %d) failed: %m\n",
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903 __func__, addr, size);
904 return (uint64_t)-1;
905 }
906
907 switch (size) {
908 case 1:
909 data = buf.byte;
910 break;
911 case 2:
912 data = le16_to_cpu(buf.word);
913 break;
914 case 4:
915 data = le32_to_cpu(buf.dword);
916 break;
917 default:
918 hw_error("vfio: unsupported read size, %d bytes\n", size);
919 break;
920 }
921
a8170e5e 922 DPRINTF("%s(BAR%d+0x%"HWADDR_PRIx", %d) = 0x%"PRIx64"\n",
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923 __func__, bar->nr, addr, size, data);
924
925 /* Same as write above */
3a4f2816 926 vfio_eoi(container_of(bar, VFIODevice, bars[bar->nr]));
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927
928 return data;
929}
930
931static const MemoryRegionOps vfio_bar_ops = {
932 .read = vfio_bar_read,
933 .write = vfio_bar_write,
934 .endianness = DEVICE_LITTLE_ENDIAN,
935};
936
937/*
938 * PCI config space
939 */
940static uint32_t vfio_pci_read_config(PCIDevice *pdev, uint32_t addr, int len)
941{
942 VFIODevice *vdev = DO_UPCAST(VFIODevice, pdev, pdev);
943 uint32_t val = 0;
944
945 /*
946 * We only need QEMU PCI config support for the ROM BAR, the MSI and MSIX
947 * capabilities, and the multifunction bit below. We let VFIO handle
948 * virtualizing everything else. Performance is not a concern here.
949 */
950 if (ranges_overlap(addr, len, PCI_ROM_ADDRESS, 4) ||
951 (pdev->cap_present & QEMU_PCI_CAP_MSIX &&
952 ranges_overlap(addr, len, pdev->msix_cap, MSIX_CAP_LENGTH)) ||
953 (pdev->cap_present & QEMU_PCI_CAP_MSI &&
954 ranges_overlap(addr, len, pdev->msi_cap, vdev->msi_cap_size))) {
955
956 val = pci_default_read_config(pdev, addr, len);
957 } else {
958 if (pread(vdev->fd, &val, len, vdev->config_offset + addr) != len) {
959 error_report("%s(%04x:%02x:%02x.%x, 0x%x, 0x%x) failed: %m\n",
960 __func__, vdev->host.domain, vdev->host.bus,
961 vdev->host.slot, vdev->host.function, addr, len);
962 return -errno;
963 }
964 val = le32_to_cpu(val);
965 }
966
967 /* Multifunction bit is virualized in QEMU */
968 if (unlikely(ranges_overlap(addr, len, PCI_HEADER_TYPE, 1))) {
969 uint32_t mask = PCI_HEADER_TYPE_MULTI_FUNCTION;
970
971 if (len == 4) {
972 mask <<= 16;
973 }
974
975 if (pdev->cap_present & QEMU_PCI_CAP_MULTIFUNCTION) {
976 val |= mask;
977 } else {
978 val &= ~mask;
979 }
980 }
981
982 DPRINTF("%s(%04x:%02x:%02x.%x, @0x%x, len=0x%x) %x\n", __func__,
983 vdev->host.domain, vdev->host.bus, vdev->host.slot,
984 vdev->host.function, addr, len, val);
985
986 return val;
987}
988
989static void vfio_pci_write_config(PCIDevice *pdev, uint32_t addr,
990 uint32_t val, int len)
991{
992 VFIODevice *vdev = DO_UPCAST(VFIODevice, pdev, pdev);
993 uint32_t val_le = cpu_to_le32(val);
994
995 DPRINTF("%s(%04x:%02x:%02x.%x, @0x%x, 0x%x, len=0x%x)\n", __func__,
996 vdev->host.domain, vdev->host.bus, vdev->host.slot,
997 vdev->host.function, addr, val, len);
998
999 /* Write everything to VFIO, let it filter out what we can't write */
1000 if (pwrite(vdev->fd, &val_le, len, vdev->config_offset + addr) != len) {
1001 error_report("%s(%04x:%02x:%02x.%x, 0x%x, 0x%x, 0x%x) failed: %m\n",
1002 __func__, vdev->host.domain, vdev->host.bus,
1003 vdev->host.slot, vdev->host.function, addr, val, len);
1004 }
1005
1006 /* Write standard header bits to emulation */
1007 if (addr < PCI_CONFIG_HEADER_SIZE) {
1008 pci_default_write_config(pdev, addr, val, len);
1009 return;
1010 }
1011
1012 /* MSI/MSI-X Enabling/Disabling */
1013 if (pdev->cap_present & QEMU_PCI_CAP_MSI &&
1014 ranges_overlap(addr, len, pdev->msi_cap, vdev->msi_cap_size)) {
1015 int is_enabled, was_enabled = msi_enabled(pdev);
1016
1017 pci_default_write_config(pdev, addr, val, len);
1018
1019 is_enabled = msi_enabled(pdev);
1020
1021 if (!was_enabled && is_enabled) {
1022 vfio_enable_msi(vdev);
1023 } else if (was_enabled && !is_enabled) {
fd704adc 1024 vfio_disable_msi(vdev);
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1025 }
1026 }
1027
1028 if (pdev->cap_present & QEMU_PCI_CAP_MSIX &&
1029 ranges_overlap(addr, len, pdev->msix_cap, MSIX_CAP_LENGTH)) {
1030 int is_enabled, was_enabled = msix_enabled(pdev);
1031
1032 pci_default_write_config(pdev, addr, val, len);
1033
1034 is_enabled = msix_enabled(pdev);
1035
1036 if (!was_enabled && is_enabled) {
fd704adc 1037 vfio_enable_msix(vdev);
65501a74 1038 } else if (was_enabled && !is_enabled) {
fd704adc 1039 vfio_disable_msix(vdev);
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1040 }
1041 }
1042}
1043
1044/*
1045 * DMA - Mapping and unmapping for the "type1" IOMMU interface used on x86
1046 */
af6bc27e 1047static int vfio_dma_unmap(VFIOContainer *container,
a8170e5e 1048 hwaddr iova, ram_addr_t size)
af6bc27e
AW
1049{
1050 struct vfio_iommu_type1_dma_unmap unmap = {
1051 .argsz = sizeof(unmap),
1052 .flags = 0,
1053 .iova = iova,
1054 .size = size,
1055 };
1056
1057 if (ioctl(container->fd, VFIO_IOMMU_UNMAP_DMA, &unmap)) {
1058 DPRINTF("VFIO_UNMAP_DMA: %d\n", -errno);
1059 return -errno;
1060 }
1061
1062 return 0;
1063}
1064
a8170e5e 1065static int vfio_dma_map(VFIOContainer *container, hwaddr iova,
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1066 ram_addr_t size, void *vaddr, bool readonly)
1067{
1068 struct vfio_iommu_type1_dma_map map = {
1069 .argsz = sizeof(map),
1070 .flags = VFIO_DMA_MAP_FLAG_READ,
5976cdd5 1071 .vaddr = (__u64)(uintptr_t)vaddr,
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1072 .iova = iova,
1073 .size = size,
1074 };
1075
1076 if (!readonly) {
1077 map.flags |= VFIO_DMA_MAP_FLAG_WRITE;
1078 }
1079
12af1344
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1080 /*
1081 * Try the mapping, if it fails with EBUSY, unmap the region and try
1082 * again. This shouldn't be necessary, but we sometimes see it in
1083 * the the VGA ROM space.
1084 */
1085 if (ioctl(container->fd, VFIO_IOMMU_MAP_DMA, &map) == 0 ||
1086 (errno == EBUSY && vfio_dma_unmap(container, iova, size) == 0 &&
1087 ioctl(container->fd, VFIO_IOMMU_MAP_DMA, &map) == 0)) {
1088 return 0;
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1089 }
1090
12af1344
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1091 DPRINTF("VFIO_MAP_DMA: %d\n", -errno);
1092 return -errno;
65501a74
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1093}
1094
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1095static bool vfio_listener_skipped_section(MemoryRegionSection *section)
1096{
1097 return !memory_region_is_ram(section->mr);
1098}
1099
1100static void vfio_listener_region_add(MemoryListener *listener,
1101 MemoryRegionSection *section)
1102{
1103 VFIOContainer *container = container_of(listener, VFIOContainer,
1104 iommu_data.listener);
a8170e5e 1105 hwaddr iova, end;
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1106 void *vaddr;
1107 int ret;
1108
1109 if (vfio_listener_skipped_section(section)) {
a8170e5e 1110 DPRINTF("vfio: SKIPPING region_add %"HWADDR_PRIx" - %"PRIx64"\n",
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1111 section->offset_within_address_space,
1112 section->offset_within_address_space + section->size - 1);
1113 return;
1114 }
1115
1116 if (unlikely((section->offset_within_address_space & ~TARGET_PAGE_MASK) !=
1117 (section->offset_within_region & ~TARGET_PAGE_MASK))) {
1118 error_report("%s received unaligned region\n", __func__);
1119 return;
1120 }
1121
1122 iova = TARGET_PAGE_ALIGN(section->offset_within_address_space);
1123 end = (section->offset_within_address_space + section->size) &
1124 TARGET_PAGE_MASK;
1125
1126 if (iova >= end) {
1127 return;
1128 }
1129
1130 vaddr = memory_region_get_ram_ptr(section->mr) +
1131 section->offset_within_region +
1132 (iova - section->offset_within_address_space);
1133
a8170e5e 1134 DPRINTF("vfio: region_add %"HWADDR_PRIx" - %"HWADDR_PRIx" [%p]\n",
65501a74
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1135 iova, end - 1, vaddr);
1136
1137 ret = vfio_dma_map(container, iova, end - iova, vaddr, section->readonly);
1138 if (ret) {
a8170e5e
AK
1139 error_report("vfio_dma_map(%p, 0x%"HWADDR_PRIx", "
1140 "0x%"HWADDR_PRIx", %p) = %d (%m)\n",
65501a74
AW
1141 container, iova, end - iova, vaddr, ret);
1142 }
1143}
1144
1145static void vfio_listener_region_del(MemoryListener *listener,
1146 MemoryRegionSection *section)
1147{
1148 VFIOContainer *container = container_of(listener, VFIOContainer,
1149 iommu_data.listener);
a8170e5e 1150 hwaddr iova, end;
65501a74
AW
1151 int ret;
1152
1153 if (vfio_listener_skipped_section(section)) {
a8170e5e 1154 DPRINTF("vfio: SKIPPING region_del %"HWADDR_PRIx" - %"PRIx64"\n",
65501a74
AW
1155 section->offset_within_address_space,
1156 section->offset_within_address_space + section->size - 1);
1157 return;
1158 }
1159
1160 if (unlikely((section->offset_within_address_space & ~TARGET_PAGE_MASK) !=
1161 (section->offset_within_region & ~TARGET_PAGE_MASK))) {
1162 error_report("%s received unaligned region\n", __func__);
1163 return;
1164 }
1165
1166 iova = TARGET_PAGE_ALIGN(section->offset_within_address_space);
1167 end = (section->offset_within_address_space + section->size) &
1168 TARGET_PAGE_MASK;
1169
1170 if (iova >= end) {
1171 return;
1172 }
1173
a8170e5e 1174 DPRINTF("vfio: region_del %"HWADDR_PRIx" - %"HWADDR_PRIx"\n",
65501a74
AW
1175 iova, end - 1);
1176
1177 ret = vfio_dma_unmap(container, iova, end - iova);
1178 if (ret) {
a8170e5e
AK
1179 error_report("vfio_dma_unmap(%p, 0x%"HWADDR_PRIx", "
1180 "0x%"HWADDR_PRIx") = %d (%m)\n",
65501a74
AW
1181 container, iova, end - iova, ret);
1182 }
1183}
1184
1185static MemoryListener vfio_memory_listener = {
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1186 .region_add = vfio_listener_region_add,
1187 .region_del = vfio_listener_region_del,
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1188};
1189
1190static void vfio_listener_release(VFIOContainer *container)
1191{
1192 memory_listener_unregister(&container->iommu_data.listener);
1193}
1194
1195/*
1196 * Interrupt setup
1197 */
1198static void vfio_disable_interrupts(VFIODevice *vdev)
1199{
1200 switch (vdev->interrupt) {
1201 case VFIO_INT_INTx:
1202 vfio_disable_intx(vdev);
1203 break;
1204 case VFIO_INT_MSI:
fd704adc 1205 vfio_disable_msi(vdev);
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1206 break;
1207 case VFIO_INT_MSIX:
fd704adc 1208 vfio_disable_msix(vdev);
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1209 break;
1210 }
1211}
1212
1213static int vfio_setup_msi(VFIODevice *vdev, int pos)
1214{
1215 uint16_t ctrl;
1216 bool msi_64bit, msi_maskbit;
1217 int ret, entries;
1218
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1219 if (pread(vdev->fd, &ctrl, sizeof(ctrl),
1220 vdev->config_offset + pos + PCI_CAP_FLAGS) != sizeof(ctrl)) {
1221 return -errno;
1222 }
1223 ctrl = le16_to_cpu(ctrl);
1224
1225 msi_64bit = !!(ctrl & PCI_MSI_FLAGS_64BIT);
1226 msi_maskbit = !!(ctrl & PCI_MSI_FLAGS_MASKBIT);
1227 entries = 1 << ((ctrl & PCI_MSI_FLAGS_QMASK) >> 1);
1228
1229 DPRINTF("%04x:%02x:%02x.%x PCI MSI CAP @0x%x\n", vdev->host.domain,
1230 vdev->host.bus, vdev->host.slot, vdev->host.function, pos);
1231
1232 ret = msi_init(&vdev->pdev, pos, entries, msi_64bit, msi_maskbit);
1233 if (ret < 0) {
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1234 if (ret == -ENOTSUP) {
1235 return 0;
1236 }
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1237 error_report("vfio: msi_init failed\n");
1238 return ret;
1239 }
1240 vdev->msi_cap_size = 0xa + (msi_maskbit ? 0xa : 0) + (msi_64bit ? 0x4 : 0);
1241
1242 return 0;
1243}
1244
1245/*
1246 * We don't have any control over how pci_add_capability() inserts
1247 * capabilities into the chain. In order to setup MSI-X we need a
1248 * MemoryRegion for the BAR. In order to setup the BAR and not
1249 * attempt to mmap the MSI-X table area, which VFIO won't allow, we
1250 * need to first look for where the MSI-X table lives. So we
1251 * unfortunately split MSI-X setup across two functions.
1252 */
1253static int vfio_early_setup_msix(VFIODevice *vdev)
1254{
1255 uint8_t pos;
1256 uint16_t ctrl;
1257 uint32_t table, pba;
1258
1259 pos = pci_find_capability(&vdev->pdev, PCI_CAP_ID_MSIX);
1260 if (!pos) {
1261 return 0;
1262 }
1263
1264 if (pread(vdev->fd, &ctrl, sizeof(ctrl),
1265 vdev->config_offset + pos + PCI_CAP_FLAGS) != sizeof(ctrl)) {
1266 return -errno;
1267 }
1268
1269 if (pread(vdev->fd, &table, sizeof(table),
1270 vdev->config_offset + pos + PCI_MSIX_TABLE) != sizeof(table)) {
1271 return -errno;
1272 }
1273
1274 if (pread(vdev->fd, &pba, sizeof(pba),
1275 vdev->config_offset + pos + PCI_MSIX_PBA) != sizeof(pba)) {
1276 return -errno;
1277 }
1278
1279 ctrl = le16_to_cpu(ctrl);
1280 table = le32_to_cpu(table);
1281 pba = le32_to_cpu(pba);
1282
1283 vdev->msix = g_malloc0(sizeof(*(vdev->msix)));
1284 vdev->msix->table_bar = table & PCI_MSIX_FLAGS_BIRMASK;
1285 vdev->msix->table_offset = table & ~PCI_MSIX_FLAGS_BIRMASK;
1286 vdev->msix->pba_bar = pba & PCI_MSIX_FLAGS_BIRMASK;
1287 vdev->msix->pba_offset = pba & ~PCI_MSIX_FLAGS_BIRMASK;
1288 vdev->msix->entries = (ctrl & PCI_MSIX_FLAGS_QSIZE) + 1;
1289
1290 DPRINTF("%04x:%02x:%02x.%x "
1291 "PCI MSI-X CAP @0x%x, BAR %d, offset 0x%x, entries %d\n",
1292 vdev->host.domain, vdev->host.bus, vdev->host.slot,
1293 vdev->host.function, pos, vdev->msix->table_bar,
1294 vdev->msix->table_offset, vdev->msix->entries);
1295
1296 return 0;
1297}
1298
1299static int vfio_setup_msix(VFIODevice *vdev, int pos)
1300{
1301 int ret;
1302
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1303 ret = msix_init(&vdev->pdev, vdev->msix->entries,
1304 &vdev->bars[vdev->msix->table_bar].mem,
1305 vdev->msix->table_bar, vdev->msix->table_offset,
1306 &vdev->bars[vdev->msix->pba_bar].mem,
1307 vdev->msix->pba_bar, vdev->msix->pba_offset, pos);
1308 if (ret < 0) {
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1309 if (ret == -ENOTSUP) {
1310 return 0;
1311 }
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1312 error_report("vfio: msix_init failed\n");
1313 return ret;
1314 }
1315
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1316 return 0;
1317}
1318
1319static void vfio_teardown_msi(VFIODevice *vdev)
1320{
1321 msi_uninit(&vdev->pdev);
1322
1323 if (vdev->msix) {
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1324 msix_uninit(&vdev->pdev, &vdev->bars[vdev->msix->table_bar].mem,
1325 &vdev->bars[vdev->msix->pba_bar].mem);
1326 }
1327}
1328
1329/*
1330 * Resource setup
1331 */
1332static void vfio_mmap_set_enabled(VFIODevice *vdev, bool enabled)
1333{
1334 int i;
1335
1336 for (i = 0; i < PCI_ROM_SLOT; i++) {
1337 VFIOBAR *bar = &vdev->bars[i];
1338
1339 if (!bar->size) {
1340 continue;
1341 }
1342
1343 memory_region_set_enabled(&bar->mmap_mem, enabled);
1344 if (vdev->msix && vdev->msix->table_bar == i) {
1345 memory_region_set_enabled(&vdev->msix->mmap_mem, enabled);
1346 }
1347 }
1348}
1349
1350static void vfio_unmap_bar(VFIODevice *vdev, int nr)
1351{
1352 VFIOBAR *bar = &vdev->bars[nr];
1353
1354 if (!bar->size) {
1355 return;
1356 }
1357
1358 memory_region_del_subregion(&bar->mem, &bar->mmap_mem);
1359 munmap(bar->mmap, memory_region_size(&bar->mmap_mem));
1360
1361 if (vdev->msix && vdev->msix->table_bar == nr) {
1362 memory_region_del_subregion(&bar->mem, &vdev->msix->mmap_mem);
1363 munmap(vdev->msix->mmap, memory_region_size(&vdev->msix->mmap_mem));
1364 }
1365
1366 memory_region_destroy(&bar->mem);
1367}
1368
1369static int vfio_mmap_bar(VFIOBAR *bar, MemoryRegion *mem, MemoryRegion *submem,
1370 void **map, size_t size, off_t offset,
1371 const char *name)
1372{
1373 int ret = 0;
1374
1375 if (size && bar->flags & VFIO_REGION_INFO_FLAG_MMAP) {
1376 int prot = 0;
1377
1378 if (bar->flags & VFIO_REGION_INFO_FLAG_READ) {
1379 prot |= PROT_READ;
1380 }
1381
1382 if (bar->flags & VFIO_REGION_INFO_FLAG_WRITE) {
1383 prot |= PROT_WRITE;
1384 }
1385
1386 *map = mmap(NULL, size, prot, MAP_SHARED,
1387 bar->fd, bar->fd_offset + offset);
1388 if (*map == MAP_FAILED) {
1389 *map = NULL;
1390 ret = -errno;
1391 goto empty_region;
1392 }
1393
1394 memory_region_init_ram_ptr(submem, name, size, *map);
1395 } else {
1396empty_region:
1397 /* Create a zero sized sub-region to make cleanup easy. */
1398 memory_region_init(submem, name, 0);
1399 }
1400
1401 memory_region_add_subregion(mem, offset, submem);
1402
1403 return ret;
1404}
1405
1406static void vfio_map_bar(VFIODevice *vdev, int nr)
1407{
1408 VFIOBAR *bar = &vdev->bars[nr];
1409 unsigned size = bar->size;
1410 char name[64];
1411 uint32_t pci_bar;
1412 uint8_t type;
1413 int ret;
1414
1415 /* Skip both unimplemented BARs and the upper half of 64bit BARS. */
1416 if (!size) {
1417 return;
1418 }
1419
1420 snprintf(name, sizeof(name), "VFIO %04x:%02x:%02x.%x BAR %d",
1421 vdev->host.domain, vdev->host.bus, vdev->host.slot,
1422 vdev->host.function, nr);
1423
1424 /* Determine what type of BAR this is for registration */
1425 ret = pread(vdev->fd, &pci_bar, sizeof(pci_bar),
1426 vdev->config_offset + PCI_BASE_ADDRESS_0 + (4 * nr));
1427 if (ret != sizeof(pci_bar)) {
1428 error_report("vfio: Failed to read BAR %d (%m)\n", nr);
1429 return;
1430 }
1431
1432 pci_bar = le32_to_cpu(pci_bar);
1433 type = pci_bar & (pci_bar & PCI_BASE_ADDRESS_SPACE_IO ?
1434 ~PCI_BASE_ADDRESS_IO_MASK : ~PCI_BASE_ADDRESS_MEM_MASK);
1435
1436 /* A "slow" read/write mapping underlies all BARs */
1437 memory_region_init_io(&bar->mem, &vfio_bar_ops, bar, name, size);
1438 pci_register_bar(&vdev->pdev, nr, type, &bar->mem);
1439
1440 /*
1441 * We can't mmap areas overlapping the MSIX vector table, so we
1442 * potentially insert a direct-mapped subregion before and after it.
1443 */
1444 if (vdev->msix && vdev->msix->table_bar == nr) {
1445 size = vdev->msix->table_offset & TARGET_PAGE_MASK;
1446 }
1447
1448 strncat(name, " mmap", sizeof(name) - strlen(name) - 1);
1449 if (vfio_mmap_bar(bar, &bar->mem,
1450 &bar->mmap_mem, &bar->mmap, size, 0, name)) {
1451 error_report("%s unsupported. Performance may be slow\n", name);
1452 }
1453
1454 if (vdev->msix && vdev->msix->table_bar == nr) {
1455 unsigned start;
1456
1457 start = TARGET_PAGE_ALIGN(vdev->msix->table_offset +
1458 (vdev->msix->entries * PCI_MSIX_ENTRY_SIZE));
1459
1460 size = start < bar->size ? bar->size - start : 0;
1461 strncat(name, " msix-hi", sizeof(name) - strlen(name) - 1);
1462 /* VFIOMSIXInfo contains another MemoryRegion for this mapping */
1463 if (vfio_mmap_bar(bar, &bar->mem, &vdev->msix->mmap_mem,
1464 &vdev->msix->mmap, size, start, name)) {
1465 error_report("%s unsupported. Performance may be slow\n", name);
1466 }
1467 }
1468}
1469
1470static void vfio_map_bars(VFIODevice *vdev)
1471{
1472 int i;
1473
1474 for (i = 0; i < PCI_ROM_SLOT; i++) {
1475 vfio_map_bar(vdev, i);
1476 }
1477}
1478
1479static void vfio_unmap_bars(VFIODevice *vdev)
1480{
1481 int i;
1482
1483 for (i = 0; i < PCI_ROM_SLOT; i++) {
1484 vfio_unmap_bar(vdev, i);
1485 }
1486}
1487
1488/*
1489 * General setup
1490 */
1491static uint8_t vfio_std_cap_max_size(PCIDevice *pdev, uint8_t pos)
1492{
1493 uint8_t tmp, next = 0xff;
1494
1495 for (tmp = pdev->config[PCI_CAPABILITY_LIST]; tmp;
1496 tmp = pdev->config[tmp + 1]) {
1497 if (tmp > pos && tmp < next) {
1498 next = tmp;
1499 }
1500 }
1501
1502 return next - pos;
1503}
1504
1505static int vfio_add_std_cap(VFIODevice *vdev, uint8_t pos)
1506{
1507 PCIDevice *pdev = &vdev->pdev;
1508 uint8_t cap_id, next, size;
1509 int ret;
1510
1511 cap_id = pdev->config[pos];
1512 next = pdev->config[pos + 1];
1513
1514 /*
1515 * If it becomes important to configure capabilities to their actual
1516 * size, use this as the default when it's something we don't recognize.
1517 * Since QEMU doesn't actually handle many of the config accesses,
1518 * exact size doesn't seem worthwhile.
1519 */
1520 size = vfio_std_cap_max_size(pdev, pos);
1521
1522 /*
1523 * pci_add_capability always inserts the new capability at the head
1524 * of the chain. Therefore to end up with a chain that matches the
1525 * physical device, we insert from the end by making this recursive.
1526 * This is also why we pre-caclulate size above as cached config space
1527 * will be changed as we unwind the stack.
1528 */
1529 if (next) {
1530 ret = vfio_add_std_cap(vdev, next);
1531 if (ret) {
1532 return ret;
1533 }
1534 } else {
1535 pdev->config[PCI_CAPABILITY_LIST] = 0; /* Begin the rebuild */
1536 }
1537
1538 switch (cap_id) {
1539 case PCI_CAP_ID_MSI:
1540 ret = vfio_setup_msi(vdev, pos);
1541 break;
1542 case PCI_CAP_ID_MSIX:
1543 ret = vfio_setup_msix(vdev, pos);
1544 break;
1545 default:
1546 ret = pci_add_capability(pdev, cap_id, pos, size);
1547 break;
1548 }
1549
1550 if (ret < 0) {
1551 error_report("vfio: %04x:%02x:%02x.%x Error adding PCI capability "
1552 "0x%x[0x%x]@0x%x: %d\n", vdev->host.domain,
1553 vdev->host.bus, vdev->host.slot, vdev->host.function,
1554 cap_id, size, pos, ret);
1555 return ret;
1556 }
1557
1558 return 0;
1559}
1560
1561static int vfio_add_capabilities(VFIODevice *vdev)
1562{
1563 PCIDevice *pdev = &vdev->pdev;
1564
1565 if (!(pdev->config[PCI_STATUS] & PCI_STATUS_CAP_LIST) ||
1566 !pdev->config[PCI_CAPABILITY_LIST]) {
1567 return 0; /* Nothing to add */
1568 }
1569
1570 return vfio_add_std_cap(vdev, pdev->config[PCI_CAPABILITY_LIST]);
1571}
1572
1573static int vfio_load_rom(VFIODevice *vdev)
1574{
1575 uint64_t size = vdev->rom_size;
1576 char name[32];
1577 off_t off = 0, voff = vdev->rom_offset;
1578 ssize_t bytes;
1579 void *ptr;
1580
1581 /* If loading ROM from file, pci handles it */
1582 if (vdev->pdev.romfile || !vdev->pdev.rom_bar || !size) {
1583 return 0;
1584 }
1585
1586 DPRINTF("%s(%04x:%02x:%02x.%x)\n", __func__, vdev->host.domain,
1587 vdev->host.bus, vdev->host.slot, vdev->host.function);
1588
1589 snprintf(name, sizeof(name), "vfio[%04x:%02x:%02x.%x].rom",
1590 vdev->host.domain, vdev->host.bus, vdev->host.slot,
1591 vdev->host.function);
1592 memory_region_init_ram(&vdev->pdev.rom, name, size);
1593 ptr = memory_region_get_ram_ptr(&vdev->pdev.rom);
1594 memset(ptr, 0xff, size);
1595
1596 while (size) {
1597 bytes = pread(vdev->fd, ptr + off, size, voff + off);
1598 if (bytes == 0) {
1599 break; /* expect that we could get back less than the ROM BAR */
1600 } else if (bytes > 0) {
1601 off += bytes;
1602 size -= bytes;
1603 } else {
1604 if (errno == EINTR || errno == EAGAIN) {
1605 continue;
1606 }
1607 error_report("vfio: Error reading device ROM: %m\n");
1608 memory_region_destroy(&vdev->pdev.rom);
1609 return -errno;
1610 }
1611 }
1612
1613 pci_register_bar(&vdev->pdev, PCI_ROM_SLOT, 0, &vdev->pdev.rom);
1614 vdev->pdev.has_rom = true;
1615 return 0;
1616}
1617
1618static int vfio_connect_container(VFIOGroup *group)
1619{
1620 VFIOContainer *container;
1621 int ret, fd;
1622
1623 if (group->container) {
1624 return 0;
1625 }
1626
1627 QLIST_FOREACH(container, &container_list, next) {
1628 if (!ioctl(group->fd, VFIO_GROUP_SET_CONTAINER, &container->fd)) {
1629 group->container = container;
1630 QLIST_INSERT_HEAD(&container->group_list, group, container_next);
1631 return 0;
1632 }
1633 }
1634
1635 fd = qemu_open("/dev/vfio/vfio", O_RDWR);
1636 if (fd < 0) {
1637 error_report("vfio: failed to open /dev/vfio/vfio: %m\n");
1638 return -errno;
1639 }
1640
1641 ret = ioctl(fd, VFIO_GET_API_VERSION);
1642 if (ret != VFIO_API_VERSION) {
1643 error_report("vfio: supported vfio version: %d, "
1644 "reported version: %d\n", VFIO_API_VERSION, ret);
1645 close(fd);
1646 return -EINVAL;
1647 }
1648
1649 container = g_malloc0(sizeof(*container));
1650 container->fd = fd;
1651
1652 if (ioctl(fd, VFIO_CHECK_EXTENSION, VFIO_TYPE1_IOMMU)) {
1653 ret = ioctl(group->fd, VFIO_GROUP_SET_CONTAINER, &fd);
1654 if (ret) {
1655 error_report("vfio: failed to set group container: %m\n");
1656 g_free(container);
1657 close(fd);
1658 return -errno;
1659 }
1660
1661 ret = ioctl(fd, VFIO_SET_IOMMU, VFIO_TYPE1_IOMMU);
1662 if (ret) {
1663 error_report("vfio: failed to set iommu for container: %m\n");
1664 g_free(container);
1665 close(fd);
1666 return -errno;
1667 }
1668
1669 container->iommu_data.listener = vfio_memory_listener;
1670 container->iommu_data.release = vfio_listener_release;
1671
f6790af6 1672 memory_listener_register(&container->iommu_data.listener, &address_space_memory);
65501a74
AW
1673 } else {
1674 error_report("vfio: No available IOMMU models\n");
1675 g_free(container);
1676 close(fd);
1677 return -EINVAL;
1678 }
1679
1680 QLIST_INIT(&container->group_list);
1681 QLIST_INSERT_HEAD(&container_list, container, next);
1682
1683 group->container = container;
1684 QLIST_INSERT_HEAD(&container->group_list, group, container_next);
1685
1686 return 0;
1687}
1688
1689static void vfio_disconnect_container(VFIOGroup *group)
1690{
1691 VFIOContainer *container = group->container;
1692
1693 if (ioctl(group->fd, VFIO_GROUP_UNSET_CONTAINER, &container->fd)) {
1694 error_report("vfio: error disconnecting group %d from container\n",
1695 group->groupid);
1696 }
1697
1698 QLIST_REMOVE(group, container_next);
1699 group->container = NULL;
1700
1701 if (QLIST_EMPTY(&container->group_list)) {
1702 if (container->iommu_data.release) {
1703 container->iommu_data.release(container);
1704 }
1705 QLIST_REMOVE(container, next);
1706 DPRINTF("vfio_disconnect_container: close container->fd\n");
1707 close(container->fd);
1708 g_free(container);
1709 }
1710}
1711
1712static VFIOGroup *vfio_get_group(int groupid)
1713{
1714 VFIOGroup *group;
1715 char path[32];
1716 struct vfio_group_status status = { .argsz = sizeof(status) };
1717
1718 QLIST_FOREACH(group, &group_list, next) {
1719 if (group->groupid == groupid) {
1720 return group;
1721 }
1722 }
1723
1724 group = g_malloc0(sizeof(*group));
1725
1726 snprintf(path, sizeof(path), "/dev/vfio/%d", groupid);
1727 group->fd = qemu_open(path, O_RDWR);
1728 if (group->fd < 0) {
1729 error_report("vfio: error opening %s: %m\n", path);
1730 g_free(group);
1731 return NULL;
1732 }
1733
1734 if (ioctl(group->fd, VFIO_GROUP_GET_STATUS, &status)) {
1735 error_report("vfio: error getting group status: %m\n");
1736 close(group->fd);
1737 g_free(group);
1738 return NULL;
1739 }
1740
1741 if (!(status.flags & VFIO_GROUP_FLAGS_VIABLE)) {
1742 error_report("vfio: error, group %d is not viable, please ensure "
1743 "all devices within the iommu_group are bound to their "
1744 "vfio bus driver.\n", groupid);
1745 close(group->fd);
1746 g_free(group);
1747 return NULL;
1748 }
1749
1750 group->groupid = groupid;
1751 QLIST_INIT(&group->device_list);
1752
1753 if (vfio_connect_container(group)) {
1754 error_report("vfio: failed to setup container for group %d\n", groupid);
1755 close(group->fd);
1756 g_free(group);
1757 return NULL;
1758 }
1759
1760 QLIST_INSERT_HEAD(&group_list, group, next);
1761
1762 return group;
1763}
1764
1765static void vfio_put_group(VFIOGroup *group)
1766{
1767 if (!QLIST_EMPTY(&group->device_list)) {
1768 return;
1769 }
1770
1771 vfio_disconnect_container(group);
1772 QLIST_REMOVE(group, next);
1773 DPRINTF("vfio_put_group: close group->fd\n");
1774 close(group->fd);
1775 g_free(group);
1776}
1777
1778static int vfio_get_device(VFIOGroup *group, const char *name, VFIODevice *vdev)
1779{
1780 struct vfio_device_info dev_info = { .argsz = sizeof(dev_info) };
1781 struct vfio_region_info reg_info = { .argsz = sizeof(reg_info) };
1782 int ret, i;
1783
1784 ret = ioctl(group->fd, VFIO_GROUP_GET_DEVICE_FD, name);
1785 if (ret < 0) {
1786 error_report("vfio: error getting device %s from group %d: %m\n",
1787 name, group->groupid);
1788 error_report("Verify all devices in group %d are bound to vfio-pci "
1789 "or pci-stub and not already in use\n", group->groupid);
1790 return ret;
1791 }
1792
1793 vdev->fd = ret;
1794 vdev->group = group;
1795 QLIST_INSERT_HEAD(&group->device_list, vdev, next);
1796
1797 /* Sanity check device */
1798 ret = ioctl(vdev->fd, VFIO_DEVICE_GET_INFO, &dev_info);
1799 if (ret) {
1800 error_report("vfio: error getting device info: %m\n");
1801 goto error;
1802 }
1803
1804 DPRINTF("Device %s flags: %u, regions: %u, irgs: %u\n", name,
1805 dev_info.flags, dev_info.num_regions, dev_info.num_irqs);
1806
1807 if (!(dev_info.flags & VFIO_DEVICE_FLAGS_PCI)) {
1808 error_report("vfio: Um, this isn't a PCI device\n");
1809 goto error;
1810 }
1811
1812 vdev->reset_works = !!(dev_info.flags & VFIO_DEVICE_FLAGS_RESET);
1813 if (!vdev->reset_works) {
1814 error_report("Warning, device %s does not support reset\n", name);
1815 }
1816
1817 if (dev_info.num_regions != VFIO_PCI_NUM_REGIONS) {
1818 error_report("vfio: unexpected number of io regions %u\n",
1819 dev_info.num_regions);
1820 goto error;
1821 }
1822
1823 if (dev_info.num_irqs != VFIO_PCI_NUM_IRQS) {
1824 error_report("vfio: unexpected number of irqs %u\n", dev_info.num_irqs);
1825 goto error;
1826 }
1827
1828 for (i = VFIO_PCI_BAR0_REGION_INDEX; i < VFIO_PCI_ROM_REGION_INDEX; i++) {
1829 reg_info.index = i;
1830
1831 ret = ioctl(vdev->fd, VFIO_DEVICE_GET_REGION_INFO, &reg_info);
1832 if (ret) {
1833 error_report("vfio: Error getting region %d info: %m\n", i);
1834 goto error;
1835 }
1836
1837 DPRINTF("Device %s region %d:\n", name, i);
1838 DPRINTF(" size: 0x%lx, offset: 0x%lx, flags: 0x%lx\n",
1839 (unsigned long)reg_info.size, (unsigned long)reg_info.offset,
1840 (unsigned long)reg_info.flags);
1841
1842 vdev->bars[i].flags = reg_info.flags;
1843 vdev->bars[i].size = reg_info.size;
1844 vdev->bars[i].fd_offset = reg_info.offset;
1845 vdev->bars[i].fd = vdev->fd;
1846 vdev->bars[i].nr = i;
1847 }
1848
1849 reg_info.index = VFIO_PCI_ROM_REGION_INDEX;
1850
1851 ret = ioctl(vdev->fd, VFIO_DEVICE_GET_REGION_INFO, &reg_info);
1852 if (ret) {
1853 error_report("vfio: Error getting ROM info: %m\n");
1854 goto error;
1855 }
1856
1857 DPRINTF("Device %s ROM:\n", name);
1858 DPRINTF(" size: 0x%lx, offset: 0x%lx, flags: 0x%lx\n",
1859 (unsigned long)reg_info.size, (unsigned long)reg_info.offset,
1860 (unsigned long)reg_info.flags);
1861
1862 vdev->rom_size = reg_info.size;
1863 vdev->rom_offset = reg_info.offset;
1864
1865 reg_info.index = VFIO_PCI_CONFIG_REGION_INDEX;
1866
1867 ret = ioctl(vdev->fd, VFIO_DEVICE_GET_REGION_INFO, &reg_info);
1868 if (ret) {
1869 error_report("vfio: Error getting config info: %m\n");
1870 goto error;
1871 }
1872
1873 DPRINTF("Device %s config:\n", name);
1874 DPRINTF(" size: 0x%lx, offset: 0x%lx, flags: 0x%lx\n",
1875 (unsigned long)reg_info.size, (unsigned long)reg_info.offset,
1876 (unsigned long)reg_info.flags);
1877
1878 vdev->config_size = reg_info.size;
1879 vdev->config_offset = reg_info.offset;
1880
1881error:
1882 if (ret) {
1883 QLIST_REMOVE(vdev, next);
1884 vdev->group = NULL;
1885 close(vdev->fd);
1886 }
1887 return ret;
1888}
1889
1890static void vfio_put_device(VFIODevice *vdev)
1891{
1892 QLIST_REMOVE(vdev, next);
1893 vdev->group = NULL;
1894 DPRINTF("vfio_put_device: close vdev->fd\n");
1895 close(vdev->fd);
1896 if (vdev->msix) {
1897 g_free(vdev->msix);
1898 vdev->msix = NULL;
1899 }
1900}
1901
1902static int vfio_initfn(PCIDevice *pdev)
1903{
1904 VFIODevice *pvdev, *vdev = DO_UPCAST(VFIODevice, pdev, pdev);
1905 VFIOGroup *group;
1906 char path[PATH_MAX], iommu_group_path[PATH_MAX], *group_name;
1907 ssize_t len;
1908 struct stat st;
1909 int groupid;
1910 int ret;
1911
1912 /* Check that the host device exists */
1913 snprintf(path, sizeof(path),
1914 "/sys/bus/pci/devices/%04x:%02x:%02x.%01x/",
1915 vdev->host.domain, vdev->host.bus, vdev->host.slot,
1916 vdev->host.function);
1917 if (stat(path, &st) < 0) {
1918 error_report("vfio: error: no such host device: %s\n", path);
1919 return -errno;
1920 }
1921
1922 strncat(path, "iommu_group", sizeof(path) - strlen(path) - 1);
1923
1924 len = readlink(path, iommu_group_path, PATH_MAX);
1925 if (len <= 0) {
1926 error_report("vfio: error no iommu_group for device\n");
1927 return -errno;
1928 }
1929
1930 iommu_group_path[len] = 0;
1931 group_name = basename(iommu_group_path);
1932
1933 if (sscanf(group_name, "%d", &groupid) != 1) {
1934 error_report("vfio: error reading %s: %m\n", path);
1935 return -errno;
1936 }
1937
1938 DPRINTF("%s(%04x:%02x:%02x.%x) group %d\n", __func__, vdev->host.domain,
1939 vdev->host.bus, vdev->host.slot, vdev->host.function, groupid);
1940
1941 group = vfio_get_group(groupid);
1942 if (!group) {
1943 error_report("vfio: failed to get group %d\n", groupid);
1944 return -ENOENT;
1945 }
1946
1947 snprintf(path, sizeof(path), "%04x:%02x:%02x.%01x",
1948 vdev->host.domain, vdev->host.bus, vdev->host.slot,
1949 vdev->host.function);
1950
1951 QLIST_FOREACH(pvdev, &group->device_list, next) {
1952 if (pvdev->host.domain == vdev->host.domain &&
1953 pvdev->host.bus == vdev->host.bus &&
1954 pvdev->host.slot == vdev->host.slot &&
1955 pvdev->host.function == vdev->host.function) {
1956
1957 error_report("vfio: error: device %s is already attached\n", path);
1958 vfio_put_group(group);
1959 return -EBUSY;
1960 }
1961 }
1962
1963 ret = vfio_get_device(group, path, vdev);
1964 if (ret) {
1965 error_report("vfio: failed to get device %s\n", path);
1966 vfio_put_group(group);
1967 return ret;
1968 }
1969
1970 /* Get a copy of config space */
1971 ret = pread(vdev->fd, vdev->pdev.config,
1972 MIN(pci_config_size(&vdev->pdev), vdev->config_size),
1973 vdev->config_offset);
1974 if (ret < (int)MIN(pci_config_size(&vdev->pdev), vdev->config_size)) {
1975 ret = ret < 0 ? -errno : -EFAULT;
1976 error_report("vfio: Failed to read device config space\n");
1977 goto out_put;
1978 }
1979
1980 /*
1981 * Clear host resource mapping info. If we choose not to register a
1982 * BAR, such as might be the case with the option ROM, we can get
1983 * confusing, unwritable, residual addresses from the host here.
1984 */
1985 memset(&vdev->pdev.config[PCI_BASE_ADDRESS_0], 0, 24);
1986 memset(&vdev->pdev.config[PCI_ROM_ADDRESS], 0, 4);
1987
1988 vfio_load_rom(vdev);
1989
1990 ret = vfio_early_setup_msix(vdev);
1991 if (ret) {
1992 goto out_put;
1993 }
1994
1995 vfio_map_bars(vdev);
1996
1997 ret = vfio_add_capabilities(vdev);
1998 if (ret) {
1999 goto out_teardown;
2000 }
2001
2002 if (vfio_pci_read_config(&vdev->pdev, PCI_INTERRUPT_PIN, 1)) {
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2003 vdev->intx.mmap_timer = qemu_new_timer_ms(vm_clock,
2004 vfio_intx_mmap_enable, vdev);
e1d1e586 2005 pci_device_set_intx_routing_notifier(&vdev->pdev, vfio_update_irq);
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2006 ret = vfio_enable_intx(vdev);
2007 if (ret) {
2008 goto out_teardown;
2009 }
2010 }
2011
2012 return 0;
2013
2014out_teardown:
2015 pci_device_set_intx_routing_notifier(&vdev->pdev, NULL);
2016 vfio_teardown_msi(vdev);
2017 vfio_unmap_bars(vdev);
2018out_put:
2019 vfio_put_device(vdev);
2020 vfio_put_group(group);
2021 return ret;
2022}
2023
2024static void vfio_exitfn(PCIDevice *pdev)
2025{
2026 VFIODevice *vdev = DO_UPCAST(VFIODevice, pdev, pdev);
2027 VFIOGroup *group = vdev->group;
2028
2029 pci_device_set_intx_routing_notifier(&vdev->pdev, NULL);
2030 vfio_disable_interrupts(vdev);
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2031 if (vdev->intx.mmap_timer) {
2032 qemu_free_timer(vdev->intx.mmap_timer);
2033 }
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2034 vfio_teardown_msi(vdev);
2035 vfio_unmap_bars(vdev);
2036 vfio_put_device(vdev);
2037 vfio_put_group(group);
2038}
2039
2040static void vfio_pci_reset(DeviceState *dev)
2041{
2042 PCIDevice *pdev = DO_UPCAST(PCIDevice, qdev, dev);
2043 VFIODevice *vdev = DO_UPCAST(VFIODevice, pdev, pdev);
5834a83f 2044 uint16_t cmd;
65501a74 2045
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2046 DPRINTF("%s(%04x:%02x:%02x.%x)\n", __func__, vdev->host.domain,
2047 vdev->host.bus, vdev->host.slot, vdev->host.function);
2048
2049 vfio_disable_interrupts(vdev);
65501a74 2050
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2051 /*
2052 * Stop any ongoing DMA by disconecting I/O, MMIO, and bus master.
2053 * Also put INTx Disable in known state.
2054 */
2055 cmd = vfio_pci_read_config(pdev, PCI_COMMAND, 2);
2056 cmd &= ~(PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER |
2057 PCI_COMMAND_INTX_DISABLE);
2058 vfio_pci_write_config(pdev, PCI_COMMAND, cmd, 2);
2059
2060 if (vdev->reset_works) {
2061 if (ioctl(vdev->fd, VFIO_DEVICE_RESET)) {
2062 error_report("vfio: Error unable to reset physical device "
2063 "(%04x:%02x:%02x.%x): %m\n", vdev->host.domain,
2064 vdev->host.bus, vdev->host.slot, vdev->host.function);
2065 }
65501a74 2066 }
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2067
2068 vfio_enable_intx(vdev);
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2069}
2070
2071static Property vfio_pci_dev_properties[] = {
2072 DEFINE_PROP_PCI_HOST_DEVADDR("host", VFIODevice, host),
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2073 DEFINE_PROP_UINT32("x-intx-mmap-timeout-ms", VFIODevice,
2074 intx.mmap_timeout, 1100),
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2075 /*
2076 * TODO - support passed fds... is this necessary?
2077 * DEFINE_PROP_STRING("vfiofd", VFIODevice, vfiofd_name),
2078 * DEFINE_PROP_STRING("vfiogroupfd, VFIODevice, vfiogroupfd_name),
2079 */
2080 DEFINE_PROP_END_OF_LIST(),
2081};
2082
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2083static const VMStateDescription vfio_pci_vmstate = {
2084 .name = "vfio-pci",
2085 .unmigratable = 1,
2086};
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2087
2088static void vfio_pci_dev_class_init(ObjectClass *klass, void *data)
2089{
2090 DeviceClass *dc = DEVICE_CLASS(klass);
2091 PCIDeviceClass *pdc = PCI_DEVICE_CLASS(klass);
2092
2093 dc->reset = vfio_pci_reset;
2094 dc->props = vfio_pci_dev_properties;
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2095 dc->vmsd = &vfio_pci_vmstate;
2096 dc->desc = "VFIO-based PCI device assignment";
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2097 pdc->init = vfio_initfn;
2098 pdc->exit = vfio_exitfn;
2099 pdc->config_read = vfio_pci_read_config;
2100 pdc->config_write = vfio_pci_write_config;
2101}
2102
2103static const TypeInfo vfio_pci_dev_info = {
2104 .name = "vfio-pci",
2105 .parent = TYPE_PCI_DEVICE,
2106 .instance_size = sizeof(VFIODevice),
2107 .class_init = vfio_pci_dev_class_init,
2108};
2109
2110static void register_vfio_pci_dev_type(void)
2111{
2112 type_register_static(&vfio_pci_dev_info);
2113}
2114
2115type_init(register_vfio_pci_dev_type)