[qemu.git] / hw / virtio-pci.c

/*
 * Virtio PCI Bindings
 *
 * Copyright IBM, Corp. 2007
 * Copyright (c) 2009 CodeSourcery
 *
 * Authors:
 *  Anthony Liguori   <aliguori@us.ibm.com>
 *  Paul Brook        <paul@codesourcery.com>
 *
 * This work is licensed under the terms of the GNU GPL, version 2.  See
 * the COPYING file in the top-level directory.
 *
 */

#include <inttypes.h>

#include "virtio.h"
#include "pci.h"
#include "sysemu.h"
#include "msix.h"
#include "net.h"

/* from Linux's linux/virtio_pci.h */

/* A 32-bit r/o bitmask of the features supported by the host */
#define VIRTIO_PCI_HOST_FEATURES        0

/* A 32-bit r/w bitmask of features activated by the guest */
#define VIRTIO_PCI_GUEST_FEATURES       4

/* A 32-bit r/w PFN for the currently selected queue */
#define VIRTIO_PCI_QUEUE_PFN            8

/* A 16-bit r/o queue size for the currently selected queue */
#define VIRTIO_PCI_QUEUE_NUM            12

/* A 16-bit r/w queue selector */
#define VIRTIO_PCI_QUEUE_SEL            14

/* A 16-bit r/w queue notifier */
#define VIRTIO_PCI_QUEUE_NOTIFY         16

/* An 8-bit device status register.  */
#define VIRTIO_PCI_STATUS               18

/* An 8-bit r/o interrupt status register.  Reading the value will return the
 * current contents of the ISR and will also clear it.  This is effectively
 * a read-and-acknowledge. */
#define VIRTIO_PCI_ISR                  19

/* MSI-X registers: only enabled if MSI-X is enabled. */
/* A 16-bit vector for configuration changes. */
#define VIRTIO_MSI_CONFIG_VECTOR        20
/* A 16-bit vector for selected queue notifications. */
#define VIRTIO_MSI_QUEUE_VECTOR         22

/* Config space size */
#define VIRTIO_PCI_CONFIG_NOMSI         20
#define VIRTIO_PCI_CONFIG_MSI           24
#define VIRTIO_PCI_REGION_SIZE(dev)     (msix_present(dev) ? \
                                         VIRTIO_PCI_CONFIG_MSI : \
                                         VIRTIO_PCI_CONFIG_NOMSI)

/* The remaining space is defined by each driver as the per-driver
 * configuration space */
#define VIRTIO_PCI_CONFIG(dev)          (msix_enabled(dev) ? \
                                         VIRTIO_PCI_CONFIG_MSI : \
                                         VIRTIO_PCI_CONFIG_NOMSI)

/* Virtio ABI version, if we increment this, we break the guest driver. */
#define VIRTIO_PCI_ABI_VERSION          0

/* How many bits to shift physical queue address written to QUEUE_PFN.
 * 12 is historical, and due to x86 page size. */
#define VIRTIO_PCI_QUEUE_ADDR_SHIFT    12

/* QEMU doesn't strictly need write barriers since everything runs in
 * lock-step.  We'll leave the calls to wmb() in though to make it obvious for
 * KVM or if kqemu gets SMP support.
 */
#define wmb() do { } while (0)

/* PCI bindings.  */

typedef struct {
    PCIDevice pci_dev;
    VirtIODevice *vdev;
    uint32_t addr;
    uint32_t class_code;
    uint32_t nvectors;
    DriveInfo *dinfo;
} VirtIOPCIProxy;

/* virtio device */

static void virtio_pci_notify(void *opaque, uint16_t vector)
{
    VirtIOPCIProxy *proxy = opaque;
    if (msix_enabled(&proxy->pci_dev))
        msix_notify(&proxy->pci_dev, vector);
    else
        qemu_set_irq(proxy->pci_dev.irq[0], proxy->vdev->isr & 1);
}

static void virtio_pci_save_config(void * opaque, QEMUFile *f)
{
    VirtIOPCIProxy *proxy = opaque;
    pci_device_save(&proxy->pci_dev, f);
    msix_save(&proxy->pci_dev, f);
    if (msix_present(&proxy->pci_dev))
        qemu_put_be16(f, proxy->vdev->config_vector);
}

static void virtio_pci_save_queue(void * opaque, int n, QEMUFile *f)
{
    VirtIOPCIProxy *proxy = opaque;
    if (msix_present(&proxy->pci_dev))
        qemu_put_be16(f, virtio_queue_vector(proxy->vdev, n));
}

static int virtio_pci_load_config(void * opaque, QEMUFile *f)
{
    VirtIOPCIProxy *proxy = opaque;
    int ret;
    ret = pci_device_load(&proxy->pci_dev, f);
    if (ret) {
        return ret;
    }
    msix_load(&proxy->pci_dev, f);
    if (msix_present(&proxy->pci_dev)) {
        qemu_get_be16s(f, &proxy->vdev->config_vector);
    } else {
        proxy->vdev->config_vector = VIRTIO_NO_VECTOR;
    }
    if (proxy->vdev->config_vector != VIRTIO_NO_VECTOR) {
        return msix_vector_use(&proxy->pci_dev, proxy->vdev->config_vector);
    }
    return 0;
}

static int virtio_pci_load_queue(void * opaque, int n, QEMUFile *f)
{
    VirtIOPCIProxy *proxy = opaque;
    uint16_t vector;
    if (msix_present(&proxy->pci_dev)) {
        qemu_get_be16s(f, &vector);
    } else {
        vector = VIRTIO_NO_VECTOR;
    }
    virtio_queue_set_vector(proxy->vdev, n, vector);
    if (vector != VIRTIO_NO_VECTOR) {
        return msix_vector_use(&proxy->pci_dev, vector);
    }
    return 0;
}

static void virtio_pci_reset(void *opaque)
{
    VirtIOPCIProxy *proxy = opaque;
    virtio_reset(proxy->vdev);
    msix_reset(&proxy->pci_dev);
}

static void virtio_ioport_write(void *opaque, uint32_t addr, uint32_t val)
{
    VirtIOPCIProxy *proxy = opaque;
    VirtIODevice *vdev = proxy->vdev;
    target_phys_addr_t pa;

    switch (addr) {
    case VIRTIO_PCI_GUEST_FEATURES:
	/* Guest does not negotiate properly?  We have to assume nothing. */
	if (val & (1 << VIRTIO_F_BAD_FEATURE)) {
	    if (vdev->bad_features)
		val = vdev->bad_features(vdev);
	    else
		val = 0;
	}
        if (vdev->set_features)
            vdev->set_features(vdev, val);
        vdev->features = val;
        break;
    case VIRTIO_PCI_QUEUE_PFN:
        pa = (target_phys_addr_t)val << VIRTIO_PCI_QUEUE_ADDR_SHIFT;
        if (pa == 0)
            virtio_pci_reset(proxy);
        else
            virtio_queue_set_addr(vdev, vdev->queue_sel, pa);
        break;
    case VIRTIO_PCI_QUEUE_SEL:
        if (val < VIRTIO_PCI_QUEUE_MAX)
            vdev->queue_sel = val;
        break;
    case VIRTIO_PCI_QUEUE_NOTIFY:
        virtio_queue_notify(vdev, val);
        break;
    case VIRTIO_PCI_STATUS:
        vdev->status = val & 0xFF;
        if (vdev->status == 0)
            virtio_pci_reset(proxy);
        break;
    case VIRTIO_MSI_CONFIG_VECTOR:
        msix_vector_unuse(&proxy->pci_dev, vdev->config_vector);
        /* Make it possible for guest to discover an error took place. */
        if (msix_vector_use(&proxy->pci_dev, val) < 0)
            val = VIRTIO_NO_VECTOR;
        vdev->config_vector = val;
        break;
    case VIRTIO_MSI_QUEUE_VECTOR:
        msix_vector_unuse(&proxy->pci_dev,
                          virtio_queue_vector(vdev, vdev->queue_sel));
        /* Make it possible for guest to discover an error took place. */
        if (msix_vector_use(&proxy->pci_dev, val) < 0)
            val = VIRTIO_NO_VECTOR;
        virtio_queue_set_vector(vdev, vdev->queue_sel, val);
        break;
    default:
        fprintf(stderr, "%s: unexpected address 0x%x value 0x%x\n",
                __func__, addr, val);
        break;
    }
}

static uint32_t virtio_ioport_read(VirtIOPCIProxy *proxy, uint32_t addr)
{
    VirtIODevice *vdev = proxy->vdev;
    uint32_t ret = 0xFFFFFFFF;

    switch (addr) {
    case VIRTIO_PCI_HOST_FEATURES:
        ret = vdev->get_features(vdev);
        ret |= (1 << VIRTIO_F_NOTIFY_ON_EMPTY);
        ret |= (1 << VIRTIO_RING_F_INDIRECT_DESC);
        ret |= (1 << VIRTIO_F_BAD_FEATURE);
        break;
    case VIRTIO_PCI_GUEST_FEATURES:
        ret = vdev->features;
        break;
    case VIRTIO_PCI_QUEUE_PFN:
        ret = virtio_queue_get_addr(vdev, vdev->queue_sel)
              >> VIRTIO_PCI_QUEUE_ADDR_SHIFT;
        break;
    case VIRTIO_PCI_QUEUE_NUM:
        ret = virtio_queue_get_num(vdev, vdev->queue_sel);
        break;
    case VIRTIO_PCI_QUEUE_SEL:
        ret = vdev->queue_sel;
        break;
    case VIRTIO_PCI_STATUS:
        ret = vdev->status;
        break;
    case VIRTIO_PCI_ISR:
        /* reading from the ISR also clears it. */
        ret = vdev->isr;
        vdev->isr = 0;
        qemu_set_irq(proxy->pci_dev.irq[0], 0);
        break;
    case VIRTIO_MSI_CONFIG_VECTOR:
        ret = vdev->config_vector;
        break;
    case VIRTIO_MSI_QUEUE_VECTOR:
        ret = virtio_queue_vector(vdev, vdev->queue_sel);
        break;
    default:
        break;
    }

    return ret;
}

static uint32_t virtio_pci_config_readb(void *opaque, uint32_t addr)
{
    VirtIOPCIProxy *proxy = opaque;
    uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
    addr -= proxy->addr;
    if (addr < config)
        return virtio_ioport_read(proxy, addr);
    addr -= config;
    return virtio_config_readb(proxy->vdev, addr);
}

static uint32_t virtio_pci_config_readw(void *opaque, uint32_t addr)
{
    VirtIOPCIProxy *proxy = opaque;
    uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
    addr -= proxy->addr;
    if (addr < config)
        return virtio_ioport_read(proxy, addr);
    addr -= config;
    return virtio_config_readw(proxy->vdev, addr);
}

static uint32_t virtio_pci_config_readl(void *opaque, uint32_t addr)
{
    VirtIOPCIProxy *proxy = opaque;
    uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
    addr -= proxy->addr;
    if (addr < config)
        return virtio_ioport_read(proxy, addr);
    addr -= config;
    return virtio_config_readl(proxy->vdev, addr);
}

static void virtio_pci_config_writeb(void *opaque, uint32_t addr, uint32_t val)
{
    VirtIOPCIProxy *proxy = opaque;
    uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
    addr -= proxy->addr;
    if (addr < config) {
        virtio_ioport_write(proxy, addr, val);
        return;
    }
    addr -= config;
    virtio_config_writeb(proxy->vdev, addr, val);
}

static void virtio_pci_config_writew(void *opaque, uint32_t addr, uint32_t val)
{
    VirtIOPCIProxy *proxy = opaque;
    uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
    addr -= proxy->addr;
    if (addr < config) {
        virtio_ioport_write(proxy, addr, val);
        return;
    }
    addr -= config;
    virtio_config_writew(proxy->vdev, addr, val);
}

static void virtio_pci_config_writel(void *opaque, uint32_t addr, uint32_t val)
{
    VirtIOPCIProxy *proxy = opaque;
    uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
    addr -= proxy->addr;
    if (addr < config) {
        virtio_ioport_write(proxy, addr, val);
        return;
    }
    addr -= config;
    virtio_config_writel(proxy->vdev, addr, val);
}

static void virtio_map(PCIDevice *pci_dev, int region_num,
                       uint32_t addr, uint32_t size, int type)
{
    VirtIOPCIProxy *proxy = container_of(pci_dev, VirtIOPCIProxy, pci_dev);
    VirtIODevice *vdev = proxy->vdev;
    unsigned config_len = VIRTIO_PCI_REGION_SIZE(pci_dev) + vdev->config_len;

    proxy->addr = addr;

    register_ioport_write(addr, config_len, 1, virtio_pci_config_writeb, proxy);
    register_ioport_write(addr, config_len, 2, virtio_pci_config_writew, proxy);
    register_ioport_write(addr, config_len, 4, virtio_pci_config_writel, proxy);
    register_ioport_read(addr, config_len, 1, virtio_pci_config_readb, proxy);
    register_ioport_read(addr, config_len, 2, virtio_pci_config_readw, proxy);
    register_ioport_read(addr, config_len, 4, virtio_pci_config_readl, proxy);

    if (vdev->config_len)
        vdev->get_config(vdev, vdev->config);
}

static void virtio_write_config(PCIDevice *pci_dev, uint32_t address,
                                uint32_t val, int len)
{
    pci_default_write_config(pci_dev, address, val, len);
    msix_write_config(pci_dev, address, val, len);
}

static const VirtIOBindings virtio_pci_bindings = {
    .notify = virtio_pci_notify,
    .save_config = virtio_pci_save_config,
    .load_config = virtio_pci_load_config,
    .save_queue = virtio_pci_save_queue,
    .load_queue = virtio_pci_load_queue,
};

static void virtio_init_pci(VirtIOPCIProxy *proxy, VirtIODevice *vdev,
                            uint16_t vendor, uint16_t device,
                            uint16_t class_code, uint8_t pif)
{
    uint8_t *config;
    uint32_t size;

    proxy->vdev = vdev;

    config = proxy->pci_dev.config;
    pci_config_set_vendor_id(config, vendor);
    pci_config_set_device_id(config, device);

    config[0x08] = VIRTIO_PCI_ABI_VERSION;

    config[0x09] = pif;
    pci_config_set_class(config, class_code);
    config[PCI_HEADER_TYPE] = PCI_HEADER_TYPE_NORMAL;

    config[0x2c] = vendor & 0xFF;
    config[0x2d] = (vendor >> 8) & 0xFF;
    config[0x2e] = vdev->device_id & 0xFF;
    config[0x2f] = (vdev->device_id >> 8) & 0xFF;

    config[0x3d] = 1;

    if (vdev->nvectors && !msix_init(&proxy->pci_dev, vdev->nvectors, 1, 0)) {
        pci_register_bar(&proxy->pci_dev, 1,
                         msix_bar_size(&proxy->pci_dev),
                         PCI_ADDRESS_SPACE_MEM,
                         msix_mmio_map);
        proxy->pci_dev.config_write = virtio_write_config;
        proxy->pci_dev.unregister = msix_uninit;
    } else
        vdev->nvectors = 0;

    size = VIRTIO_PCI_REGION_SIZE(&proxy->pci_dev) + vdev->config_len;
    if (size & (size-1))
        size = 1 << qemu_fls(size);

    pci_register_bar(&proxy->pci_dev, 0, size, PCI_ADDRESS_SPACE_IO,
                           virtio_map);

    qemu_register_reset(virtio_pci_reset, proxy);

    virtio_bind_device(vdev, &virtio_pci_bindings, proxy);
}

static int virtio_blk_init_pci(PCIDevice *pci_dev)
{
    VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
    VirtIODevice *vdev;

    if (proxy->class_code != PCI_CLASS_STORAGE_SCSI &&
        proxy->class_code != PCI_CLASS_STORAGE_OTHER)
        proxy->class_code = PCI_CLASS_STORAGE_SCSI;

    if (!proxy->dinfo) {
        qemu_error("virtio-blk-pci: drive property not set\n");
        return -1;
    }
    vdev = virtio_blk_init(&pci_dev->qdev, proxy->dinfo);
    vdev->nvectors = proxy->nvectors;
    virtio_init_pci(proxy, vdev,
                    PCI_VENDOR_ID_REDHAT_QUMRANET,
                    PCI_DEVICE_ID_VIRTIO_BLOCK,
                    proxy->class_code, 0x00);
    /* make the actual value visible */
    proxy->nvectors = vdev->nvectors;
    return 0;
}

static int virtio_console_init_pci(PCIDevice *pci_dev)
{
    VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
    VirtIODevice *vdev;

    if (proxy->class_code != PCI_CLASS_COMMUNICATION_OTHER &&
        proxy->class_code != PCI_CLASS_DISPLAY_OTHER && /* qemu 0.10 */
        proxy->class_code != PCI_CLASS_OTHERS)          /* qemu-kvm  */
        proxy->class_code = PCI_CLASS_COMMUNICATION_OTHER;

    vdev = virtio_console_init(&pci_dev->qdev);
    virtio_init_pci(proxy, vdev,
                    PCI_VENDOR_ID_REDHAT_QUMRANET,
                    PCI_DEVICE_ID_VIRTIO_CONSOLE,
                    proxy->class_code, 0x00);
    return 0;
}

static int virtio_net_init_pci(PCIDevice *pci_dev)
{
    VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
    VirtIODevice *vdev;

    vdev = virtio_net_init(&pci_dev->qdev);

    /* set nvectors from property, unless the user specified something
     * via -net nic,model=virtio,vectors=n command line option */
    if (pci_dev->qdev.nd->nvectors == NIC_NVECTORS_UNSPECIFIED)
        if (proxy->nvectors != NIC_NVECTORS_UNSPECIFIED)
            vdev->nvectors = proxy->nvectors;

    virtio_init_pci(proxy, vdev,
                    PCI_VENDOR_ID_REDHAT_QUMRANET,
                    PCI_DEVICE_ID_VIRTIO_NET,
                    PCI_CLASS_NETWORK_ETHERNET,
                    0x00);

    /* make the actual value visible */
    proxy->nvectors = vdev->nvectors;
    return 0;
}

static int virtio_balloon_init_pci(PCIDevice *pci_dev)
{
    VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
    VirtIODevice *vdev;

    vdev = virtio_balloon_init(&pci_dev->qdev);
    virtio_init_pci(proxy, vdev,
                    PCI_VENDOR_ID_REDHAT_QUMRANET,
                    PCI_DEVICE_ID_VIRTIO_BALLOON,
                    PCI_CLASS_MEMORY_RAM,
                    0x00);
    return 0;
}

static PCIDeviceInfo virtio_info[] = {
    {
        .qdev.name = "virtio-blk-pci",
        .qdev.size = sizeof(VirtIOPCIProxy),
        .init      = virtio_blk_init_pci,
        .qdev.props = (Property[]) {
            DEFINE_PROP_HEX32("class", VirtIOPCIProxy, class_code, 0),
            DEFINE_PROP_DRIVE("drive", VirtIOPCIProxy, dinfo),
            DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 2),
            DEFINE_PROP_END_OF_LIST(),
        },
    },{
        .qdev.name  = "virtio-net-pci",
        .qdev.size  = sizeof(VirtIOPCIProxy),
        .init       = virtio_net_init_pci,
        .qdev.props = (Property[]) {
            DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors,
                               NIC_NVECTORS_UNSPECIFIED),
            DEFINE_PROP_END_OF_LIST(),
        },
    },{
        .qdev.name = "virtio-console-pci",
        .qdev.size = sizeof(VirtIOPCIProxy),
        .init      = virtio_console_init_pci,
        .qdev.props = (Property[]) {
            DEFINE_PROP_HEX32("class", VirtIOPCIProxy, class_code, 0),
            DEFINE_PROP_END_OF_LIST(),
        },
    },{
        .qdev.name = "virtio-balloon-pci",
        .qdev.size = sizeof(VirtIOPCIProxy),
        .init      = virtio_balloon_init_pci,
    },{
        /* end of list */
    }
};

static void virtio_pci_register_devices(void)
{
    pci_qdev_register_many(virtio_info);
}

device_init(virtio_pci_register_devices)
Commit	Line	Data
53c25cea PB	1	/*
	2	* Virtio PCI Bindings
	3	*
	4	* Copyright IBM, Corp. 2007
	5	* Copyright (c) 2009 CodeSourcery
	6	*
	7	* Authors:
	8	* Anthony Liguori <aliguori@us.ibm.com>
	9	* Paul Brook <paul@codesourcery.com>
	10	*
	11	* This work is licensed under the terms of the GNU GPL, version 2. See
	12	* the COPYING file in the top-level directory.
	13	*
	14	*/
	15
	16	#include <inttypes.h>
	17
	18	#include "virtio.h"
	19	#include "pci.h"
d176c495	20	#include "sysemu.h"
aba800a3	21	#include "msix.h"
a1e0fea5	22	#include "net.h"
53c25cea PB	23
	24	/* from Linux's linux/virtio_pci.h */
	25
	26	/* A 32-bit r/o bitmask of the features supported by the host */
	27	#define VIRTIO_PCI_HOST_FEATURES 0
	28
	29	/* A 32-bit r/w bitmask of features activated by the guest */
	30	#define VIRTIO_PCI_GUEST_FEATURES 4
	31
	32	/* A 32-bit r/w PFN for the currently selected queue */
	33	#define VIRTIO_PCI_QUEUE_PFN 8
	34
	35	/* A 16-bit r/o queue size for the currently selected queue */
	36	#define VIRTIO_PCI_QUEUE_NUM 12
	37
	38	/* A 16-bit r/w queue selector */
	39	#define VIRTIO_PCI_QUEUE_SEL 14
	40
	41	/* A 16-bit r/w queue notifier */
	42	#define VIRTIO_PCI_QUEUE_NOTIFY 16
	43
	44	/* An 8-bit device status register. */
	45	#define VIRTIO_PCI_STATUS 18
	46
	47	/* An 8-bit r/o interrupt status register. Reading the value will return the
	48	* current contents of the ISR and will also clear it. This is effectively
	49	* a read-and-acknowledge. */
	50	#define VIRTIO_PCI_ISR 19
	51
aba800a3 MT	52	/* MSI-X registers: only enabled if MSI-X is enabled. */
	53	/* A 16-bit vector for configuration changes. */
	54	#define VIRTIO_MSI_CONFIG_VECTOR 20
	55	/* A 16-bit vector for selected queue notifications. */
	56	#define VIRTIO_MSI_QUEUE_VECTOR 22
	57
	58	/* Config space size */
	59	#define VIRTIO_PCI_CONFIG_NOMSI 20
	60	#define VIRTIO_PCI_CONFIG_MSI 24
	61	#define VIRTIO_PCI_REGION_SIZE(dev) (msix_present(dev) ? \
	62	VIRTIO_PCI_CONFIG_MSI : \
	63	VIRTIO_PCI_CONFIG_NOMSI)
	64
	65	/* The remaining space is defined by each driver as the per-driver
	66	* configuration space */
	67	#define VIRTIO_PCI_CONFIG(dev) (msix_enabled(dev) ? \
	68	VIRTIO_PCI_CONFIG_MSI : \
	69	VIRTIO_PCI_CONFIG_NOMSI)
53c25cea PB	70
	71	/* Virtio ABI version, if we increment this, we break the guest driver. */
	72	#define VIRTIO_PCI_ABI_VERSION 0
	73
	74	/* How many bits to shift physical queue address written to QUEUE_PFN.
	75	* 12 is historical, and due to x86 page size. */
	76	#define VIRTIO_PCI_QUEUE_ADDR_SHIFT 12
	77
	78	/* QEMU doesn't strictly need write barriers since everything runs in
	79	* lock-step. We'll leave the calls to wmb() in though to make it obvious for
	80	* KVM or if kqemu gets SMP support.
	81	*/
	82	#define wmb() do { } while (0)
	83
	84	/* PCI bindings. */
	85
	86	typedef struct {
	87	PCIDevice pci_dev;
	88	VirtIODevice *vdev;
	89	uint32_t addr;
ab73ff29	90	uint32_t class_code;
a1e0fea5	91	uint32_t nvectors;
d176c495	92	DriveInfo *dinfo;
53c25cea PB	93	} VirtIOPCIProxy;
	94
	95	/* virtio device */
	96
7055e687	97	static void virtio_pci_notify(void *opaque, uint16_t vector)
53c25cea PB	98	{
53c25cea PB	99	VirtIOPCIProxy *proxy = opaque;
aba800a3 MT	100	if (msix_enabled(&proxy->pci_dev))
	101	msix_notify(&proxy->pci_dev, vector);
	102	else
	103	qemu_set_irq(proxy->pci_dev.irq[0], proxy->vdev->isr & 1);
53c25cea PB	104	}
53c25cea PB	105
ff24bd58 MT	106	static void virtio_pci_save_config(void * opaque, QEMUFile *f)
	107	{
	108	VirtIOPCIProxy *proxy = opaque;
	109	pci_device_save(&proxy->pci_dev, f);
	110	msix_save(&proxy->pci_dev, f);
	111	if (msix_present(&proxy->pci_dev))
	112	qemu_put_be16(f, proxy->vdev->config_vector);
	113	}
	114
	115	static void virtio_pci_save_queue(void * opaque, int n, QEMUFile *f)
	116	{
	117	VirtIOPCIProxy *proxy = opaque;
	118	if (msix_present(&proxy->pci_dev))
	119	qemu_put_be16(f, virtio_queue_vector(proxy->vdev, n));
	120	}
	121
	122	static int virtio_pci_load_config(void * opaque, QEMUFile *f)
	123	{
	124	VirtIOPCIProxy *proxy = opaque;
	125	int ret;
	126	ret = pci_device_load(&proxy->pci_dev, f);
e6da7680	127	if (ret) {
ff24bd58	128	return ret;
e6da7680	129	}
ff24bd58	130	msix_load(&proxy->pci_dev, f);
e6da7680	131	if (msix_present(&proxy->pci_dev)) {
ff24bd58	132	qemu_get_be16s(f, &proxy->vdev->config_vector);
e6da7680 MT	133	} else {
	134	proxy->vdev->config_vector = VIRTIO_NO_VECTOR;
	135	}
	136	if (proxy->vdev->config_vector != VIRTIO_NO_VECTOR) {
	137	return msix_vector_use(&proxy->pci_dev, proxy->vdev->config_vector);
	138	}
ff24bd58 MT	139	return 0;
	140	}
	141
	142	static int virtio_pci_load_queue(void * opaque, int n, QEMUFile *f)
	143	{
	144	VirtIOPCIProxy *proxy = opaque;
	145	uint16_t vector;
e6da7680 MT	146	if (msix_present(&proxy->pci_dev)) {
	147	qemu_get_be16s(f, &vector);
	148	} else {
	149	vector = VIRTIO_NO_VECTOR;
	150	}
ff24bd58	151	virtio_queue_set_vector(proxy->vdev, n, vector);
e6da7680 MT	152	if (vector != VIRTIO_NO_VECTOR) {
	153	return msix_vector_use(&proxy->pci_dev, vector);
	154	}
ff24bd58 MT	155	return 0;
	156	}
	157
7055e687 MT	158	static void virtio_pci_reset(void *opaque)
	159	{
	160	VirtIOPCIProxy *proxy = opaque;
	161	virtio_reset(proxy->vdev);
aba800a3	162	msix_reset(&proxy->pci_dev);
7055e687 MT	163	}
7055e687 MT	164
53c25cea PB	165	static void virtio_ioport_write(void *opaque, uint32_t addr, uint32_t val)
	166	{
	167	VirtIOPCIProxy *proxy = opaque;
	168	VirtIODevice *vdev = proxy->vdev;
	169	target_phys_addr_t pa;
	170
53c25cea PB	171	switch (addr) {
	172	case VIRTIO_PCI_GUEST_FEATURES:
	173	/* Guest does not negotiate properly? We have to assume nothing. */
	174	if (val & (1 << VIRTIO_F_BAD_FEATURE)) {
	175	if (vdev->bad_features)
	176	val = vdev->bad_features(vdev);
	177	else
	178	val = 0;
	179	}
	180	if (vdev->set_features)
	181	vdev->set_features(vdev, val);
	182	vdev->features = val;
	183	break;
	184	case VIRTIO_PCI_QUEUE_PFN:
	185	pa = (target_phys_addr_t)val << VIRTIO_PCI_QUEUE_ADDR_SHIFT;
7055e687 MT	186	if (pa == 0)
	187	virtio_pci_reset(proxy);
	188	else
	189	virtio_queue_set_addr(vdev, vdev->queue_sel, pa);
53c25cea PB	190	break;
	191	case VIRTIO_PCI_QUEUE_SEL:
	192	if (val < VIRTIO_PCI_QUEUE_MAX)
	193	vdev->queue_sel = val;
	194	break;
	195	case VIRTIO_PCI_QUEUE_NOTIFY:
	196	virtio_queue_notify(vdev, val);
	197	break;
	198	case VIRTIO_PCI_STATUS:
	199	vdev->status = val & 0xFF;
	200	if (vdev->status == 0)
7055e687	201	virtio_pci_reset(proxy);
53c25cea	202	break;
aba800a3 MT	203	case VIRTIO_MSI_CONFIG_VECTOR:
	204	msix_vector_unuse(&proxy->pci_dev, vdev->config_vector);
	205	/* Make it possible for guest to discover an error took place. */
	206	if (msix_vector_use(&proxy->pci_dev, val) < 0)
	207	val = VIRTIO_NO_VECTOR;
	208	vdev->config_vector = val;
	209	break;
	210	case VIRTIO_MSI_QUEUE_VECTOR:
	211	msix_vector_unuse(&proxy->pci_dev,
	212	virtio_queue_vector(vdev, vdev->queue_sel));
	213	/* Make it possible for guest to discover an error took place. */
	214	if (msix_vector_use(&proxy->pci_dev, val) < 0)
	215	val = VIRTIO_NO_VECTOR;
	216	virtio_queue_set_vector(vdev, vdev->queue_sel, val);
	217	break;
	218	default:
	219	fprintf(stderr, "%s: unexpected address 0x%x value 0x%x\n",
	220	__func__, addr, val);
	221	break;
53c25cea PB	222	}
	223	}
	224
aba800a3	225	static uint32_t virtio_ioport_read(VirtIOPCIProxy *proxy, uint32_t addr)
53c25cea	226	{
53c25cea PB	227	VirtIODevice *vdev = proxy->vdev;
	228	uint32_t ret = 0xFFFFFFFF;
	229
53c25cea PB	230	switch (addr) {
	231	case VIRTIO_PCI_HOST_FEATURES:
	232	ret = vdev->get_features(vdev);
efeea6d0 MM	233	ret \|= (1 << VIRTIO_F_NOTIFY_ON_EMPTY);
	234	ret \|= (1 << VIRTIO_RING_F_INDIRECT_DESC);
	235	ret \|= (1 << VIRTIO_F_BAD_FEATURE);
53c25cea PB	236	break;
	237	case VIRTIO_PCI_GUEST_FEATURES:
	238	ret = vdev->features;
	239	break;
	240	case VIRTIO_PCI_QUEUE_PFN:
	241	ret = virtio_queue_get_addr(vdev, vdev->queue_sel)
	242	>> VIRTIO_PCI_QUEUE_ADDR_SHIFT;
	243	break;
	244	case VIRTIO_PCI_QUEUE_NUM:
	245	ret = virtio_queue_get_num(vdev, vdev->queue_sel);
	246	break;
	247	case VIRTIO_PCI_QUEUE_SEL:
	248	ret = vdev->queue_sel;
	249	break;
	250	case VIRTIO_PCI_STATUS:
	251	ret = vdev->status;
	252	break;
	253	case VIRTIO_PCI_ISR:
	254	/* reading from the ISR also clears it. */
	255	ret = vdev->isr;
	256	vdev->isr = 0;
7055e687	257	qemu_set_irq(proxy->pci_dev.irq[0], 0);
53c25cea	258	break;
aba800a3 MT	259	case VIRTIO_MSI_CONFIG_VECTOR:
	260	ret = vdev->config_vector;
	261	break;
	262	case VIRTIO_MSI_QUEUE_VECTOR:
	263	ret = virtio_queue_vector(vdev, vdev->queue_sel);
	264	break;
53c25cea PB	265	default:
	266	break;
	267	}
	268
	269	return ret;
	270	}
	271
	272	static uint32_t virtio_pci_config_readb(void *opaque, uint32_t addr)
	273	{
	274	VirtIOPCIProxy *proxy = opaque;
aba800a3 MT	275	uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
	276	addr -= proxy->addr;
	277	if (addr < config)
	278	return virtio_ioport_read(proxy, addr);
	279	addr -= config;
53c25cea PB	280	return virtio_config_readb(proxy->vdev, addr);
	281	}
	282
	283	static uint32_t virtio_pci_config_readw(void *opaque, uint32_t addr)
	284	{
	285	VirtIOPCIProxy *proxy = opaque;
aba800a3 MT	286	uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
	287	addr -= proxy->addr;
	288	if (addr < config)
	289	return virtio_ioport_read(proxy, addr);
	290	addr -= config;
53c25cea PB	291	return virtio_config_readw(proxy->vdev, addr);
	292	}
	293
	294	static uint32_t virtio_pci_config_readl(void *opaque, uint32_t addr)
	295	{
	296	VirtIOPCIProxy *proxy = opaque;
aba800a3 MT	297	uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
	298	addr -= proxy->addr;
	299	if (addr < config)
	300	return virtio_ioport_read(proxy, addr);
	301	addr -= config;
53c25cea PB	302	return virtio_config_readl(proxy->vdev, addr);
	303	}
	304
	305	static void virtio_pci_config_writeb(void *opaque, uint32_t addr, uint32_t val)
	306	{
	307	VirtIOPCIProxy *proxy = opaque;
aba800a3 MT	308	uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
	309	addr -= proxy->addr;
	310	if (addr < config) {
	311	virtio_ioport_write(proxy, addr, val);
	312	return;
	313	}
	314	addr -= config;
53c25cea PB	315	virtio_config_writeb(proxy->vdev, addr, val);
	316	}
	317
	318	static void virtio_pci_config_writew(void *opaque, uint32_t addr, uint32_t val)
	319	{
	320	VirtIOPCIProxy *proxy = opaque;
aba800a3 MT	321	uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
	322	addr -= proxy->addr;
	323	if (addr < config) {
	324	virtio_ioport_write(proxy, addr, val);
	325	return;
	326	}
	327	addr -= config;
53c25cea PB	328	virtio_config_writew(proxy->vdev, addr, val);
	329	}
	330
	331	static void virtio_pci_config_writel(void *opaque, uint32_t addr, uint32_t val)
	332	{
	333	VirtIOPCIProxy *proxy = opaque;
aba800a3 MT	334	uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
	335	addr -= proxy->addr;
	336	if (addr < config) {
	337	virtio_ioport_write(proxy, addr, val);
	338	return;
	339	}
	340	addr -= config;
53c25cea PB	341	virtio_config_writel(proxy->vdev, addr, val);
	342	}
	343
	344	static void virtio_map(PCIDevice *pci_dev, int region_num,
	345	uint32_t addr, uint32_t size, int type)
	346	{
	347	VirtIOPCIProxy *proxy = container_of(pci_dev, VirtIOPCIProxy, pci_dev);
	348	VirtIODevice *vdev = proxy->vdev;
aba800a3	349	unsigned config_len = VIRTIO_PCI_REGION_SIZE(pci_dev) + vdev->config_len;
53c25cea PB	350
53c25cea PB	351	proxy->addr = addr;
53c25cea	352
aba800a3 MT	353	register_ioport_write(addr, config_len, 1, virtio_pci_config_writeb, proxy);
	354	register_ioport_write(addr, config_len, 2, virtio_pci_config_writew, proxy);
	355	register_ioport_write(addr, config_len, 4, virtio_pci_config_writel, proxy);
	356	register_ioport_read(addr, config_len, 1, virtio_pci_config_readb, proxy);
	357	register_ioport_read(addr, config_len, 2, virtio_pci_config_readw, proxy);
	358	register_ioport_read(addr, config_len, 4, virtio_pci_config_readl, proxy);
53c25cea	359
aba800a3	360	if (vdev->config_len)
53c25cea	361	vdev->get_config(vdev, vdev->config);
aba800a3 MT	362	}
	363
	364	static void virtio_write_config(PCIDevice *pci_dev, uint32_t address,
	365	uint32_t val, int len)
	366	{
	367	pci_default_write_config(pci_dev, address, val, len);
	368	msix_write_config(pci_dev, address, val, len);
53c25cea PB	369	}
	370
	371	static const VirtIOBindings virtio_pci_bindings = {
ff24bd58 MT	372	.notify = virtio_pci_notify,
	373	.save_config = virtio_pci_save_config,
	374	.load_config = virtio_pci_load_config,
	375	.save_queue = virtio_pci_save_queue,
	376	.load_queue = virtio_pci_load_queue,
53c25cea PB	377	};
	378
	379	static void virtio_init_pci(VirtIOPCIProxy proxy, VirtIODevice vdev,
	380	uint16_t vendor, uint16_t device,
	381	uint16_t class_code, uint8_t pif)
	382	{
	383	uint8_t *config;
	384	uint32_t size;
	385
	386	proxy->vdev = vdev;
	387
	388	config = proxy->pci_dev.config;
	389	pci_config_set_vendor_id(config, vendor);
	390	pci_config_set_device_id(config, device);
	391
	392	config[0x08] = VIRTIO_PCI_ABI_VERSION;
	393
	394	config[0x09] = pif;
	395	pci_config_set_class(config, class_code);
	396	config[PCI_HEADER_TYPE] = PCI_HEADER_TYPE_NORMAL;
	397
	398	config[0x2c] = vendor & 0xFF;
	399	config[0x2d] = (vendor >> 8) & 0xFF;
	400	config[0x2e] = vdev->device_id & 0xFF;
	401	config[0x2f] = (vdev->device_id >> 8) & 0xFF;
	402
	403	config[0x3d] = 1;
	404
aba800a3 MT	405	if (vdev->nvectors && !msix_init(&proxy->pci_dev, vdev->nvectors, 1, 0)) {
	406	pci_register_bar(&proxy->pci_dev, 1,
	407	msix_bar_size(&proxy->pci_dev),
	408	PCI_ADDRESS_SPACE_MEM,
	409	msix_mmio_map);
	410	proxy->pci_dev.config_write = virtio_write_config;
	411	proxy->pci_dev.unregister = msix_uninit;
	412	} else
	413	vdev->nvectors = 0;
	414
	415	size = VIRTIO_PCI_REGION_SIZE(&proxy->pci_dev) + vdev->config_len;
53c25cea PB	416	if (size & (size-1))
	417	size = 1 << qemu_fls(size);
	418
28c2c264	419	pci_register_bar(&proxy->pci_dev, 0, size, PCI_ADDRESS_SPACE_IO,
53c25cea PB	420	virtio_map);
53c25cea PB	421
a08d4367	422	qemu_register_reset(virtio_pci_reset, proxy);
7055e687	423
53c25cea PB	424	virtio_bind_device(vdev, &virtio_pci_bindings, proxy);
	425	}
	426
81a322d4	427	static int virtio_blk_init_pci(PCIDevice *pci_dev)
53c25cea PB	428	{
	429	VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
	430	VirtIODevice *vdev;
	431
ab73ff29 GH	432	if (proxy->class_code != PCI_CLASS_STORAGE_SCSI &&
	433	proxy->class_code != PCI_CLASS_STORAGE_OTHER)
	434	proxy->class_code = PCI_CLASS_STORAGE_SCSI;
53c25cea	435
d176c495	436	if (!proxy->dinfo) {
84fc5589	437	qemu_error("virtio-blk-pci: drive property not set\n");
81a322d4	438	return -1;
d176c495 GH	439	}
d176c495 GH	440	vdev = virtio_blk_init(&pci_dev->qdev, proxy->dinfo);
177539e0	441	vdev->nvectors = proxy->nvectors;
53c25cea PB	442	virtio_init_pci(proxy, vdev,
53c25cea PB	443	PCI_VENDOR_ID_REDHAT_QUMRANET,
85c2c735 MM	444	PCI_DEVICE_ID_VIRTIO_BLOCK,
85c2c735 MM	445	proxy->class_code, 0x00);
177539e0 GH	446	/* make the actual value visible */
177539e0 GH	447	proxy->nvectors = vdev->nvectors;
81a322d4	448	return 0;
21d58b57 MM	449	}
21d58b57 MM	450
81a322d4	451	static int virtio_console_init_pci(PCIDevice *pci_dev)
21d58b57	452	{
d6beee99	453	VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
85c2c735 MM	454	VirtIODevice *vdev;
85c2c735 MM	455
d6beee99 GH	456	if (proxy->class_code != PCI_CLASS_COMMUNICATION_OTHER &&
	457	proxy->class_code != PCI_CLASS_DISPLAY_OTHER && /* qemu 0.10 */
	458	proxy->class_code != PCI_CLASS_OTHERS) /* qemu-kvm */
	459	proxy->class_code = PCI_CLASS_COMMUNICATION_OTHER;
	460
85c2c735 MM	461	vdev = virtio_console_init(&pci_dev->qdev);
	462	virtio_init_pci(proxy, vdev,
	463	PCI_VENDOR_ID_REDHAT_QUMRANET,
	464	PCI_DEVICE_ID_VIRTIO_CONSOLE,
	465	proxy->class_code, 0x00);
81a322d4	466	return 0;
53c25cea PB	467	}
53c25cea PB	468
81a322d4	469	static int virtio_net_init_pci(PCIDevice *pci_dev)
53c25cea PB	470	{
	471	VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
	472	VirtIODevice *vdev;
	473
	474	vdev = virtio_net_init(&pci_dev->qdev);
a1e0fea5 GH	475
	476	/* set nvectors from property, unless the user specified something
	477	* via -net nic,model=virtio,vectors=n command line option */
	478	if (pci_dev->qdev.nd->nvectors == NIC_NVECTORS_UNSPECIFIED)
	479	if (proxy->nvectors != NIC_NVECTORS_UNSPECIFIED)
	480	vdev->nvectors = proxy->nvectors;
	481
53c25cea PB	482	virtio_init_pci(proxy, vdev,
	483	PCI_VENDOR_ID_REDHAT_QUMRANET,
	484	PCI_DEVICE_ID_VIRTIO_NET,
	485	PCI_CLASS_NETWORK_ETHERNET,
	486	0x00);
a1e0fea5 GH	487
	488	/* make the actual value visible */
	489	proxy->nvectors = vdev->nvectors;
81a322d4	490	return 0;
53c25cea PB	491	}
53c25cea PB	492
81a322d4	493	static int virtio_balloon_init_pci(PCIDevice *pci_dev)
53c25cea PB	494	{
	495	VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
	496	VirtIODevice *vdev;
	497
	498	vdev = virtio_balloon_init(&pci_dev->qdev);
	499	virtio_init_pci(proxy, vdev,
	500	PCI_VENDOR_ID_REDHAT_QUMRANET,
	501	PCI_DEVICE_ID_VIRTIO_BALLOON,
	502	PCI_CLASS_MEMORY_RAM,
	503	0x00);
81a322d4	504	return 0;
53c25cea PB	505	}
53c25cea PB	506
0aab0d3a GH	507	static PCIDeviceInfo virtio_info[] = {
	508	{
	509	.qdev.name = "virtio-blk-pci",
	510	.qdev.size = sizeof(VirtIOPCIProxy),
	511	.init = virtio_blk_init_pci,
ab73ff29	512	.qdev.props = (Property[]) {
72c61d0b GH	513	DEFINE_PROP_HEX32("class", VirtIOPCIProxy, class_code, 0),
72c61d0b GH	514	DEFINE_PROP_DRIVE("drive", VirtIOPCIProxy, dinfo),
177539e0	515	DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 2),
72c61d0b	516	DEFINE_PROP_END_OF_LIST(),
ab73ff29	517	},
0aab0d3a	518	},{
a1e0fea5 GH	519	.qdev.name = "virtio-net-pci",
	520	.qdev.size = sizeof(VirtIOPCIProxy),
	521	.init = virtio_net_init_pci,
	522	.qdev.props = (Property[]) {
177539e0 GH	523	DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors,
177539e0 GH	524	NIC_NVECTORS_UNSPECIFIED),
72c61d0b	525	DEFINE_PROP_END_OF_LIST(),
a1e0fea5	526	},
0aab0d3a GH	527	},{
	528	.qdev.name = "virtio-console-pci",
	529	.qdev.size = sizeof(VirtIOPCIProxy),
	530	.init = virtio_console_init_pci,
d6beee99	531	.qdev.props = (Property[]) {
72c61d0b GH	532	DEFINE_PROP_HEX32("class", VirtIOPCIProxy, class_code, 0),
72c61d0b GH	533	DEFINE_PROP_END_OF_LIST(),
d6beee99	534	},
0aab0d3a GH	535	},{
	536	.qdev.name = "virtio-balloon-pci",
	537	.qdev.size = sizeof(VirtIOPCIProxy),
	538	.init = virtio_balloon_init_pci,
	539	},{
	540	/* end of list */
	541	}
	542	};
	543
53c25cea PB	544	static void virtio_pci_register_devices(void)
53c25cea PB	545	{
0aab0d3a	546	pci_qdev_register_many(virtio_info);
53c25cea PB	547	}
	548
	549	device_init(virtio_pci_register_devices)