]>
Commit | Line | Data |
---|---|---|
01195b73 SS |
1 | /* |
2 | * XEN platform pci device, formerly known as the event channel device | |
3 | * | |
4 | * Copyright (c) 2003-2004 Intel Corp. | |
5 | * Copyright (c) 2006 XenSource | |
6 | * | |
7 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
8 | * of this software and associated documentation files (the "Software"), to deal | |
9 | * in the Software without restriction, including without limitation the rights | |
10 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
11 | * copies of the Software, and to permit persons to whom the Software is | |
12 | * furnished to do so, subject to the following conditions: | |
13 | * | |
14 | * The above copyright notice and this permission notice shall be included in | |
15 | * all copies or substantial portions of the Software. | |
16 | * | |
17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
19 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
20 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
21 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
22 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
23 | * THE SOFTWARE. | |
24 | */ | |
25 | ||
26 | #include <assert.h> | |
27 | ||
28 | #include "hw.h" | |
29 | #include "pc.h" | |
30 | #include "pci.h" | |
31 | #include "irq.h" | |
32 | #include "xen_common.h" | |
33 | #include "net.h" | |
34 | #include "xen_backend.h" | |
01195b73 | 35 | #include "trace.h" |
de00982e | 36 | #include "exec-memory.h" |
01195b73 SS |
37 | |
38 | #include <xenguest.h> | |
39 | ||
40 | //#define DEBUG_PLATFORM | |
41 | ||
42 | #ifdef DEBUG_PLATFORM | |
43 | #define DPRINTF(fmt, ...) do { \ | |
44 | fprintf(stderr, "xen_platform: " fmt, ## __VA_ARGS__); \ | |
45 | } while (0) | |
46 | #else | |
47 | #define DPRINTF(fmt, ...) do { } while (0) | |
48 | #endif | |
49 | ||
50 | #define PFFLAG_ROM_LOCK 1 /* Sets whether ROM memory area is RW or RO */ | |
51 | ||
52 | typedef struct PCIXenPlatformState { | |
53 | PCIDevice pci_dev; | |
de00982e AK |
54 | MemoryRegion fixed_io; |
55 | MemoryRegion bar; | |
56 | MemoryRegion mmio_bar; | |
01195b73 SS |
57 | uint8_t flags; /* used only for version_id == 2 */ |
58 | int drivers_blacklisted; | |
59 | uint16_t driver_product_version; | |
60 | ||
61 | /* Log from guest drivers */ | |
62 | char log_buffer[4096]; | |
63 | int log_buffer_off; | |
64 | } PCIXenPlatformState; | |
65 | ||
66 | #define XEN_PLATFORM_IOPORT 0x10 | |
67 | ||
68 | /* Send bytes to syslog */ | |
69 | static void log_writeb(PCIXenPlatformState *s, char val) | |
70 | { | |
71 | if (val == '\n' || s->log_buffer_off == sizeof(s->log_buffer) - 1) { | |
72 | /* Flush buffer */ | |
73 | s->log_buffer[s->log_buffer_off] = 0; | |
74 | trace_xen_platform_log(s->log_buffer); | |
75 | s->log_buffer_off = 0; | |
76 | } else { | |
77 | s->log_buffer[s->log_buffer_off++] = val; | |
78 | } | |
79 | } | |
80 | ||
81 | /* Xen Platform, Fixed IOPort */ | |
679f4f8b SS |
82 | #define UNPLUG_ALL_IDE_DISKS 1 |
83 | #define UNPLUG_ALL_NICS 2 | |
84 | #define UNPLUG_AUX_IDE_DISKS 4 | |
85 | ||
7aa8cbb9 | 86 | static void unplug_nic(PCIBus *b, PCIDevice *d, void *o) |
679f4f8b | 87 | { |
bd4982a6 | 88 | /* We have to ignore passthrough devices */ |
679f4f8b | 89 | if (pci_get_word(d->config + PCI_CLASS_DEVICE) == |
bd4982a6 AP |
90 | PCI_CLASS_NETWORK_ETHERNET |
91 | && strcmp(d->name, "xen-pci-passthrough") != 0) { | |
4accd107 | 92 | qdev_free(&d->qdev); |
679f4f8b SS |
93 | } |
94 | } | |
95 | ||
96 | static void pci_unplug_nics(PCIBus *bus) | |
97 | { | |
7aa8cbb9 | 98 | pci_for_each_device(bus, 0, unplug_nic, NULL); |
679f4f8b SS |
99 | } |
100 | ||
7aa8cbb9 | 101 | static void unplug_disks(PCIBus *b, PCIDevice *d, void *o) |
679f4f8b | 102 | { |
bd4982a6 | 103 | /* We have to ignore passthrough devices */ |
679f4f8b | 104 | if (pci_get_word(d->config + PCI_CLASS_DEVICE) == |
bd4982a6 AP |
105 | PCI_CLASS_STORAGE_IDE |
106 | && strcmp(d->name, "xen-pci-passthrough") != 0) { | |
56f9107e | 107 | qdev_unplug(&(d->qdev), NULL); |
679f4f8b SS |
108 | } |
109 | } | |
110 | ||
111 | static void pci_unplug_disks(PCIBus *bus) | |
112 | { | |
7aa8cbb9 | 113 | pci_for_each_device(bus, 0, unplug_disks, NULL); |
679f4f8b | 114 | } |
01195b73 SS |
115 | |
116 | static void platform_fixed_ioport_writew(void *opaque, uint32_t addr, uint32_t val) | |
117 | { | |
118 | PCIXenPlatformState *s = opaque; | |
119 | ||
e7b48c97 | 120 | switch (addr) { |
01195b73 | 121 | case 0: |
01195b73 SS |
122 | /* Unplug devices. Value is a bitmask of which devices to |
123 | unplug, with bit 0 the IDE devices, bit 1 the network | |
124 | devices, and bit 2 the non-primary-master IDE devices. */ | |
679f4f8b SS |
125 | if (val & UNPLUG_ALL_IDE_DISKS) { |
126 | DPRINTF("unplug disks\n"); | |
922453bc | 127 | bdrv_drain_all(); |
679f4f8b SS |
128 | bdrv_flush_all(); |
129 | pci_unplug_disks(s->pci_dev.bus); | |
130 | } | |
131 | if (val & UNPLUG_ALL_NICS) { | |
132 | DPRINTF("unplug nics\n"); | |
133 | pci_unplug_nics(s->pci_dev.bus); | |
134 | } | |
135 | if (val & UNPLUG_AUX_IDE_DISKS) { | |
136 | DPRINTF("unplug auxiliary disks not supported\n"); | |
137 | } | |
01195b73 SS |
138 | break; |
139 | case 2: | |
140 | switch (val) { | |
141 | case 1: | |
142 | DPRINTF("Citrix Windows PV drivers loaded in guest\n"); | |
143 | break; | |
144 | case 0: | |
145 | DPRINTF("Guest claimed to be running PV product 0?\n"); | |
146 | break; | |
147 | default: | |
148 | DPRINTF("Unknown PV product %d loaded in guest\n", val); | |
149 | break; | |
150 | } | |
151 | s->driver_product_version = val; | |
152 | break; | |
153 | } | |
154 | } | |
155 | ||
156 | static void platform_fixed_ioport_writel(void *opaque, uint32_t addr, | |
157 | uint32_t val) | |
158 | { | |
e7b48c97 | 159 | switch (addr) { |
01195b73 SS |
160 | case 0: |
161 | /* PV driver version */ | |
162 | break; | |
163 | } | |
164 | } | |
165 | ||
166 | static void platform_fixed_ioport_writeb(void *opaque, uint32_t addr, uint32_t val) | |
167 | { | |
168 | PCIXenPlatformState *s = opaque; | |
169 | ||
e7b48c97 | 170 | switch (addr) { |
01195b73 SS |
171 | case 0: /* Platform flags */ { |
172 | hvmmem_type_t mem_type = (val & PFFLAG_ROM_LOCK) ? | |
173 | HVMMEM_ram_ro : HVMMEM_ram_rw; | |
174 | if (xc_hvm_set_mem_type(xen_xc, xen_domid, mem_type, 0xc0, 0x40)) { | |
175 | DPRINTF("unable to change ro/rw state of ROM memory area!\n"); | |
176 | } else { | |
177 | s->flags = val & PFFLAG_ROM_LOCK; | |
178 | DPRINTF("changed ro/rw state of ROM memory area. now is %s state.\n", | |
179 | (mem_type == HVMMEM_ram_ro ? "ro":"rw")); | |
180 | } | |
181 | break; | |
182 | } | |
183 | case 2: | |
184 | log_writeb(s, val); | |
185 | break; | |
186 | } | |
187 | } | |
188 | ||
189 | static uint32_t platform_fixed_ioport_readw(void *opaque, uint32_t addr) | |
190 | { | |
191 | PCIXenPlatformState *s = opaque; | |
192 | ||
e7b48c97 | 193 | switch (addr) { |
01195b73 SS |
194 | case 0: |
195 | if (s->drivers_blacklisted) { | |
196 | /* The drivers will recognise this magic number and refuse | |
197 | * to do anything. */ | |
198 | return 0xd249; | |
199 | } else { | |
200 | /* Magic value so that you can identify the interface. */ | |
201 | return 0x49d2; | |
202 | } | |
203 | default: | |
204 | return 0xffff; | |
205 | } | |
206 | } | |
207 | ||
208 | static uint32_t platform_fixed_ioport_readb(void *opaque, uint32_t addr) | |
209 | { | |
210 | PCIXenPlatformState *s = opaque; | |
211 | ||
e7b48c97 | 212 | switch (addr) { |
01195b73 SS |
213 | case 0: |
214 | /* Platform flags */ | |
215 | return s->flags; | |
216 | case 2: | |
217 | /* Version number */ | |
218 | return 1; | |
219 | default: | |
220 | return 0xff; | |
221 | } | |
222 | } | |
223 | ||
224 | static void platform_fixed_ioport_reset(void *opaque) | |
225 | { | |
226 | PCIXenPlatformState *s = opaque; | |
227 | ||
e7b48c97 | 228 | platform_fixed_ioport_writeb(s, 0, 0); |
01195b73 SS |
229 | } |
230 | ||
626c7a17 AG |
231 | static uint64_t platform_fixed_ioport_read(void *opaque, |
232 | hwaddr addr, | |
233 | unsigned size) | |
234 | { | |
235 | switch (size) { | |
236 | case 1: | |
237 | return platform_fixed_ioport_readb(opaque, addr); | |
238 | case 2: | |
239 | return platform_fixed_ioport_readw(opaque, addr); | |
240 | default: | |
241 | return -1; | |
242 | } | |
243 | } | |
244 | ||
245 | static void platform_fixed_ioport_write(void *opaque, hwaddr addr, | |
246 | ||
247 | uint64_t val, unsigned size) | |
248 | { | |
249 | switch (size) { | |
250 | case 1: | |
251 | platform_fixed_ioport_writeb(opaque, addr, val); | |
252 | break; | |
253 | case 2: | |
254 | platform_fixed_ioport_writew(opaque, addr, val); | |
255 | break; | |
256 | case 4: | |
257 | platform_fixed_ioport_writel(opaque, addr, val); | |
258 | break; | |
259 | } | |
260 | } | |
261 | ||
de00982e AK |
262 | |
263 | static const MemoryRegionOps platform_fixed_io_ops = { | |
626c7a17 AG |
264 | .read = platform_fixed_ioport_read, |
265 | .write = platform_fixed_ioport_write, | |
266 | .impl = { | |
267 | .min_access_size = 1, | |
268 | .max_access_size = 4, | |
269 | }, | |
270 | .endianness = DEVICE_LITTLE_ENDIAN, | |
de00982e AK |
271 | }; |
272 | ||
01195b73 SS |
273 | static void platform_fixed_ioport_init(PCIXenPlatformState* s) |
274 | { | |
de00982e AK |
275 | memory_region_init_io(&s->fixed_io, &platform_fixed_io_ops, s, |
276 | "xen-fixed", 16); | |
277 | memory_region_add_subregion(get_system_io(), XEN_PLATFORM_IOPORT, | |
278 | &s->fixed_io); | |
01195b73 SS |
279 | } |
280 | ||
281 | /* Xen Platform PCI Device */ | |
282 | ||
283 | static uint32_t xen_platform_ioport_readb(void *opaque, uint32_t addr) | |
284 | { | |
01195b73 | 285 | if (addr == 0) { |
e7b48c97 | 286 | return platform_fixed_ioport_readb(opaque, 0); |
01195b73 SS |
287 | } else { |
288 | return ~0u; | |
289 | } | |
290 | } | |
291 | ||
292 | static void xen_platform_ioport_writeb(void *opaque, uint32_t addr, uint32_t val) | |
293 | { | |
294 | PCIXenPlatformState *s = opaque; | |
295 | ||
01195b73 SS |
296 | switch (addr) { |
297 | case 0: /* Platform flags */ | |
e7b48c97 | 298 | platform_fixed_ioport_writeb(opaque, 0, val); |
01195b73 SS |
299 | break; |
300 | case 8: | |
301 | log_writeb(s, val); | |
302 | break; | |
303 | default: | |
304 | break; | |
305 | } | |
306 | } | |
307 | ||
de00982e AK |
308 | static MemoryRegionPortio xen_pci_portio[] = { |
309 | { 0, 0x100, 1, .read = xen_platform_ioport_readb, }, | |
310 | { 0, 0x100, 1, .write = xen_platform_ioport_writeb, }, | |
311 | PORTIO_END_OF_LIST() | |
312 | }; | |
313 | ||
314 | static const MemoryRegionOps xen_pci_io_ops = { | |
315 | .old_portio = xen_pci_portio, | |
316 | }; | |
01195b73 | 317 | |
de00982e AK |
318 | static void platform_ioport_bar_setup(PCIXenPlatformState *d) |
319 | { | |
320 | memory_region_init_io(&d->bar, &xen_pci_io_ops, d, "xen-pci", 0x100); | |
01195b73 SS |
321 | } |
322 | ||
a8170e5e | 323 | static uint64_t platform_mmio_read(void *opaque, hwaddr addr, |
de00982e | 324 | unsigned size) |
01195b73 SS |
325 | { |
326 | DPRINTF("Warning: attempted read from physical address " | |
327 | "0x" TARGET_FMT_plx " in xen platform mmio space\n", addr); | |
328 | ||
329 | return 0; | |
330 | } | |
331 | ||
a8170e5e | 332 | static void platform_mmio_write(void *opaque, hwaddr addr, |
de00982e | 333 | uint64_t val, unsigned size) |
01195b73 | 334 | { |
de00982e | 335 | DPRINTF("Warning: attempted write of 0x%"PRIx64" to physical " |
01195b73 SS |
336 | "address 0x" TARGET_FMT_plx " in xen platform mmio space\n", |
337 | val, addr); | |
338 | } | |
339 | ||
de00982e | 340 | static const MemoryRegionOps platform_mmio_handler = { |
01195b73 SS |
341 | .read = &platform_mmio_read, |
342 | .write = &platform_mmio_write, | |
de00982e | 343 | .endianness = DEVICE_NATIVE_ENDIAN, |
01195b73 SS |
344 | }; |
345 | ||
de00982e | 346 | static void platform_mmio_setup(PCIXenPlatformState *d) |
01195b73 | 347 | { |
de00982e AK |
348 | memory_region_init_io(&d->mmio_bar, &platform_mmio_handler, d, |
349 | "xen-mmio", 0x1000000); | |
01195b73 SS |
350 | } |
351 | ||
352 | static int xen_platform_post_load(void *opaque, int version_id) | |
353 | { | |
354 | PCIXenPlatformState *s = opaque; | |
355 | ||
e7b48c97 | 356 | platform_fixed_ioport_writeb(s, 0, s->flags); |
01195b73 SS |
357 | |
358 | return 0; | |
359 | } | |
360 | ||
361 | static const VMStateDescription vmstate_xen_platform = { | |
362 | .name = "platform", | |
363 | .version_id = 4, | |
364 | .minimum_version_id = 4, | |
365 | .minimum_version_id_old = 4, | |
366 | .post_load = xen_platform_post_load, | |
367 | .fields = (VMStateField []) { | |
368 | VMSTATE_PCI_DEVICE(pci_dev, PCIXenPlatformState), | |
369 | VMSTATE_UINT8(flags, PCIXenPlatformState), | |
370 | VMSTATE_END_OF_LIST() | |
371 | } | |
372 | }; | |
373 | ||
374 | static int xen_platform_initfn(PCIDevice *dev) | |
375 | { | |
376 | PCIXenPlatformState *d = DO_UPCAST(PCIXenPlatformState, pci_dev, dev); | |
377 | uint8_t *pci_conf; | |
378 | ||
379 | pci_conf = d->pci_dev.config; | |
380 | ||
01195b73 SS |
381 | pci_set_word(pci_conf + PCI_COMMAND, PCI_COMMAND_IO | PCI_COMMAND_MEMORY); |
382 | ||
01195b73 SS |
383 | pci_config_set_prog_interface(pci_conf, 0); |
384 | ||
01195b73 SS |
385 | pci_conf[PCI_INTERRUPT_PIN] = 1; |
386 | ||
de00982e | 387 | platform_ioport_bar_setup(d); |
e824b2cc | 388 | pci_register_bar(&d->pci_dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &d->bar); |
01195b73 SS |
389 | |
390 | /* reserve 16MB mmio address for share memory*/ | |
de00982e | 391 | platform_mmio_setup(d); |
e824b2cc AK |
392 | pci_register_bar(&d->pci_dev, 1, PCI_BASE_ADDRESS_MEM_PREFETCH, |
393 | &d->mmio_bar); | |
01195b73 SS |
394 | |
395 | platform_fixed_ioport_init(d); | |
396 | ||
397 | return 0; | |
398 | } | |
399 | ||
400 | static void platform_reset(DeviceState *dev) | |
401 | { | |
402 | PCIXenPlatformState *s = DO_UPCAST(PCIXenPlatformState, pci_dev.qdev, dev); | |
403 | ||
404 | platform_fixed_ioport_reset(s); | |
405 | } | |
406 | ||
40021f08 AL |
407 | static void xen_platform_class_init(ObjectClass *klass, void *data) |
408 | { | |
39bffca2 | 409 | DeviceClass *dc = DEVICE_CLASS(klass); |
40021f08 AL |
410 | PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); |
411 | ||
412 | k->init = xen_platform_initfn; | |
413 | k->vendor_id = PCI_VENDOR_ID_XEN; | |
414 | k->device_id = PCI_DEVICE_ID_XEN_PLATFORM; | |
415 | k->class_id = PCI_CLASS_OTHERS << 8 | 0x80; | |
416 | k->subsystem_vendor_id = PCI_VENDOR_ID_XEN; | |
417 | k->subsystem_id = PCI_DEVICE_ID_XEN_PLATFORM; | |
418 | k->revision = 1; | |
39bffca2 AL |
419 | dc->desc = "XEN platform pci device"; |
420 | dc->reset = platform_reset; | |
421 | dc->vmsd = &vmstate_xen_platform; | |
40021f08 AL |
422 | } |
423 | ||
39bffca2 AL |
424 | static TypeInfo xen_platform_info = { |
425 | .name = "xen-platform", | |
426 | .parent = TYPE_PCI_DEVICE, | |
427 | .instance_size = sizeof(PCIXenPlatformState), | |
428 | .class_init = xen_platform_class_init, | |
01195b73 SS |
429 | }; |
430 | ||
83f7d43a | 431 | static void xen_platform_register_types(void) |
01195b73 | 432 | { |
39bffca2 | 433 | type_register_static(&xen_platform_info); |
01195b73 SS |
434 | } |
435 | ||
83f7d43a | 436 | type_init(xen_platform_register_types) |