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0200db65 MF |
1 | /* |
2 | * Copyright (c) 2011, Max Filippov, Open Source and Linux Lab. | |
3 | * All rights reserved. | |
4 | * | |
5 | * Redistribution and use in source and binary forms, with or without | |
6 | * modification, are permitted provided that the following conditions are met: | |
7 | * * Redistributions of source code must retain the above copyright | |
8 | * notice, this list of conditions and the following disclaimer. | |
9 | * * Redistributions in binary form must reproduce the above copyright | |
10 | * notice, this list of conditions and the following disclaimer in the | |
11 | * documentation and/or other materials provided with the distribution. | |
12 | * * Neither the name of the Open Source and Linux Lab nor the | |
13 | * names of its contributors may be used to endorse or promote products | |
14 | * derived from this software without specific prior written permission. | |
15 | * | |
16 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" | |
17 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | |
18 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE | |
19 | * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY | |
20 | * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES | |
21 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; | |
22 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND | |
23 | * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | |
24 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS | |
25 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
26 | */ | |
27 | ||
09aae23d | 28 | #include "qemu/osdep.h" |
da34e65c | 29 | #include "qapi/error.h" |
9c17d615 | 30 | #include "sysemu/sysemu.h" |
83c9f4ca PB |
31 | #include "hw/boards.h" |
32 | #include "hw/loader.h" | |
0200db65 | 33 | #include "elf.h" |
022c62cb PB |
34 | #include "exec/memory.h" |
35 | #include "exec/address-spaces.h" | |
0d09e41a | 36 | #include "hw/char/serial.h" |
1422e32d | 37 | #include "net/net.h" |
83c9f4ca | 38 | #include "hw/sysbus.h" |
0d09e41a | 39 | #include "hw/block/flash.h" |
fa1d36df | 40 | #include "sysemu/block-backend.h" |
dccfcd0e | 41 | #include "sysemu/char.h" |
996dfe98 | 42 | #include "sysemu/device_tree.h" |
8488ab02 | 43 | #include "qemu/error-report.h" |
b707ab75 | 44 | #include "bootparam.h" |
82b25dc8 MF |
45 | |
46 | typedef struct LxBoardDesc { | |
e0db904d | 47 | hwaddr flash_base; |
82b25dc8 | 48 | size_t flash_size; |
37ed7c4b | 49 | size_t flash_boot_base; |
82b25dc8 MF |
50 | size_t flash_sector_size; |
51 | size_t sram_size; | |
52 | } LxBoardDesc; | |
0200db65 MF |
53 | |
54 | typedef struct Lx60FpgaState { | |
55 | MemoryRegion iomem; | |
56 | uint32_t leds; | |
57 | uint32_t switches; | |
58 | } Lx60FpgaState; | |
59 | ||
60 | static void lx60_fpga_reset(void *opaque) | |
61 | { | |
62 | Lx60FpgaState *s = opaque; | |
63 | ||
64 | s->leds = 0; | |
65 | s->switches = 0; | |
66 | } | |
67 | ||
a8170e5e | 68 | static uint64_t lx60_fpga_read(void *opaque, hwaddr addr, |
0200db65 MF |
69 | unsigned size) |
70 | { | |
71 | Lx60FpgaState *s = opaque; | |
72 | ||
73 | switch (addr) { | |
74 | case 0x0: /*build date code*/ | |
556ba668 | 75 | return 0x09272011; |
0200db65 MF |
76 | |
77 | case 0x4: /*processor clock frequency, Hz*/ | |
78 | return 10000000; | |
79 | ||
80 | case 0x8: /*LEDs (off = 0, on = 1)*/ | |
81 | return s->leds; | |
82 | ||
83 | case 0xc: /*DIP switches (off = 0, on = 1)*/ | |
84 | return s->switches; | |
85 | } | |
86 | return 0; | |
87 | } | |
88 | ||
a8170e5e | 89 | static void lx60_fpga_write(void *opaque, hwaddr addr, |
0200db65 MF |
90 | uint64_t val, unsigned size) |
91 | { | |
92 | Lx60FpgaState *s = opaque; | |
93 | ||
94 | switch (addr) { | |
95 | case 0x8: /*LEDs (off = 0, on = 1)*/ | |
96 | s->leds = val; | |
97 | break; | |
98 | ||
99 | case 0x10: /*board reset*/ | |
100 | if (val == 0xdead) { | |
101 | qemu_system_reset_request(); | |
102 | } | |
103 | break; | |
104 | } | |
105 | } | |
106 | ||
107 | static const MemoryRegionOps lx60_fpga_ops = { | |
108 | .read = lx60_fpga_read, | |
109 | .write = lx60_fpga_write, | |
110 | .endianness = DEVICE_NATIVE_ENDIAN, | |
111 | }; | |
112 | ||
113 | static Lx60FpgaState *lx60_fpga_init(MemoryRegion *address_space, | |
a8170e5e | 114 | hwaddr base) |
0200db65 MF |
115 | { |
116 | Lx60FpgaState *s = g_malloc(sizeof(Lx60FpgaState)); | |
117 | ||
2c9b15ca | 118 | memory_region_init_io(&s->iomem, NULL, &lx60_fpga_ops, s, |
556ba668 | 119 | "lx60.fpga", 0x10000); |
0200db65 MF |
120 | memory_region_add_subregion(address_space, base, &s->iomem); |
121 | lx60_fpga_reset(s); | |
122 | qemu_register_reset(lx60_fpga_reset, s); | |
123 | return s; | |
124 | } | |
125 | ||
126 | static void lx60_net_init(MemoryRegion *address_space, | |
a8170e5e AK |
127 | hwaddr base, |
128 | hwaddr descriptors, | |
129 | hwaddr buffers, | |
0200db65 MF |
130 | qemu_irq irq, NICInfo *nd) |
131 | { | |
132 | DeviceState *dev; | |
133 | SysBusDevice *s; | |
134 | MemoryRegion *ram; | |
135 | ||
136 | dev = qdev_create(NULL, "open_eth"); | |
137 | qdev_set_nic_properties(dev, nd); | |
138 | qdev_init_nofail(dev); | |
139 | ||
1356b98d | 140 | s = SYS_BUS_DEVICE(dev); |
0200db65 MF |
141 | sysbus_connect_irq(s, 0, irq); |
142 | memory_region_add_subregion(address_space, base, | |
143 | sysbus_mmio_get_region(s, 0)); | |
144 | memory_region_add_subregion(address_space, descriptors, | |
145 | sysbus_mmio_get_region(s, 1)); | |
146 | ||
147 | ram = g_malloc(sizeof(*ram)); | |
f8ed85ac MA |
148 | memory_region_init_ram(ram, OBJECT(s), "open_eth.ram", 16384, |
149 | &error_fatal); | |
c5705a77 | 150 | vmstate_register_ram_global(ram); |
0200db65 MF |
151 | memory_region_add_subregion(address_space, buffers, ram); |
152 | } | |
153 | ||
68931a40 MF |
154 | static pflash_t *xtfpga_flash_init(MemoryRegion *address_space, |
155 | const LxBoardDesc *board, | |
156 | DriveInfo *dinfo, int be) | |
157 | { | |
158 | SysBusDevice *s; | |
159 | DeviceState *dev = qdev_create(NULL, "cfi.pflash01"); | |
160 | ||
161 | qdev_prop_set_drive(dev, "drive", blk_by_legacy_dinfo(dinfo), | |
162 | &error_abort); | |
163 | qdev_prop_set_uint32(dev, "num-blocks", | |
164 | board->flash_size / board->flash_sector_size); | |
165 | qdev_prop_set_uint64(dev, "sector-length", board->flash_sector_size); | |
166 | qdev_prop_set_uint8(dev, "width", 4); | |
167 | qdev_prop_set_bit(dev, "big-endian", be); | |
168 | qdev_prop_set_string(dev, "name", "lx60.io.flash"); | |
169 | qdev_init_nofail(dev); | |
170 | s = SYS_BUS_DEVICE(dev); | |
171 | memory_region_add_subregion(address_space, board->flash_base, | |
172 | sysbus_mmio_get_region(s, 0)); | |
173 | return OBJECT_CHECK(pflash_t, (dev), "cfi.pflash01"); | |
174 | } | |
175 | ||
00b941e5 | 176 | static uint64_t translate_phys_addr(void *opaque, uint64_t addr) |
0200db65 | 177 | { |
00b941e5 AF |
178 | XtensaCPU *cpu = opaque; |
179 | ||
180 | return cpu_get_phys_page_debug(CPU(cpu), addr); | |
0200db65 MF |
181 | } |
182 | ||
1bba0dc9 | 183 | static void lx60_reset(void *opaque) |
0200db65 | 184 | { |
eded1267 | 185 | XtensaCPU *cpu = opaque; |
1bba0dc9 | 186 | |
eded1267 | 187 | cpu_reset(CPU(cpu)); |
0200db65 MF |
188 | } |
189 | ||
8bb3b575 MF |
190 | static uint64_t lx60_io_read(void *opaque, hwaddr addr, |
191 | unsigned size) | |
192 | { | |
193 | return 0; | |
194 | } | |
195 | ||
196 | static void lx60_io_write(void *opaque, hwaddr addr, | |
197 | uint64_t val, unsigned size) | |
198 | { | |
199 | } | |
200 | ||
201 | static const MemoryRegionOps lx60_io_ops = { | |
202 | .read = lx60_io_read, | |
203 | .write = lx60_io_write, | |
204 | .endianness = DEVICE_NATIVE_ENDIAN, | |
205 | }; | |
206 | ||
3ef96221 | 207 | static void lx_init(const LxBoardDesc *board, MachineState *machine) |
0200db65 MF |
208 | { |
209 | #ifdef TARGET_WORDS_BIGENDIAN | |
210 | int be = 1; | |
211 | #else | |
212 | int be = 0; | |
213 | #endif | |
214 | MemoryRegion *system_memory = get_system_memory(); | |
adbb0f75 | 215 | XtensaCPU *cpu = NULL; |
5bfcb36e | 216 | CPUXtensaState *env = NULL; |
0200db65 | 217 | MemoryRegion *ram, *rom, *system_io; |
82b25dc8 MF |
218 | DriveInfo *dinfo; |
219 | pflash_t *flash = NULL; | |
37b259d0 | 220 | QemuOpts *machine_opts = qemu_get_machine_opts(); |
3ef96221 | 221 | const char *cpu_model = machine->cpu_model; |
37b259d0 MF |
222 | const char *kernel_filename = qemu_opt_get(machine_opts, "kernel"); |
223 | const char *kernel_cmdline = qemu_opt_get(machine_opts, "append"); | |
996dfe98 | 224 | const char *dtb_filename = qemu_opt_get(machine_opts, "dtb"); |
f55b32e7 | 225 | const char *initrd_filename = qemu_opt_get(machine_opts, "initrd"); |
0200db65 MF |
226 | int n; |
227 | ||
82b25dc8 | 228 | if (!cpu_model) { |
e38077ff | 229 | cpu_model = XTENSA_DEFAULT_CPU_MODEL; |
82b25dc8 MF |
230 | } |
231 | ||
0200db65 | 232 | for (n = 0; n < smp_cpus; n++) { |
adbb0f75 AF |
233 | cpu = cpu_xtensa_init(cpu_model); |
234 | if (cpu == NULL) { | |
ebbb419a | 235 | error_report("unable to find CPU definition '%s'", |
8488ab02 MF |
236 | cpu_model); |
237 | exit(EXIT_FAILURE); | |
0200db65 | 238 | } |
adbb0f75 AF |
239 | env = &cpu->env; |
240 | ||
0200db65 | 241 | env->sregs[PRID] = n; |
eded1267 | 242 | qemu_register_reset(lx60_reset, cpu); |
0200db65 MF |
243 | /* Need MMU initialized prior to ELF loading, |
244 | * so that ELF gets loaded into virtual addresses | |
245 | */ | |
adbb0f75 | 246 | cpu_reset(CPU(cpu)); |
0200db65 MF |
247 | } |
248 | ||
249 | ram = g_malloc(sizeof(*ram)); | |
49946538 | 250 | memory_region_init_ram(ram, NULL, "lx60.dram", machine->ram_size, |
f8ed85ac | 251 | &error_fatal); |
c5705a77 | 252 | vmstate_register_ram_global(ram); |
0200db65 MF |
253 | memory_region_add_subregion(system_memory, 0, ram); |
254 | ||
0200db65 | 255 | system_io = g_malloc(sizeof(*system_io)); |
8bb3b575 MF |
256 | memory_region_init_io(system_io, NULL, &lx60_io_ops, NULL, "lx60.io", |
257 | 224 * 1024 * 1024); | |
0200db65 MF |
258 | memory_region_add_subregion(system_memory, 0xf0000000, system_io); |
259 | lx60_fpga_init(system_io, 0x0d020000); | |
a005d073 | 260 | if (nd_table[0].used) { |
0200db65 MF |
261 | lx60_net_init(system_io, 0x0d030000, 0x0d030400, 0x0d800000, |
262 | xtensa_get_extint(env, 1), nd_table); | |
263 | } | |
264 | ||
265 | if (!serial_hds[0]) { | |
266 | serial_hds[0] = qemu_chr_new("serial0", "null", NULL); | |
267 | } | |
268 | ||
269 | serial_mm_init(system_io, 0x0d050020, 2, xtensa_get_extint(env, 0), | |
270 | 115200, serial_hds[0], DEVICE_NATIVE_ENDIAN); | |
271 | ||
82b25dc8 MF |
272 | dinfo = drive_get(IF_PFLASH, 0, 0); |
273 | if (dinfo) { | |
68931a40 | 274 | flash = xtfpga_flash_init(system_io, board, dinfo, be); |
82b25dc8 MF |
275 | } |
276 | ||
277 | /* Use presence of kernel file name as 'boot from SRAM' switch. */ | |
0200db65 | 278 | if (kernel_filename) { |
364d4802 | 279 | uint32_t entry_point = env->pc; |
b6edea8b | 280 | size_t bp_size = 3 * get_tag_size(0); /* first/last and memory tags */ |
a9a28591 MF |
281 | uint32_t tagptr = 0xfe000000 + board->sram_size; |
282 | uint32_t cur_tagptr; | |
b6edea8b MF |
283 | BpMemInfo memory_location = { |
284 | .type = tswap32(MEMORY_TYPE_CONVENTIONAL), | |
285 | .start = tswap32(0), | |
286 | .end = tswap32(machine->ram_size), | |
287 | }; | |
996dfe98 MF |
288 | uint32_t lowmem_end = machine->ram_size < 0x08000000 ? |
289 | machine->ram_size : 0x08000000; | |
290 | uint32_t cur_lowmem = QEMU_ALIGN_UP(lowmem_end / 2, 4096); | |
a9a28591 | 291 | |
292627bb | 292 | rom = g_malloc(sizeof(*rom)); |
49946538 | 293 | memory_region_init_ram(rom, NULL, "lx60.sram", board->sram_size, |
f8ed85ac | 294 | &error_fatal); |
c5705a77 | 295 | vmstate_register_ram_global(rom); |
292627bb MF |
296 | memory_region_add_subregion(system_memory, 0xfe000000, rom); |
297 | ||
a9a28591 MF |
298 | if (kernel_cmdline) { |
299 | bp_size += get_tag_size(strlen(kernel_cmdline) + 1); | |
300 | } | |
996dfe98 MF |
301 | if (dtb_filename) { |
302 | bp_size += get_tag_size(sizeof(uint32_t)); | |
303 | } | |
f55b32e7 MF |
304 | if (initrd_filename) { |
305 | bp_size += get_tag_size(sizeof(BpMemInfo)); | |
306 | } | |
a9a28591 | 307 | |
292627bb | 308 | /* Put kernel bootparameters to the end of that SRAM */ |
a9a28591 MF |
309 | tagptr = (tagptr - bp_size) & ~0xff; |
310 | cur_tagptr = put_tag(tagptr, BP_TAG_FIRST, 0, NULL); | |
b6edea8b MF |
311 | cur_tagptr = put_tag(cur_tagptr, BP_TAG_MEMORY, |
312 | sizeof(memory_location), &memory_location); | |
a9a28591 | 313 | |
292627bb | 314 | if (kernel_cmdline) { |
a9a28591 MF |
315 | cur_tagptr = put_tag(cur_tagptr, BP_TAG_COMMAND_LINE, |
316 | strlen(kernel_cmdline) + 1, kernel_cmdline); | |
292627bb | 317 | } |
996dfe98 MF |
318 | if (dtb_filename) { |
319 | int fdt_size; | |
320 | void *fdt = load_device_tree(dtb_filename, &fdt_size); | |
321 | uint32_t dtb_addr = tswap32(cur_lowmem); | |
322 | ||
323 | if (!fdt) { | |
ebbb419a | 324 | error_report("could not load DTB '%s'", dtb_filename); |
996dfe98 MF |
325 | exit(EXIT_FAILURE); |
326 | } | |
327 | ||
328 | cpu_physical_memory_write(cur_lowmem, fdt, fdt_size); | |
329 | cur_tagptr = put_tag(cur_tagptr, BP_TAG_FDT, | |
330 | sizeof(dtb_addr), &dtb_addr); | |
331 | cur_lowmem = QEMU_ALIGN_UP(cur_lowmem + fdt_size, 4096); | |
332 | } | |
f55b32e7 MF |
333 | if (initrd_filename) { |
334 | BpMemInfo initrd_location = { 0 }; | |
335 | int initrd_size = load_ramdisk(initrd_filename, cur_lowmem, | |
336 | lowmem_end - cur_lowmem); | |
337 | ||
338 | if (initrd_size < 0) { | |
339 | initrd_size = load_image_targphys(initrd_filename, | |
340 | cur_lowmem, | |
341 | lowmem_end - cur_lowmem); | |
342 | } | |
343 | if (initrd_size < 0) { | |
ebbb419a | 344 | error_report("could not load initrd '%s'", initrd_filename); |
f55b32e7 MF |
345 | exit(EXIT_FAILURE); |
346 | } | |
347 | initrd_location.start = tswap32(cur_lowmem); | |
348 | initrd_location.end = tswap32(cur_lowmem + initrd_size); | |
349 | cur_tagptr = put_tag(cur_tagptr, BP_TAG_INITRD, | |
350 | sizeof(initrd_location), &initrd_location); | |
351 | cur_lowmem = QEMU_ALIGN_UP(cur_lowmem + initrd_size, 4096); | |
352 | } | |
a9a28591 MF |
353 | cur_tagptr = put_tag(cur_tagptr, BP_TAG_LAST, 0, NULL); |
354 | env->regs[2] = tagptr; | |
355 | ||
0200db65 MF |
356 | uint64_t elf_entry; |
357 | uint64_t elf_lowaddr; | |
00b941e5 | 358 | int success = load_elf(kernel_filename, translate_phys_addr, cpu, |
7ef295ea | 359 | &elf_entry, &elf_lowaddr, NULL, be, EM_XTENSA, 0, 0); |
0200db65 | 360 | if (success > 0) { |
364d4802 MF |
361 | entry_point = elf_entry; |
362 | } else { | |
363 | hwaddr ep; | |
364 | int is_linux; | |
25bda50a | 365 | success = load_uimage(kernel_filename, &ep, NULL, &is_linux, |
6d2e4530 | 366 | translate_phys_addr, cpu); |
364d4802 MF |
367 | if (success > 0 && is_linux) { |
368 | entry_point = ep; | |
369 | } else { | |
ebbb419a | 370 | error_report("could not load kernel '%s'", |
364d4802 MF |
371 | kernel_filename); |
372 | exit(EXIT_FAILURE); | |
373 | } | |
374 | } | |
375 | if (entry_point != env->pc) { | |
376 | static const uint8_t jx_a0[] = { | |
377 | #ifdef TARGET_WORDS_BIGENDIAN | |
378 | 0x0a, 0, 0, | |
379 | #else | |
380 | 0xa0, 0, 0, | |
381 | #endif | |
382 | }; | |
383 | env->regs[0] = entry_point; | |
384 | cpu_physical_memory_write(env->pc, jx_a0, sizeof(jx_a0)); | |
0200db65 | 385 | } |
82b25dc8 MF |
386 | } else { |
387 | if (flash) { | |
388 | MemoryRegion *flash_mr = pflash_cfi01_get_memory(flash); | |
389 | MemoryRegion *flash_io = g_malloc(sizeof(*flash_io)); | |
390 | ||
2c9b15ca | 391 | memory_region_init_alias(flash_io, NULL, "lx60.flash", |
37ed7c4b MF |
392 | flash_mr, board->flash_boot_base, |
393 | board->flash_size - board->flash_boot_base < 0x02000000 ? | |
394 | board->flash_size - board->flash_boot_base : 0x02000000); | |
82b25dc8 MF |
395 | memory_region_add_subregion(system_memory, 0xfe000000, |
396 | flash_io); | |
397 | } | |
0200db65 MF |
398 | } |
399 | } | |
400 | ||
3ef96221 | 401 | static void xtensa_lx60_init(MachineState *machine) |
0200db65 | 402 | { |
82b25dc8 | 403 | static const LxBoardDesc lx60_board = { |
68931a40 | 404 | .flash_base = 0x08000000, |
e0db904d | 405 | .flash_size = 0x00400000, |
82b25dc8 MF |
406 | .flash_sector_size = 0x10000, |
407 | .sram_size = 0x20000, | |
408 | }; | |
3ef96221 | 409 | lx_init(&lx60_board, machine); |
82b25dc8 MF |
410 | } |
411 | ||
3ef96221 | 412 | static void xtensa_lx200_init(MachineState *machine) |
82b25dc8 MF |
413 | { |
414 | static const LxBoardDesc lx200_board = { | |
68931a40 | 415 | .flash_base = 0x08000000, |
e0db904d | 416 | .flash_size = 0x01000000, |
82b25dc8 MF |
417 | .flash_sector_size = 0x20000, |
418 | .sram_size = 0x2000000, | |
419 | }; | |
3ef96221 | 420 | lx_init(&lx200_board, machine); |
0200db65 MF |
421 | } |
422 | ||
3ef96221 | 423 | static void xtensa_ml605_init(MachineState *machine) |
e0db904d MF |
424 | { |
425 | static const LxBoardDesc ml605_board = { | |
68931a40 | 426 | .flash_base = 0x08000000, |
12004c9e | 427 | .flash_size = 0x01000000, |
e0db904d MF |
428 | .flash_sector_size = 0x20000, |
429 | .sram_size = 0x2000000, | |
430 | }; | |
3ef96221 | 431 | lx_init(&ml605_board, machine); |
e0db904d MF |
432 | } |
433 | ||
3ef96221 | 434 | static void xtensa_kc705_init(MachineState *machine) |
e0db904d MF |
435 | { |
436 | static const LxBoardDesc kc705_board = { | |
68931a40 | 437 | .flash_base = 0x00000000, |
e0db904d | 438 | .flash_size = 0x08000000, |
37ed7c4b | 439 | .flash_boot_base = 0x06000000, |
e0db904d MF |
440 | .flash_sector_size = 0x20000, |
441 | .sram_size = 0x2000000, | |
442 | }; | |
3ef96221 | 443 | lx_init(&kc705_board, machine); |
e0db904d MF |
444 | } |
445 | ||
8a661aea | 446 | static void xtensa_lx60_class_init(ObjectClass *oc, void *data) |
e264d29d | 447 | { |
8a661aea AF |
448 | MachineClass *mc = MACHINE_CLASS(oc); |
449 | ||
e264d29d EH |
450 | mc->desc = "lx60 EVB (" XTENSA_DEFAULT_CPU_MODEL ")"; |
451 | mc->init = xtensa_lx60_init; | |
452 | mc->max_cpus = 4; | |
453 | } | |
0200db65 | 454 | |
8a661aea AF |
455 | static const TypeInfo xtensa_lx60_type = { |
456 | .name = MACHINE_TYPE_NAME("lx60"), | |
457 | .parent = TYPE_MACHINE, | |
458 | .class_init = xtensa_lx60_class_init, | |
459 | }; | |
82b25dc8 | 460 | |
8a661aea | 461 | static void xtensa_lx200_class_init(ObjectClass *oc, void *data) |
e264d29d | 462 | { |
8a661aea AF |
463 | MachineClass *mc = MACHINE_CLASS(oc); |
464 | ||
e264d29d EH |
465 | mc->desc = "lx200 EVB (" XTENSA_DEFAULT_CPU_MODEL ")"; |
466 | mc->init = xtensa_lx200_init; | |
467 | mc->max_cpus = 4; | |
468 | } | |
e0db904d | 469 | |
8a661aea AF |
470 | static const TypeInfo xtensa_lx200_type = { |
471 | .name = MACHINE_TYPE_NAME("lx200"), | |
472 | .parent = TYPE_MACHINE, | |
473 | .class_init = xtensa_lx200_class_init, | |
474 | }; | |
e264d29d | 475 | |
8a661aea | 476 | static void xtensa_ml605_class_init(ObjectClass *oc, void *data) |
e264d29d | 477 | { |
8a661aea AF |
478 | MachineClass *mc = MACHINE_CLASS(oc); |
479 | ||
e264d29d EH |
480 | mc->desc = "ml605 EVB (" XTENSA_DEFAULT_CPU_MODEL ")"; |
481 | mc->init = xtensa_ml605_init; | |
482 | mc->max_cpus = 4; | |
483 | } | |
484 | ||
8a661aea AF |
485 | static const TypeInfo xtensa_ml605_type = { |
486 | .name = MACHINE_TYPE_NAME("ml605"), | |
487 | .parent = TYPE_MACHINE, | |
488 | .class_init = xtensa_ml605_class_init, | |
489 | }; | |
e0db904d | 490 | |
8a661aea | 491 | static void xtensa_kc705_class_init(ObjectClass *oc, void *data) |
0200db65 | 492 | { |
8a661aea AF |
493 | MachineClass *mc = MACHINE_CLASS(oc); |
494 | ||
e264d29d EH |
495 | mc->desc = "kc705 EVB (" XTENSA_DEFAULT_CPU_MODEL ")"; |
496 | mc->init = xtensa_kc705_init; | |
497 | mc->max_cpus = 4; | |
0200db65 MF |
498 | } |
499 | ||
8a661aea AF |
500 | static const TypeInfo xtensa_kc705_type = { |
501 | .name = MACHINE_TYPE_NAME("kc705"), | |
502 | .parent = TYPE_MACHINE, | |
503 | .class_init = xtensa_kc705_class_init, | |
504 | }; | |
505 | ||
506 | static void xtensa_lx_machines_init(void) | |
507 | { | |
508 | type_register_static(&xtensa_lx60_type); | |
509 | type_register_static(&xtensa_lx200_type); | |
510 | type_register_static(&xtensa_ml605_type); | |
511 | type_register_static(&xtensa_kc705_type); | |
512 | } | |
513 | ||
0e6aac87 | 514 | type_init(xtensa_lx_machines_init) |