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0200db65 MF |
1 | /* |
2 | * Copyright (c) 2011, Max Filippov, Open Source and Linux Lab. | |
3 | * All rights reserved. | |
4 | * | |
5 | * Redistribution and use in source and binary forms, with or without | |
6 | * modification, are permitted provided that the following conditions are met: | |
7 | * * Redistributions of source code must retain the above copyright | |
8 | * notice, this list of conditions and the following disclaimer. | |
9 | * * Redistributions in binary form must reproduce the above copyright | |
10 | * notice, this list of conditions and the following disclaimer in the | |
11 | * documentation and/or other materials provided with the distribution. | |
12 | * * Neither the name of the Open Source and Linux Lab nor the | |
13 | * names of its contributors may be used to endorse or promote products | |
14 | * derived from this software without specific prior written permission. | |
15 | * | |
16 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" | |
17 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | |
18 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE | |
19 | * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY | |
20 | * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES | |
21 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; | |
22 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND | |
23 | * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | |
24 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS | |
25 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
26 | */ | |
27 | ||
28 | #include "sysemu.h" | |
29 | #include "boards.h" | |
30 | #include "loader.h" | |
31 | #include "elf.h" | |
32 | #include "memory.h" | |
33 | #include "exec-memory.h" | |
488cb996 GH |
34 | #include "serial.h" |
35 | #include "net.h" | |
0200db65 | 36 | #include "sysbus.h" |
82b25dc8 | 37 | #include "flash.h" |
8aab031f | 38 | #include "blockdev.h" |
292627bb | 39 | #include "xtensa_bootparam.h" |
82b25dc8 MF |
40 | |
41 | typedef struct LxBoardDesc { | |
42 | size_t flash_size; | |
43 | size_t flash_sector_size; | |
44 | size_t sram_size; | |
45 | } LxBoardDesc; | |
0200db65 MF |
46 | |
47 | typedef struct Lx60FpgaState { | |
48 | MemoryRegion iomem; | |
49 | uint32_t leds; | |
50 | uint32_t switches; | |
51 | } Lx60FpgaState; | |
52 | ||
53 | static void lx60_fpga_reset(void *opaque) | |
54 | { | |
55 | Lx60FpgaState *s = opaque; | |
56 | ||
57 | s->leds = 0; | |
58 | s->switches = 0; | |
59 | } | |
60 | ||
a8170e5e | 61 | static uint64_t lx60_fpga_read(void *opaque, hwaddr addr, |
0200db65 MF |
62 | unsigned size) |
63 | { | |
64 | Lx60FpgaState *s = opaque; | |
65 | ||
66 | switch (addr) { | |
67 | case 0x0: /*build date code*/ | |
556ba668 | 68 | return 0x09272011; |
0200db65 MF |
69 | |
70 | case 0x4: /*processor clock frequency, Hz*/ | |
71 | return 10000000; | |
72 | ||
73 | case 0x8: /*LEDs (off = 0, on = 1)*/ | |
74 | return s->leds; | |
75 | ||
76 | case 0xc: /*DIP switches (off = 0, on = 1)*/ | |
77 | return s->switches; | |
78 | } | |
79 | return 0; | |
80 | } | |
81 | ||
a8170e5e | 82 | static void lx60_fpga_write(void *opaque, hwaddr addr, |
0200db65 MF |
83 | uint64_t val, unsigned size) |
84 | { | |
85 | Lx60FpgaState *s = opaque; | |
86 | ||
87 | switch (addr) { | |
88 | case 0x8: /*LEDs (off = 0, on = 1)*/ | |
89 | s->leds = val; | |
90 | break; | |
91 | ||
92 | case 0x10: /*board reset*/ | |
93 | if (val == 0xdead) { | |
94 | qemu_system_reset_request(); | |
95 | } | |
96 | break; | |
97 | } | |
98 | } | |
99 | ||
100 | static const MemoryRegionOps lx60_fpga_ops = { | |
101 | .read = lx60_fpga_read, | |
102 | .write = lx60_fpga_write, | |
103 | .endianness = DEVICE_NATIVE_ENDIAN, | |
104 | }; | |
105 | ||
106 | static Lx60FpgaState *lx60_fpga_init(MemoryRegion *address_space, | |
a8170e5e | 107 | hwaddr base) |
0200db65 MF |
108 | { |
109 | Lx60FpgaState *s = g_malloc(sizeof(Lx60FpgaState)); | |
110 | ||
111 | memory_region_init_io(&s->iomem, &lx60_fpga_ops, s, | |
556ba668 | 112 | "lx60.fpga", 0x10000); |
0200db65 MF |
113 | memory_region_add_subregion(address_space, base, &s->iomem); |
114 | lx60_fpga_reset(s); | |
115 | qemu_register_reset(lx60_fpga_reset, s); | |
116 | return s; | |
117 | } | |
118 | ||
119 | static void lx60_net_init(MemoryRegion *address_space, | |
a8170e5e AK |
120 | hwaddr base, |
121 | hwaddr descriptors, | |
122 | hwaddr buffers, | |
0200db65 MF |
123 | qemu_irq irq, NICInfo *nd) |
124 | { | |
125 | DeviceState *dev; | |
126 | SysBusDevice *s; | |
127 | MemoryRegion *ram; | |
128 | ||
129 | dev = qdev_create(NULL, "open_eth"); | |
130 | qdev_set_nic_properties(dev, nd); | |
131 | qdev_init_nofail(dev); | |
132 | ||
133 | s = sysbus_from_qdev(dev); | |
134 | sysbus_connect_irq(s, 0, irq); | |
135 | memory_region_add_subregion(address_space, base, | |
136 | sysbus_mmio_get_region(s, 0)); | |
137 | memory_region_add_subregion(address_space, descriptors, | |
138 | sysbus_mmio_get_region(s, 1)); | |
139 | ||
140 | ram = g_malloc(sizeof(*ram)); | |
c5705a77 AK |
141 | memory_region_init_ram(ram, "open_eth.ram", 16384); |
142 | vmstate_register_ram_global(ram); | |
0200db65 MF |
143 | memory_region_add_subregion(address_space, buffers, ram); |
144 | } | |
145 | ||
146 | static uint64_t translate_phys_addr(void *env, uint64_t addr) | |
147 | { | |
148 | return cpu_get_phys_page_debug(env, addr); | |
149 | } | |
150 | ||
1bba0dc9 | 151 | static void lx60_reset(void *opaque) |
0200db65 | 152 | { |
eded1267 | 153 | XtensaCPU *cpu = opaque; |
1bba0dc9 | 154 | |
eded1267 | 155 | cpu_reset(CPU(cpu)); |
0200db65 MF |
156 | } |
157 | ||
d64ed08e | 158 | static void lx_init(const LxBoardDesc *board, QEMUMachineInitArgs *args) |
0200db65 MF |
159 | { |
160 | #ifdef TARGET_WORDS_BIGENDIAN | |
161 | int be = 1; | |
162 | #else | |
163 | int be = 0; | |
164 | #endif | |
165 | MemoryRegion *system_memory = get_system_memory(); | |
adbb0f75 | 166 | XtensaCPU *cpu = NULL; |
5bfcb36e | 167 | CPUXtensaState *env = NULL; |
0200db65 | 168 | MemoryRegion *ram, *rom, *system_io; |
82b25dc8 MF |
169 | DriveInfo *dinfo; |
170 | pflash_t *flash = NULL; | |
d64ed08e MF |
171 | const char *cpu_model = args->cpu_model; |
172 | const char *kernel_filename = args->kernel_filename; | |
173 | const char *kernel_cmdline = args->kernel_cmdline; | |
0200db65 MF |
174 | int n; |
175 | ||
82b25dc8 | 176 | if (!cpu_model) { |
e38077ff | 177 | cpu_model = XTENSA_DEFAULT_CPU_MODEL; |
82b25dc8 MF |
178 | } |
179 | ||
0200db65 | 180 | for (n = 0; n < smp_cpus; n++) { |
adbb0f75 AF |
181 | cpu = cpu_xtensa_init(cpu_model); |
182 | if (cpu == NULL) { | |
0200db65 MF |
183 | fprintf(stderr, "Unable to find CPU definition\n"); |
184 | exit(1); | |
185 | } | |
adbb0f75 AF |
186 | env = &cpu->env; |
187 | ||
0200db65 | 188 | env->sregs[PRID] = n; |
eded1267 | 189 | qemu_register_reset(lx60_reset, cpu); |
0200db65 MF |
190 | /* Need MMU initialized prior to ELF loading, |
191 | * so that ELF gets loaded into virtual addresses | |
192 | */ | |
adbb0f75 | 193 | cpu_reset(CPU(cpu)); |
0200db65 MF |
194 | } |
195 | ||
196 | ram = g_malloc(sizeof(*ram)); | |
d64ed08e | 197 | memory_region_init_ram(ram, "lx60.dram", args->ram_size); |
c5705a77 | 198 | vmstate_register_ram_global(ram); |
0200db65 MF |
199 | memory_region_add_subregion(system_memory, 0, ram); |
200 | ||
0200db65 | 201 | system_io = g_malloc(sizeof(*system_io)); |
556ba668 | 202 | memory_region_init(system_io, "lx60.io", 224 * 1024 * 1024); |
0200db65 MF |
203 | memory_region_add_subregion(system_memory, 0xf0000000, system_io); |
204 | lx60_fpga_init(system_io, 0x0d020000); | |
a005d073 | 205 | if (nd_table[0].used) { |
0200db65 MF |
206 | lx60_net_init(system_io, 0x0d030000, 0x0d030400, 0x0d800000, |
207 | xtensa_get_extint(env, 1), nd_table); | |
208 | } | |
209 | ||
210 | if (!serial_hds[0]) { | |
211 | serial_hds[0] = qemu_chr_new("serial0", "null", NULL); | |
212 | } | |
213 | ||
214 | serial_mm_init(system_io, 0x0d050020, 2, xtensa_get_extint(env, 0), | |
215 | 115200, serial_hds[0], DEVICE_NATIVE_ENDIAN); | |
216 | ||
82b25dc8 MF |
217 | dinfo = drive_get(IF_PFLASH, 0, 0); |
218 | if (dinfo) { | |
219 | flash = pflash_cfi01_register(0xf8000000, | |
220 | NULL, "lx60.io.flash", board->flash_size, | |
221 | dinfo->bdrv, board->flash_sector_size, | |
222 | board->flash_size / board->flash_sector_size, | |
223 | 4, 0x0000, 0x0000, 0x0000, 0x0000, be); | |
224 | if (flash == NULL) { | |
225 | fprintf(stderr, "Unable to mount pflash\n"); | |
226 | exit(1); | |
227 | } | |
228 | } | |
229 | ||
230 | /* Use presence of kernel file name as 'boot from SRAM' switch. */ | |
0200db65 | 231 | if (kernel_filename) { |
292627bb | 232 | rom = g_malloc(sizeof(*rom)); |
c5705a77 AK |
233 | memory_region_init_ram(rom, "lx60.sram", board->sram_size); |
234 | vmstate_register_ram_global(rom); | |
292627bb MF |
235 | memory_region_add_subregion(system_memory, 0xfe000000, rom); |
236 | ||
237 | /* Put kernel bootparameters to the end of that SRAM */ | |
238 | if (kernel_cmdline) { | |
239 | size_t cmdline_size = strlen(kernel_cmdline) + 1; | |
240 | size_t bp_size = sizeof(BpTag[4]) + cmdline_size; | |
241 | uint32_t tagptr = (0xfe000000 + board->sram_size - bp_size) & ~0xff; | |
242 | ||
243 | env->regs[2] = tagptr; | |
244 | ||
245 | tagptr = put_tag(tagptr, 0x7b0b, 0, NULL); | |
246 | if (cmdline_size > 1) { | |
247 | tagptr = put_tag(tagptr, 0x1001, | |
248 | cmdline_size, kernel_cmdline); | |
249 | } | |
250 | tagptr = put_tag(tagptr, 0x7e0b, 0, NULL); | |
251 | } | |
0200db65 MF |
252 | uint64_t elf_entry; |
253 | uint64_t elf_lowaddr; | |
254 | int success = load_elf(kernel_filename, translate_phys_addr, env, | |
255 | &elf_entry, &elf_lowaddr, NULL, be, ELF_MACHINE, 0); | |
256 | if (success > 0) { | |
257 | env->pc = elf_entry; | |
258 | } | |
82b25dc8 MF |
259 | } else { |
260 | if (flash) { | |
261 | MemoryRegion *flash_mr = pflash_cfi01_get_memory(flash); | |
262 | MemoryRegion *flash_io = g_malloc(sizeof(*flash_io)); | |
263 | ||
264 | memory_region_init_alias(flash_io, "lx60.flash", | |
265 | flash_mr, 0, board->flash_size); | |
266 | memory_region_add_subregion(system_memory, 0xfe000000, | |
267 | flash_io); | |
268 | } | |
0200db65 MF |
269 | } |
270 | } | |
271 | ||
5f072e1f | 272 | static void xtensa_lx60_init(QEMUMachineInitArgs *args) |
0200db65 | 273 | { |
82b25dc8 MF |
274 | static const LxBoardDesc lx60_board = { |
275 | .flash_size = 0x400000, | |
276 | .flash_sector_size = 0x10000, | |
277 | .sram_size = 0x20000, | |
278 | }; | |
d64ed08e | 279 | lx_init(&lx60_board, args); |
82b25dc8 MF |
280 | } |
281 | ||
5f072e1f | 282 | static void xtensa_lx200_init(QEMUMachineInitArgs *args) |
82b25dc8 MF |
283 | { |
284 | static const LxBoardDesc lx200_board = { | |
285 | .flash_size = 0x1000000, | |
286 | .flash_sector_size = 0x20000, | |
287 | .sram_size = 0x2000000, | |
288 | }; | |
d64ed08e | 289 | lx_init(&lx200_board, args); |
0200db65 MF |
290 | } |
291 | ||
292 | static QEMUMachine xtensa_lx60_machine = { | |
293 | .name = "lx60", | |
e38077ff | 294 | .desc = "lx60 EVB (" XTENSA_DEFAULT_CPU_MODEL ")", |
0200db65 MF |
295 | .init = xtensa_lx60_init, |
296 | .max_cpus = 4, | |
297 | }; | |
298 | ||
82b25dc8 MF |
299 | static QEMUMachine xtensa_lx200_machine = { |
300 | .name = "lx200", | |
e38077ff | 301 | .desc = "lx200 EVB (" XTENSA_DEFAULT_CPU_MODEL ")", |
82b25dc8 MF |
302 | .init = xtensa_lx200_init, |
303 | .max_cpus = 4, | |
304 | }; | |
305 | ||
306 | static void xtensa_lx_machines_init(void) | |
0200db65 MF |
307 | { |
308 | qemu_register_machine(&xtensa_lx60_machine); | |
82b25dc8 | 309 | qemu_register_machine(&xtensa_lx200_machine); |
0200db65 MF |
310 | } |
311 | ||
82b25dc8 | 312 | machine_init(xtensa_lx_machines_init); |