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x86, cpa: rename PTE attribute macros for kernel direct mapping in early boot
[mirror_ubuntu-bionic-kernel.git] / include / asm-x86 / pgtable.h
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6c386655
JF
1#ifndef _ASM_X86_PGTABLE_H
2#define _ASM_X86_PGTABLE_H
3
6c386655
JF
4#define FIRST_USER_ADDRESS 0
5
43cdf5d6
JS
6#define _PAGE_BIT_PRESENT 0 /* is present */
7#define _PAGE_BIT_RW 1 /* writeable */
8#define _PAGE_BIT_USER 2 /* userspace addressable */
9#define _PAGE_BIT_PWT 3 /* page write through */
10#define _PAGE_BIT_PCD 4 /* page cache disabled */
11#define _PAGE_BIT_ACCESSED 5 /* was accessed (raised by CPU) */
12#define _PAGE_BIT_DIRTY 6 /* was written to (raised by CPU) */
6c386655
JF
13#define _PAGE_BIT_FILE 6
14#define _PAGE_BIT_PSE 7 /* 4 MB (or 2MB) page */
9bf5a475 15#define _PAGE_BIT_PAT 7 /* on 4KB pages */
6c386655
JF
16#define _PAGE_BIT_GLOBAL 8 /* Global TLB entry PPro+ */
17#define _PAGE_BIT_UNUSED1 9 /* available for programmer */
18#define _PAGE_BIT_UNUSED2 10
19#define _PAGE_BIT_UNUSED3 11
9bf5a475 20#define _PAGE_BIT_PAT_LARGE 12 /* On 2MB or 1GB pages */
a0a8f536 21#define _PAGE_BIT_SPECIAL _PAGE_BIT_UNUSED1
110e0358 22#define _PAGE_BIT_CPA_TEST _PAGE_BIT_UNUSED1
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23#define _PAGE_BIT_NX 63 /* No execute: only valid after cpuid check */
24
4226ab93
JF
25#define _PAGE_PRESENT (_AT(pteval_t, 1) << _PAGE_BIT_PRESENT)
26#define _PAGE_RW (_AT(pteval_t, 1) << _PAGE_BIT_RW)
27#define _PAGE_USER (_AT(pteval_t, 1) << _PAGE_BIT_USER)
28#define _PAGE_PWT (_AT(pteval_t, 1) << _PAGE_BIT_PWT)
29#define _PAGE_PCD (_AT(pteval_t, 1) << _PAGE_BIT_PCD)
30#define _PAGE_ACCESSED (_AT(pteval_t, 1) << _PAGE_BIT_ACCESSED)
31#define _PAGE_DIRTY (_AT(pteval_t, 1) << _PAGE_BIT_DIRTY)
32#define _PAGE_PSE (_AT(pteval_t, 1) << _PAGE_BIT_PSE)
33#define _PAGE_GLOBAL (_AT(pteval_t, 1) << _PAGE_BIT_GLOBAL)
34#define _PAGE_UNUSED1 (_AT(pteval_t, 1) << _PAGE_BIT_UNUSED1)
35#define _PAGE_UNUSED2 (_AT(pteval_t, 1) << _PAGE_BIT_UNUSED2)
36#define _PAGE_UNUSED3 (_AT(pteval_t, 1) << _PAGE_BIT_UNUSED3)
37#define _PAGE_PAT (_AT(pteval_t, 1) << _PAGE_BIT_PAT)
38#define _PAGE_PAT_LARGE (_AT(pteval_t, 1) << _PAGE_BIT_PAT_LARGE)
a0a8f536 39#define _PAGE_SPECIAL (_AT(pteval_t, 1) << _PAGE_BIT_SPECIAL)
110e0358 40#define _PAGE_CPA_TEST (_AT(pteval_t, 1) << _PAGE_BIT_CPA_TEST)
a0a8f536 41#define __HAVE_ARCH_PTE_SPECIAL
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42
43#if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
4226ab93 44#define _PAGE_NX (_AT(pteval_t, 1) << _PAGE_BIT_NX)
6c386655 45#else
4226ab93 46#define _PAGE_NX (_AT(pteval_t, 0))
6c386655
JF
47#endif
48
49/* If _PAGE_PRESENT is clear, we use these: */
3cbaeafe
JP
50#define _PAGE_FILE _PAGE_DIRTY /* nonlinear file mapping,
51 * saved PTE; unset:swap */
6c386655
JF
52#define _PAGE_PROTNONE _PAGE_PSE /* if the user mapped it with PROT_NONE;
53 pte_present gives true */
54
3cbaeafe
JP
55#define _PAGE_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | \
56 _PAGE_ACCESSED | _PAGE_DIRTY)
57#define _KERNPG_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED | \
58 _PAGE_DIRTY)
6c386655 59
86aaf4fd 60/* Set of bits not changed in pte_modify */
59438c9f 61#define _PAGE_CHG_MASK (PTE_PFN_MASK | _PAGE_PCD | _PAGE_PWT | \
a0a8f536 62 _PAGE_SPECIAL | _PAGE_ACCESSED | _PAGE_DIRTY)
6c386655 63
2e5d9c85 64#define _PAGE_CACHE_MASK (_PAGE_PCD | _PAGE_PWT)
65#define _PAGE_CACHE_WB (0)
66#define _PAGE_CACHE_WC (_PAGE_PWT)
67#define _PAGE_CACHE_UC_MINUS (_PAGE_PCD)
68#define _PAGE_CACHE_UC (_PAGE_PCD | _PAGE_PWT)
69
6c386655 70#define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_ACCESSED)
3cbaeafe
JP
71#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | \
72 _PAGE_ACCESSED | _PAGE_NX)
73
74#define PAGE_SHARED_EXEC __pgprot(_PAGE_PRESENT | _PAGE_RW | \
75 _PAGE_USER | _PAGE_ACCESSED)
76#define PAGE_COPY_NOEXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | \
77 _PAGE_ACCESSED | _PAGE_NX)
78#define PAGE_COPY_EXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | \
79 _PAGE_ACCESSED)
6c386655 80#define PAGE_COPY PAGE_COPY_NOEXEC
3cbaeafe
JP
81#define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_USER | \
82 _PAGE_ACCESSED | _PAGE_NX)
83#define PAGE_READONLY_EXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | \
84 _PAGE_ACCESSED)
6c386655 85
6c386655 86#define __PAGE_KERNEL_EXEC \
8490638c 87 (_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_GLOBAL)
6c386655 88#define __PAGE_KERNEL (__PAGE_KERNEL_EXEC | _PAGE_NX)
6c386655
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89
90#define __PAGE_KERNEL_RO (__PAGE_KERNEL & ~_PAGE_RW)
91#define __PAGE_KERNEL_RX (__PAGE_KERNEL_EXEC & ~_PAGE_RW)
d2e626f4 92#define __PAGE_KERNEL_EXEC_NOCACHE (__PAGE_KERNEL_EXEC | _PAGE_PCD | _PAGE_PWT)
b310f381 93#define __PAGE_KERNEL_WC (__PAGE_KERNEL | _PAGE_CACHE_WC)
6c386655 94#define __PAGE_KERNEL_NOCACHE (__PAGE_KERNEL | _PAGE_PCD | _PAGE_PWT)
d546b67a 95#define __PAGE_KERNEL_UC_MINUS (__PAGE_KERNEL | _PAGE_PCD)
6c386655
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96#define __PAGE_KERNEL_VSYSCALL (__PAGE_KERNEL_RX | _PAGE_USER)
97#define __PAGE_KERNEL_VSYSCALL_NOCACHE (__PAGE_KERNEL_VSYSCALL | _PAGE_PCD | _PAGE_PWT)
98#define __PAGE_KERNEL_LARGE (__PAGE_KERNEL | _PAGE_PSE)
3a9e189d 99#define __PAGE_KERNEL_LARGE_NOCACHE (__PAGE_KERNEL | _PAGE_CACHE_UC | _PAGE_PSE)
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100#define __PAGE_KERNEL_LARGE_EXEC (__PAGE_KERNEL_EXEC | _PAGE_PSE)
101
8490638c
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102#define PAGE_KERNEL __pgprot(__PAGE_KERNEL)
103#define PAGE_KERNEL_RO __pgprot(__PAGE_KERNEL_RO)
104#define PAGE_KERNEL_EXEC __pgprot(__PAGE_KERNEL_EXEC)
105#define PAGE_KERNEL_RX __pgprot(__PAGE_KERNEL_RX)
106#define PAGE_KERNEL_WC __pgprot(__PAGE_KERNEL_WC)
107#define PAGE_KERNEL_NOCACHE __pgprot(__PAGE_KERNEL_NOCACHE)
108#define PAGE_KERNEL_UC_MINUS __pgprot(__PAGE_KERNEL_UC_MINUS)
109#define PAGE_KERNEL_EXEC_NOCACHE __pgprot(__PAGE_KERNEL_EXEC_NOCACHE)
110#define PAGE_KERNEL_LARGE __pgprot(__PAGE_KERNEL_LARGE)
3a9e189d 111#define PAGE_KERNEL_LARGE_NOCACHE __pgprot(__PAGE_KERNEL_LARGE_NOCACHE)
8490638c
JF
112#define PAGE_KERNEL_LARGE_EXEC __pgprot(__PAGE_KERNEL_LARGE_EXEC)
113#define PAGE_KERNEL_VSYSCALL __pgprot(__PAGE_KERNEL_VSYSCALL)
114#define PAGE_KERNEL_VSYSCALL_NOCACHE __pgprot(__PAGE_KERNEL_VSYSCALL_NOCACHE)
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115
116/* xwr */
117#define __P000 PAGE_NONE
118#define __P001 PAGE_READONLY
119#define __P010 PAGE_COPY
120#define __P011 PAGE_COPY
121#define __P100 PAGE_READONLY_EXEC
122#define __P101 PAGE_READONLY_EXEC
123#define __P110 PAGE_COPY_EXEC
124#define __P111 PAGE_COPY_EXEC
125
126#define __S000 PAGE_NONE
127#define __S001 PAGE_READONLY
128#define __S010 PAGE_SHARED
129#define __S011 PAGE_SHARED
130#define __S100 PAGE_READONLY_EXEC
131#define __S101 PAGE_READONLY_EXEC
132#define __S110 PAGE_SHARED_EXEC
133#define __S111 PAGE_SHARED_EXEC
134
b2bc2731
SS
135/*
136 * early identity mapping pte attrib macros.
137 */
138#ifdef CONFIG_X86_64
139#define __PAGE_KERNEL_IDENT_LARGE_EXEC __PAGE_KERNEL_LARGE_EXEC
140#else
141#define PTE_IDENT_ATTR 0x007 /* PRESENT+RW+USER */
142#define PDE_IDENT_ATTR 0x067 /* PRESENT+RW+USER+DIRTY+ACCESSED */
143#define PGD_IDENT_ATTR 0x001 /* PRESENT (no other attributes) */
144#endif
145
4614139c 146#ifndef __ASSEMBLY__
195466dc 147
8405b122
JF
148/*
149 * ZERO_PAGE is a global shared page that is always zero: used
150 * for zero-mapped memory areas etc..
151 */
3cbaeafe 152extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)];
8405b122
JF
153#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
154
e3ed910d
JF
155extern spinlock_t pgd_lock;
156extern struct list_head pgd_list;
8405b122 157
4614139c
JF
158/*
159 * The following only work if pte_present() is true.
160 * Undefined behaviour if not..
161 */
3cbaeafe
JP
162static inline int pte_dirty(pte_t pte)
163{
a15af1c9 164 return pte_flags(pte) & _PAGE_DIRTY;
3cbaeafe
JP
165}
166
167static inline int pte_young(pte_t pte)
168{
a15af1c9 169 return pte_flags(pte) & _PAGE_ACCESSED;
3cbaeafe
JP
170}
171
172static inline int pte_write(pte_t pte)
173{
a15af1c9 174 return pte_flags(pte) & _PAGE_RW;
3cbaeafe
JP
175}
176
177static inline int pte_file(pte_t pte)
178{
a15af1c9 179 return pte_flags(pte) & _PAGE_FILE;
3cbaeafe
JP
180}
181
182static inline int pte_huge(pte_t pte)
183{
a15af1c9 184 return pte_flags(pte) & _PAGE_PSE;
4614139c
JF
185}
186
3cbaeafe
JP
187static inline int pte_global(pte_t pte)
188{
a15af1c9 189 return pte_flags(pte) & _PAGE_GLOBAL;
3cbaeafe
JP
190}
191
192static inline int pte_exec(pte_t pte)
193{
a15af1c9 194 return !(pte_flags(pte) & _PAGE_NX);
3cbaeafe
JP
195}
196
7e675137
NP
197static inline int pte_special(pte_t pte)
198{
a0a8f536 199 return pte_val(pte) & _PAGE_SPECIAL;
7e675137
NP
200}
201
3cbaeafe
JP
202static inline int pmd_large(pmd_t pte)
203{
204 return (pmd_val(pte) & (_PAGE_PSE | _PAGE_PRESENT)) ==
205 (_PAGE_PSE | _PAGE_PRESENT);
206}
207
208static inline pte_t pte_mkclean(pte_t pte)
209{
4226ab93 210 return __pte(pte_val(pte) & ~_PAGE_DIRTY);
3cbaeafe
JP
211}
212
213static inline pte_t pte_mkold(pte_t pte)
214{
4226ab93 215 return __pte(pte_val(pte) & ~_PAGE_ACCESSED);
3cbaeafe
JP
216}
217
218static inline pte_t pte_wrprotect(pte_t pte)
219{
4226ab93 220 return __pte(pte_val(pte) & ~_PAGE_RW);
3cbaeafe
JP
221}
222
223static inline pte_t pte_mkexec(pte_t pte)
224{
4226ab93 225 return __pte(pte_val(pte) & ~_PAGE_NX);
3cbaeafe
JP
226}
227
228static inline pte_t pte_mkdirty(pte_t pte)
229{
230 return __pte(pte_val(pte) | _PAGE_DIRTY);
231}
232
233static inline pte_t pte_mkyoung(pte_t pte)
234{
235 return __pte(pte_val(pte) | _PAGE_ACCESSED);
236}
237
238static inline pte_t pte_mkwrite(pte_t pte)
239{
240 return __pte(pte_val(pte) | _PAGE_RW);
241}
242
243static inline pte_t pte_mkhuge(pte_t pte)
244{
245 return __pte(pte_val(pte) | _PAGE_PSE);
246}
247
248static inline pte_t pte_clrhuge(pte_t pte)
249{
4226ab93 250 return __pte(pte_val(pte) & ~_PAGE_PSE);
3cbaeafe
JP
251}
252
253static inline pte_t pte_mkglobal(pte_t pte)
254{
255 return __pte(pte_val(pte) | _PAGE_GLOBAL);
256}
257
258static inline pte_t pte_clrglobal(pte_t pte)
259{
4226ab93 260 return __pte(pte_val(pte) & ~_PAGE_GLOBAL);
3cbaeafe 261}
4614139c 262
7e675137
NP
263static inline pte_t pte_mkspecial(pte_t pte)
264{
a0a8f536 265 return __pte(pte_val(pte) | _PAGE_SPECIAL);
7e675137
NP
266}
267
6fdc05d4
JF
268extern pteval_t __supported_pte_mask;
269
270static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot)
271{
272 return __pte((((phys_addr_t)page_nr << PAGE_SHIFT) |
273 pgprot_val(pgprot)) & __supported_pte_mask);
274}
275
276static inline pmd_t pfn_pmd(unsigned long page_nr, pgprot_t pgprot)
277{
278 return __pmd((((phys_addr_t)page_nr << PAGE_SHIFT) |
279 pgprot_val(pgprot)) & __supported_pte_mask);
280}
281
38472311
IM
282static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
283{
284 pteval_t val = pte_val(pte);
285
286 /*
287 * Chop off the NX bit (if present), and add the NX portion of
288 * the newprot (if present):
289 */
1c12c4cf
VP
290 val &= _PAGE_CHG_MASK;
291 val |= pgprot_val(newprot) & (~_PAGE_CHG_MASK) & __supported_pte_mask;
38472311
IM
292
293 return __pte(val);
294}
295
1c12c4cf
VP
296/* mprotect needs to preserve PAT bits when updating vm_page_prot */
297#define pgprot_modify pgprot_modify
298static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot)
299{
300 pgprotval_t preservebits = pgprot_val(oldprot) & _PAGE_CHG_MASK;
301 pgprotval_t addbits = pgprot_val(newprot);
302 return __pgprot(preservebits | addbits);
303}
304
77be1fab 305#define pte_pgprot(x) __pgprot(pte_flags(x) & PTE_FLAGS_MASK)
c6ca18eb 306
1e8e23bc
AK
307#define canon_pgprot(p) __pgprot(pgprot_val(p) & __supported_pte_mask)
308
f0970c13 309#ifndef __ASSEMBLY__
310#define __HAVE_PHYS_MEM_ACCESS_PROT
311struct file;
312pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
313 unsigned long size, pgprot_t vma_prot);
314int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn,
315 unsigned long size, pgprot_t *vma_prot);
316#endif
317
d494a961
JF
318/* Install a pte for a particular vaddr in kernel space. */
319void set_pte_vaddr(unsigned long vaddr, pte_t pte);
320
a312b37b
EH
321#ifdef CONFIG_X86_32
322extern void native_pagetable_setup_start(pgd_t *base);
323extern void native_pagetable_setup_done(pgd_t *base);
324#else
325static inline void native_pagetable_setup_start(pgd_t *base) {}
326static inline void native_pagetable_setup_done(pgd_t *base) {}
327#endif
328
4891645e
JF
329#ifdef CONFIG_PARAVIRT
330#include <asm/paravirt.h>
331#else /* !CONFIG_PARAVIRT */
332#define set_pte(ptep, pte) native_set_pte(ptep, pte)
333#define set_pte_at(mm, addr, ptep, pte) native_set_pte_at(mm, addr, ptep, pte)
334
335#define set_pte_present(mm, addr, ptep, pte) \
336 native_set_pte_present(mm, addr, ptep, pte)
337#define set_pte_atomic(ptep, pte) \
338 native_set_pte_atomic(ptep, pte)
339
340#define set_pmd(pmdp, pmd) native_set_pmd(pmdp, pmd)
341
342#ifndef __PAGETABLE_PUD_FOLDED
343#define set_pgd(pgdp, pgd) native_set_pgd(pgdp, pgd)
344#define pgd_clear(pgd) native_pgd_clear(pgd)
345#endif
346
347#ifndef set_pud
348# define set_pud(pudp, pud) native_set_pud(pudp, pud)
349#endif
350
351#ifndef __PAGETABLE_PMD_FOLDED
352#define pud_clear(pud) native_pud_clear(pud)
353#endif
354
355#define pte_clear(mm, addr, ptep) native_pte_clear(mm, addr, ptep)
356#define pmd_clear(pmd) native_pmd_clear(pmd)
357
358#define pte_update(mm, addr, ptep) do { } while (0)
359#define pte_update_defer(mm, addr, ptep) do { } while (0)
a312b37b
EH
360
361static inline void __init paravirt_pagetable_setup_start(pgd_t *base)
362{
363 native_pagetable_setup_start(base);
364}
365
366static inline void __init paravirt_pagetable_setup_done(pgd_t *base)
367{
368 native_pagetable_setup_done(base);
369}
4891645e
JF
370#endif /* CONFIG_PARAVIRT */
371
4614139c
JF
372#endif /* __ASSEMBLY__ */
373
96a388de
TG
374#ifdef CONFIG_X86_32
375# include "pgtable_32.h"
376#else
377# include "pgtable_64.h"
378#endif
6c386655 379
fb15a9b3
JF
380/*
381 * the pgd page can be thought of an array like this: pgd_t[PTRS_PER_PGD]
382 *
383 * this macro returns the index of the entry in the pgd page which would
384 * control the given virtual address
385 */
386#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
387
388/*
389 * pgd_offset() returns a (pgd_t *)
390 * pgd_index() is used get the offset into the pgd page's array of pgd_t's;
391 */
392#define pgd_offset(mm, address) ((mm)->pgd + pgd_index((address)))
393/*
394 * a shortcut which implies the use of the kernel's pgd, instead
395 * of a process's
396 */
397#define pgd_offset_k(address) pgd_offset(&init_mm, (address))
398
399
68db065c
JF
400#define KERNEL_PGD_BOUNDARY pgd_index(PAGE_OFFSET)
401#define KERNEL_PGD_PTRS (PTRS_PER_PGD - KERNEL_PGD_BOUNDARY)
402
195466dc
JF
403#ifndef __ASSEMBLY__
404
30551bb3
TG
405enum {
406 PG_LEVEL_NONE,
407 PG_LEVEL_4K,
408 PG_LEVEL_2M,
86f03989 409 PG_LEVEL_1G,
ce0c0e50 410 PG_LEVEL_NUM
30551bb3
TG
411};
412
65280e61
TG
413#ifdef CONFIG_PROC_FS
414extern void update_page_count(int level, unsigned long pages);
415#else
416static inline void update_page_count(int level, unsigned long pages) { }
417#endif
ce0c0e50 418
0a663088
TG
419/*
420 * Helper function that returns the kernel pagetable entry controlling
421 * the virtual address 'address'. NULL means no pagetable entry present.
422 * NOTE: the return type is pte_t but if the pmd is PSE then we return it
423 * as a pte too.
424 */
da7bfc50 425extern pte_t *lookup_address(unsigned long address, unsigned int *level);
0a663088 426
4891645e
JF
427/* local pte updates need not use xchg for locking */
428static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep)
429{
430 pte_t res = *ptep;
431
432 /* Pure native function needs no input for mm, addr */
433 native_pte_clear(NULL, 0, ptep);
434 return res;
435}
436
437static inline void native_set_pte_at(struct mm_struct *mm, unsigned long addr,
438 pte_t *ptep , pte_t pte)
439{
440 native_set_pte(ptep, pte);
441}
442
195466dc
JF
443#ifndef CONFIG_PARAVIRT
444/*
445 * Rules for using pte_update - it must be called after any PTE update which
446 * has not been done using the set_pte / clear_pte interfaces. It is used by
447 * shadow mode hypervisors to resynchronize the shadow page tables. Kernel PTE
448 * updates should either be sets, clears, or set_pte_atomic for P->P
449 * transitions, which means this hook should only be called for user PTEs.
450 * This hook implies a P->P protection or access change has taken place, which
451 * requires a subsequent TLB flush. The notification can optionally be delayed
452 * until the TLB flush event by using the pte_update_defer form of the
453 * interface, but care must be taken to assure that the flush happens while
454 * still holding the same page table lock so that the shadow and primary pages
455 * do not become out of sync on SMP.
456 */
457#define pte_update(mm, addr, ptep) do { } while (0)
458#define pte_update_defer(mm, addr, ptep) do { } while (0)
459#endif
460
195466dc
JF
461/*
462 * We only update the dirty/accessed state if we set
463 * the dirty bit by hand in the kernel, since the hardware
464 * will do the accessed bit for us, and we don't want to
465 * race with other CPU's that might be updating the dirty
466 * bit at the same time.
467 */
bea41808
JF
468struct vm_area_struct;
469
195466dc 470#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
ee5aa8d3
JF
471extern int ptep_set_access_flags(struct vm_area_struct *vma,
472 unsigned long address, pte_t *ptep,
473 pte_t entry, int dirty);
195466dc
JF
474
475#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
f9fbf1a3
JF
476extern int ptep_test_and_clear_young(struct vm_area_struct *vma,
477 unsigned long addr, pte_t *ptep);
195466dc
JF
478
479#define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
c20311e1
JF
480extern int ptep_clear_flush_young(struct vm_area_struct *vma,
481 unsigned long address, pte_t *ptep);
195466dc
JF
482
483#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
3cbaeafe
JP
484static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr,
485 pte_t *ptep)
195466dc
JF
486{
487 pte_t pte = native_ptep_get_and_clear(ptep);
488 pte_update(mm, addr, ptep);
489 return pte;
490}
491
492#define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
3cbaeafe
JP
493static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
494 unsigned long addr, pte_t *ptep,
495 int full)
195466dc
JF
496{
497 pte_t pte;
498 if (full) {
499 /*
500 * Full address destruction in progress; paravirt does not
501 * care about updates and native needs no locking
502 */
503 pte = native_local_ptep_get_and_clear(ptep);
504 } else {
505 pte = ptep_get_and_clear(mm, addr, ptep);
506 }
507 return pte;
508}
509
510#define __HAVE_ARCH_PTEP_SET_WRPROTECT
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511static inline void ptep_set_wrprotect(struct mm_struct *mm,
512 unsigned long addr, pte_t *ptep)
195466dc 513{
d8d89827 514 clear_bit(_PAGE_BIT_RW, (unsigned long *)&ptep->pte);
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515 pte_update(mm, addr, ptep);
516}
517
85958b46
JF
518/*
519 * clone_pgd_range(pgd_t *dst, pgd_t *src, int count);
520 *
521 * dst - pointer to pgd range anwhere on a pgd page
522 * src - ""
523 * count - the number of pgds to copy.
524 *
525 * dst and src can be on the same page, but the range must not overlap,
526 * and must not cross a page boundary.
527 */
528static inline void clone_pgd_range(pgd_t *dst, pgd_t *src, int count)
529{
530 memcpy(dst, src, count * sizeof(pgd_t));
531}
532
533
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534#include <asm-generic/pgtable.h>
535#endif /* __ASSEMBLY__ */
536
6c386655 537#endif /* _ASM_X86_PGTABLE_H */