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b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
fd1e71e2 AT |
2 | #ifndef _DT_BINDINGS_STM32F746_PINFUNC_H |
3 | #define _DT_BINDINGS_STM32F746_PINFUNC_H | |
4 | ||
5 | #define STM32F746_PA0_FUNC_GPIO 0x0 | |
6 | #define STM32F746_PA0_FUNC_TIM2_CH1_TIM2_ETR 0x2 | |
7 | #define STM32F746_PA0_FUNC_TIM5_CH1 0x3 | |
8 | #define STM32F746_PA0_FUNC_TIM8_ETR 0x4 | |
9 | #define STM32F746_PA0_FUNC_USART2_CTS 0x8 | |
10 | #define STM32F746_PA0_FUNC_UART4_TX 0x9 | |
11 | #define STM32F746_PA0_FUNC_SAI2_SD_B 0xb | |
12 | #define STM32F746_PA0_FUNC_ETH_MII_CRS 0xc | |
13 | #define STM32F746_PA0_FUNC_EVENTOUT 0x10 | |
14 | #define STM32F746_PA0_FUNC_ANALOG 0x11 | |
15 | ||
16 | #define STM32F746_PA1_FUNC_GPIO 0x100 | |
17 | #define STM32F746_PA1_FUNC_TIM2_CH2 0x102 | |
18 | #define STM32F746_PA1_FUNC_TIM5_CH2 0x103 | |
19 | #define STM32F746_PA1_FUNC_USART2_RTS 0x108 | |
20 | #define STM32F746_PA1_FUNC_UART4_RX 0x109 | |
21 | #define STM32F746_PA1_FUNC_QUADSPI_BK1_IO3 0x10a | |
22 | #define STM32F746_PA1_FUNC_SAI2_MCLK_B 0x10b | |
23 | #define STM32F746_PA1_FUNC_ETH_MII_RX_CLK_ETH_RMII_REF_CLK 0x10c | |
24 | #define STM32F746_PA1_FUNC_LCD_R2 0x10f | |
25 | #define STM32F746_PA1_FUNC_EVENTOUT 0x110 | |
26 | #define STM32F746_PA1_FUNC_ANALOG 0x111 | |
27 | ||
28 | #define STM32F746_PA2_FUNC_GPIO 0x200 | |
29 | #define STM32F746_PA2_FUNC_TIM2_CH3 0x202 | |
30 | #define STM32F746_PA2_FUNC_TIM5_CH3 0x203 | |
31 | #define STM32F746_PA2_FUNC_TIM9_CH1 0x204 | |
32 | #define STM32F746_PA2_FUNC_USART2_TX 0x208 | |
33 | #define STM32F746_PA2_FUNC_SAI2_SCK_B 0x209 | |
34 | #define STM32F746_PA2_FUNC_ETH_MDIO 0x20c | |
35 | #define STM32F746_PA2_FUNC_LCD_R1 0x20f | |
36 | #define STM32F746_PA2_FUNC_EVENTOUT 0x210 | |
37 | #define STM32F746_PA2_FUNC_ANALOG 0x211 | |
38 | ||
39 | #define STM32F746_PA3_FUNC_GPIO 0x300 | |
40 | #define STM32F746_PA3_FUNC_TIM2_CH4 0x302 | |
41 | #define STM32F746_PA3_FUNC_TIM5_CH4 0x303 | |
42 | #define STM32F746_PA3_FUNC_TIM9_CH2 0x304 | |
43 | #define STM32F746_PA3_FUNC_USART2_RX 0x308 | |
44 | #define STM32F746_PA3_FUNC_OTG_HS_ULPI_D0 0x30b | |
45 | #define STM32F746_PA3_FUNC_ETH_MII_COL 0x30c | |
46 | #define STM32F746_PA3_FUNC_LCD_B5 0x30f | |
47 | #define STM32F746_PA3_FUNC_EVENTOUT 0x310 | |
48 | #define STM32F746_PA3_FUNC_ANALOG 0x311 | |
49 | ||
50 | #define STM32F746_PA4_FUNC_GPIO 0x400 | |
51 | #define STM32F746_PA4_FUNC_SPI1_NSS_I2S1_WS 0x406 | |
52 | #define STM32F746_PA4_FUNC_SPI3_NSS_I2S3_WS 0x407 | |
53 | #define STM32F746_PA4_FUNC_USART2_CK 0x408 | |
54 | #define STM32F746_PA4_FUNC_OTG_HS_SOF 0x40d | |
55 | #define STM32F746_PA4_FUNC_DCMI_HSYNC 0x40e | |
56 | #define STM32F746_PA4_FUNC_LCD_VSYNC 0x40f | |
57 | #define STM32F746_PA4_FUNC_EVENTOUT 0x410 | |
58 | #define STM32F746_PA4_FUNC_ANALOG 0x411 | |
59 | ||
60 | #define STM32F746_PA5_FUNC_GPIO 0x500 | |
61 | #define STM32F746_PA5_FUNC_TIM2_CH1_TIM2_ETR 0x502 | |
62 | #define STM32F746_PA5_FUNC_TIM8_CH1N 0x504 | |
63 | #define STM32F746_PA5_FUNC_SPI1_SCK_I2S1_CK 0x506 | |
64 | #define STM32F746_PA5_FUNC_OTG_HS_ULPI_CK 0x50b | |
65 | #define STM32F746_PA5_FUNC_LCD_R4 0x50f | |
66 | #define STM32F746_PA5_FUNC_EVENTOUT 0x510 | |
67 | #define STM32F746_PA5_FUNC_ANALOG 0x511 | |
68 | ||
69 | #define STM32F746_PA6_FUNC_GPIO 0x600 | |
70 | #define STM32F746_PA6_FUNC_TIM1_BKIN 0x602 | |
71 | #define STM32F746_PA6_FUNC_TIM3_CH1 0x603 | |
72 | #define STM32F746_PA6_FUNC_TIM8_BKIN 0x604 | |
73 | #define STM32F746_PA6_FUNC_SPI1_MISO 0x606 | |
74 | #define STM32F746_PA6_FUNC_TIM13_CH1 0x60a | |
75 | #define STM32F746_PA6_FUNC_DCMI_PIXCLK 0x60e | |
76 | #define STM32F746_PA6_FUNC_LCD_G2 0x60f | |
77 | #define STM32F746_PA6_FUNC_EVENTOUT 0x610 | |
78 | #define STM32F746_PA6_FUNC_ANALOG 0x611 | |
79 | ||
80 | #define STM32F746_PA7_FUNC_GPIO 0x700 | |
81 | #define STM32F746_PA7_FUNC_TIM1_CH1N 0x702 | |
82 | #define STM32F746_PA7_FUNC_TIM3_CH2 0x703 | |
83 | #define STM32F746_PA7_FUNC_TIM8_CH1N 0x704 | |
84 | #define STM32F746_PA7_FUNC_SPI1_MOSI_I2S1_SD 0x706 | |
85 | #define STM32F746_PA7_FUNC_TIM14_CH1 0x70a | |
86 | #define STM32F746_PA7_FUNC_ETH_MII_RX_DV_ETH_RMII_CRS_DV 0x70c | |
87 | #define STM32F746_PA7_FUNC_FMC_SDNWE 0x70d | |
88 | #define STM32F746_PA7_FUNC_EVENTOUT 0x710 | |
89 | #define STM32F746_PA7_FUNC_ANALOG 0x711 | |
90 | ||
91 | #define STM32F746_PA8_FUNC_GPIO 0x800 | |
92 | #define STM32F746_PA8_FUNC_MCO1 0x801 | |
93 | #define STM32F746_PA8_FUNC_TIM1_CH1 0x802 | |
94 | #define STM32F746_PA8_FUNC_TIM8_BKIN2 0x804 | |
95 | #define STM32F746_PA8_FUNC_I2C3_SCL 0x805 | |
96 | #define STM32F746_PA8_FUNC_USART1_CK 0x808 | |
97 | #define STM32F746_PA8_FUNC_OTG_FS_SOF 0x80b | |
98 | #define STM32F746_PA8_FUNC_LCD_R6 0x80f | |
99 | #define STM32F746_PA8_FUNC_EVENTOUT 0x810 | |
100 | #define STM32F746_PA8_FUNC_ANALOG 0x811 | |
101 | ||
102 | #define STM32F746_PA9_FUNC_GPIO 0x900 | |
103 | #define STM32F746_PA9_FUNC_TIM1_CH2 0x902 | |
104 | #define STM32F746_PA9_FUNC_I2C3_SMBA 0x905 | |
105 | #define STM32F746_PA9_FUNC_SPI2_SCK_I2S2_CK 0x906 | |
106 | #define STM32F746_PA9_FUNC_USART1_TX 0x908 | |
107 | #define STM32F746_PA9_FUNC_DCMI_D0 0x90e | |
108 | #define STM32F746_PA9_FUNC_EVENTOUT 0x910 | |
109 | #define STM32F746_PA9_FUNC_ANALOG 0x911 | |
110 | ||
111 | #define STM32F746_PA10_FUNC_GPIO 0xa00 | |
112 | #define STM32F746_PA10_FUNC_TIM1_CH3 0xa02 | |
113 | #define STM32F746_PA10_FUNC_USART1_RX 0xa08 | |
114 | #define STM32F746_PA10_FUNC_OTG_FS_ID 0xa0b | |
115 | #define STM32F746_PA10_FUNC_DCMI_D1 0xa0e | |
116 | #define STM32F746_PA10_FUNC_EVENTOUT 0xa10 | |
117 | #define STM32F746_PA10_FUNC_ANALOG 0xa11 | |
118 | ||
119 | #define STM32F746_PA11_FUNC_GPIO 0xb00 | |
120 | #define STM32F746_PA11_FUNC_TIM1_CH4 0xb02 | |
121 | #define STM32F746_PA11_FUNC_USART1_CTS 0xb08 | |
122 | #define STM32F746_PA11_FUNC_CAN1_RX 0xb0a | |
123 | #define STM32F746_PA11_FUNC_OTG_FS_DM 0xb0b | |
124 | #define STM32F746_PA11_FUNC_LCD_R4 0xb0f | |
125 | #define STM32F746_PA11_FUNC_EVENTOUT 0xb10 | |
126 | #define STM32F746_PA11_FUNC_ANALOG 0xb11 | |
127 | ||
128 | #define STM32F746_PA12_FUNC_GPIO 0xc00 | |
129 | #define STM32F746_PA12_FUNC_TIM1_ETR 0xc02 | |
130 | #define STM32F746_PA12_FUNC_USART1_RTS 0xc08 | |
131 | #define STM32F746_PA12_FUNC_SAI2_FS_B 0xc09 | |
132 | #define STM32F746_PA12_FUNC_CAN1_TX 0xc0a | |
133 | #define STM32F746_PA12_FUNC_OTG_FS_DP 0xc0b | |
134 | #define STM32F746_PA12_FUNC_LCD_R5 0xc0f | |
135 | #define STM32F746_PA12_FUNC_EVENTOUT 0xc10 | |
136 | #define STM32F746_PA12_FUNC_ANALOG 0xc11 | |
137 | ||
138 | #define STM32F746_PA13_FUNC_GPIO 0xd00 | |
139 | #define STM32F746_PA13_FUNC_JTMS_SWDIO 0xd01 | |
140 | #define STM32F746_PA13_FUNC_EVENTOUT 0xd10 | |
141 | #define STM32F746_PA13_FUNC_ANALOG 0xd11 | |
142 | ||
143 | #define STM32F746_PA14_FUNC_GPIO 0xe00 | |
144 | #define STM32F746_PA14_FUNC_JTCK_SWCLK 0xe01 | |
145 | #define STM32F746_PA14_FUNC_EVENTOUT 0xe10 | |
146 | #define STM32F746_PA14_FUNC_ANALOG 0xe11 | |
147 | ||
148 | #define STM32F746_PA15_FUNC_GPIO 0xf00 | |
149 | #define STM32F746_PA15_FUNC_JTDI 0xf01 | |
150 | #define STM32F746_PA15_FUNC_TIM2_CH1_TIM2_ETR 0xf02 | |
151 | #define STM32F746_PA15_FUNC_HDMI_CEC 0xf05 | |
152 | #define STM32F746_PA15_FUNC_SPI1_NSS_I2S1_WS 0xf06 | |
153 | #define STM32F746_PA15_FUNC_SPI3_NSS_I2S3_WS 0xf07 | |
154 | #define STM32F746_PA15_FUNC_UART4_RTS 0xf09 | |
155 | #define STM32F746_PA15_FUNC_EVENTOUT 0xf10 | |
156 | #define STM32F746_PA15_FUNC_ANALOG 0xf11 | |
157 | ||
158 | ||
159 | #define STM32F746_PB0_FUNC_GPIO 0x1000 | |
160 | #define STM32F746_PB0_FUNC_TIM1_CH2N 0x1002 | |
161 | #define STM32F746_PB0_FUNC_TIM3_CH3 0x1003 | |
162 | #define STM32F746_PB0_FUNC_TIM8_CH2N 0x1004 | |
163 | #define STM32F746_PB0_FUNC_UART4_CTS 0x1009 | |
164 | #define STM32F746_PB0_FUNC_LCD_R3 0x100a | |
165 | #define STM32F746_PB0_FUNC_OTG_HS_ULPI_D1 0x100b | |
166 | #define STM32F746_PB0_FUNC_ETH_MII_RXD2 0x100c | |
167 | #define STM32F746_PB0_FUNC_EVENTOUT 0x1010 | |
168 | #define STM32F746_PB0_FUNC_ANALOG 0x1011 | |
169 | ||
170 | #define STM32F746_PB1_FUNC_GPIO 0x1100 | |
171 | #define STM32F746_PB1_FUNC_TIM1_CH3N 0x1102 | |
172 | #define STM32F746_PB1_FUNC_TIM3_CH4 0x1103 | |
173 | #define STM32F746_PB1_FUNC_TIM8_CH3N 0x1104 | |
174 | #define STM32F746_PB1_FUNC_LCD_R6 0x110a | |
175 | #define STM32F746_PB1_FUNC_OTG_HS_ULPI_D2 0x110b | |
176 | #define STM32F746_PB1_FUNC_ETH_MII_RXD3 0x110c | |
177 | #define STM32F746_PB1_FUNC_EVENTOUT 0x1110 | |
178 | #define STM32F746_PB1_FUNC_ANALOG 0x1111 | |
179 | ||
180 | #define STM32F746_PB2_FUNC_GPIO 0x1200 | |
181 | #define STM32F746_PB2_FUNC_SAI1_SD_A 0x1207 | |
182 | #define STM32F746_PB2_FUNC_SPI3_MOSI_I2S3_SD 0x1208 | |
183 | #define STM32F746_PB2_FUNC_QUADSPI_CLK 0x120a | |
184 | #define STM32F746_PB2_FUNC_EVENTOUT 0x1210 | |
185 | #define STM32F746_PB2_FUNC_ANALOG 0x1211 | |
186 | ||
187 | #define STM32F746_PB3_FUNC_GPIO 0x1300 | |
188 | #define STM32F746_PB3_FUNC_JTDO_TRACESWO 0x1301 | |
189 | #define STM32F746_PB3_FUNC_TIM2_CH2 0x1302 | |
190 | #define STM32F746_PB3_FUNC_SPI1_SCK_I2S1_CK 0x1306 | |
191 | #define STM32F746_PB3_FUNC_SPI3_SCK_I2S3_CK 0x1307 | |
192 | #define STM32F746_PB3_FUNC_EVENTOUT 0x1310 | |
193 | #define STM32F746_PB3_FUNC_ANALOG 0x1311 | |
194 | ||
195 | #define STM32F746_PB4_FUNC_GPIO 0x1400 | |
196 | #define STM32F746_PB4_FUNC_NJTRST 0x1401 | |
197 | #define STM32F746_PB4_FUNC_TIM3_CH1 0x1403 | |
198 | #define STM32F746_PB4_FUNC_SPI1_MISO 0x1406 | |
199 | #define STM32F746_PB4_FUNC_SPI3_MISO 0x1407 | |
200 | #define STM32F746_PB4_FUNC_SPI2_NSS_I2S2_WS 0x1408 | |
201 | #define STM32F746_PB4_FUNC_EVENTOUT 0x1410 | |
202 | #define STM32F746_PB4_FUNC_ANALOG 0x1411 | |
203 | ||
204 | #define STM32F746_PB5_FUNC_GPIO 0x1500 | |
205 | #define STM32F746_PB5_FUNC_TIM3_CH2 0x1503 | |
206 | #define STM32F746_PB5_FUNC_I2C1_SMBA 0x1505 | |
207 | #define STM32F746_PB5_FUNC_SPI1_MOSI_I2S1_SD 0x1506 | |
208 | #define STM32F746_PB5_FUNC_SPI3_MOSI_I2S3_SD 0x1507 | |
209 | #define STM32F746_PB5_FUNC_CAN2_RX 0x150a | |
210 | #define STM32F746_PB5_FUNC_OTG_HS_ULPI_D7 0x150b | |
211 | #define STM32F746_PB5_FUNC_ETH_PPS_OUT 0x150c | |
212 | #define STM32F746_PB5_FUNC_FMC_SDCKE1 0x150d | |
213 | #define STM32F746_PB5_FUNC_DCMI_D10 0x150e | |
214 | #define STM32F746_PB5_FUNC_EVENTOUT 0x1510 | |
215 | #define STM32F746_PB5_FUNC_ANALOG 0x1511 | |
216 | ||
217 | #define STM32F746_PB6_FUNC_GPIO 0x1600 | |
218 | #define STM32F746_PB6_FUNC_TIM4_CH1 0x1603 | |
219 | #define STM32F746_PB6_FUNC_HDMI_CEC 0x1604 | |
220 | #define STM32F746_PB6_FUNC_I2C1_SCL 0x1605 | |
221 | #define STM32F746_PB6_FUNC_USART1_TX 0x1608 | |
222 | #define STM32F746_PB6_FUNC_CAN2_TX 0x160a | |
223 | #define STM32F746_PB6_FUNC_QUADSPI_BK1_NCS 0x160b | |
224 | #define STM32F746_PB6_FUNC_FMC_SDNE1 0x160d | |
225 | #define STM32F746_PB6_FUNC_DCMI_D5 0x160e | |
226 | #define STM32F746_PB6_FUNC_EVENTOUT 0x1610 | |
227 | #define STM32F746_PB6_FUNC_ANALOG 0x1611 | |
228 | ||
229 | #define STM32F746_PB7_FUNC_GPIO 0x1700 | |
230 | #define STM32F746_PB7_FUNC_TIM4_CH2 0x1703 | |
231 | #define STM32F746_PB7_FUNC_I2C1_SDA 0x1705 | |
232 | #define STM32F746_PB7_FUNC_USART1_RX 0x1708 | |
233 | #define STM32F746_PB7_FUNC_FMC_NL 0x170d | |
234 | #define STM32F746_PB7_FUNC_DCMI_VSYNC 0x170e | |
235 | #define STM32F746_PB7_FUNC_EVENTOUT 0x1710 | |
236 | #define STM32F746_PB7_FUNC_ANALOG 0x1711 | |
237 | ||
238 | #define STM32F746_PB8_FUNC_GPIO 0x1800 | |
239 | #define STM32F746_PB8_FUNC_TIM4_CH3 0x1803 | |
240 | #define STM32F746_PB8_FUNC_TIM10_CH1 0x1804 | |
241 | #define STM32F746_PB8_FUNC_I2C1_SCL 0x1805 | |
242 | #define STM32F746_PB8_FUNC_CAN1_RX 0x180a | |
243 | #define STM32F746_PB8_FUNC_ETH_MII_TXD3 0x180c | |
244 | #define STM32F746_PB8_FUNC_SDMMC1_D4 0x180d | |
245 | #define STM32F746_PB8_FUNC_DCMI_D6 0x180e | |
246 | #define STM32F746_PB8_FUNC_LCD_B6 0x180f | |
247 | #define STM32F746_PB8_FUNC_EVENTOUT 0x1810 | |
248 | #define STM32F746_PB8_FUNC_ANALOG 0x1811 | |
249 | ||
250 | #define STM32F746_PB9_FUNC_GPIO 0x1900 | |
251 | #define STM32F746_PB9_FUNC_TIM4_CH4 0x1903 | |
252 | #define STM32F746_PB9_FUNC_TIM11_CH1 0x1904 | |
253 | #define STM32F746_PB9_FUNC_I2C1_SDA 0x1905 | |
254 | #define STM32F746_PB9_FUNC_SPI2_NSS_I2S2_WS 0x1906 | |
255 | #define STM32F746_PB9_FUNC_CAN1_TX 0x190a | |
256 | #define STM32F746_PB9_FUNC_SDMMC1_D5 0x190d | |
257 | #define STM32F746_PB9_FUNC_DCMI_D7 0x190e | |
258 | #define STM32F746_PB9_FUNC_LCD_B7 0x190f | |
259 | #define STM32F746_PB9_FUNC_EVENTOUT 0x1910 | |
260 | #define STM32F746_PB9_FUNC_ANALOG 0x1911 | |
261 | ||
262 | #define STM32F746_PB10_FUNC_GPIO 0x1a00 | |
263 | #define STM32F746_PB10_FUNC_TIM2_CH3 0x1a02 | |
264 | #define STM32F746_PB10_FUNC_I2C2_SCL 0x1a05 | |
265 | #define STM32F746_PB10_FUNC_SPI2_SCK_I2S2_CK 0x1a06 | |
266 | #define STM32F746_PB10_FUNC_USART3_TX 0x1a08 | |
267 | #define STM32F746_PB10_FUNC_OTG_HS_ULPI_D3 0x1a0b | |
268 | #define STM32F746_PB10_FUNC_ETH_MII_RX_ER 0x1a0c | |
269 | #define STM32F746_PB10_FUNC_LCD_G4 0x1a0f | |
270 | #define STM32F746_PB10_FUNC_EVENTOUT 0x1a10 | |
271 | #define STM32F746_PB10_FUNC_ANALOG 0x1a11 | |
272 | ||
273 | #define STM32F746_PB11_FUNC_GPIO 0x1b00 | |
274 | #define STM32F746_PB11_FUNC_TIM2_CH4 0x1b02 | |
275 | #define STM32F746_PB11_FUNC_I2C2_SDA 0x1b05 | |
276 | #define STM32F746_PB11_FUNC_USART3_RX 0x1b08 | |
277 | #define STM32F746_PB11_FUNC_OTG_HS_ULPI_D4 0x1b0b | |
278 | #define STM32F746_PB11_FUNC_ETH_MII_TX_EN_ETH_RMII_TX_EN 0x1b0c | |
279 | #define STM32F746_PB11_FUNC_LCD_G5 0x1b0f | |
280 | #define STM32F746_PB11_FUNC_EVENTOUT 0x1b10 | |
281 | #define STM32F746_PB11_FUNC_ANALOG 0x1b11 | |
282 | ||
283 | #define STM32F746_PB12_FUNC_GPIO 0x1c00 | |
284 | #define STM32F746_PB12_FUNC_TIM1_BKIN 0x1c02 | |
285 | #define STM32F746_PB12_FUNC_I2C2_SMBA 0x1c05 | |
286 | #define STM32F746_PB12_FUNC_SPI2_NSS_I2S2_WS 0x1c06 | |
287 | #define STM32F746_PB12_FUNC_USART3_CK 0x1c08 | |
288 | #define STM32F746_PB12_FUNC_CAN2_RX 0x1c0a | |
289 | #define STM32F746_PB12_FUNC_OTG_HS_ULPI_D5 0x1c0b | |
290 | #define STM32F746_PB12_FUNC_ETH_MII_TXD0_ETH_RMII_TXD0 0x1c0c | |
291 | #define STM32F746_PB12_FUNC_OTG_HS_ID 0x1c0d | |
292 | #define STM32F746_PB12_FUNC_EVENTOUT 0x1c10 | |
293 | #define STM32F746_PB12_FUNC_ANALOG 0x1c11 | |
294 | ||
295 | #define STM32F746_PB13_FUNC_GPIO 0x1d00 | |
296 | #define STM32F746_PB13_FUNC_TIM1_CH1N 0x1d02 | |
297 | #define STM32F746_PB13_FUNC_SPI2_SCK_I2S2_CK 0x1d06 | |
298 | #define STM32F746_PB13_FUNC_USART3_CTS 0x1d08 | |
299 | #define STM32F746_PB13_FUNC_CAN2_TX 0x1d0a | |
300 | #define STM32F746_PB13_FUNC_OTG_HS_ULPI_D6 0x1d0b | |
301 | #define STM32F746_PB13_FUNC_ETH_MII_TXD1_ETH_RMII_TXD1 0x1d0c | |
302 | #define STM32F746_PB13_FUNC_EVENTOUT 0x1d10 | |
303 | #define STM32F746_PB13_FUNC_ANALOG 0x1d11 | |
304 | ||
305 | #define STM32F746_PB14_FUNC_GPIO 0x1e00 | |
306 | #define STM32F746_PB14_FUNC_TIM1_CH2N 0x1e02 | |
307 | #define STM32F746_PB14_FUNC_TIM8_CH2N 0x1e04 | |
308 | #define STM32F746_PB14_FUNC_SPI2_MISO 0x1e06 | |
309 | #define STM32F746_PB14_FUNC_USART3_RTS 0x1e08 | |
310 | #define STM32F746_PB14_FUNC_TIM12_CH1 0x1e0a | |
311 | #define STM32F746_PB14_FUNC_OTG_HS_DM 0x1e0d | |
312 | #define STM32F746_PB14_FUNC_EVENTOUT 0x1e10 | |
313 | #define STM32F746_PB14_FUNC_ANALOG 0x1e11 | |
314 | ||
315 | #define STM32F746_PB15_FUNC_GPIO 0x1f00 | |
316 | #define STM32F746_PB15_FUNC_RTC_REFIN 0x1f01 | |
317 | #define STM32F746_PB15_FUNC_TIM1_CH3N 0x1f02 | |
318 | #define STM32F746_PB15_FUNC_TIM8_CH3N 0x1f04 | |
319 | #define STM32F746_PB15_FUNC_SPI2_MOSI_I2S2_SD 0x1f06 | |
320 | #define STM32F746_PB15_FUNC_TIM12_CH2 0x1f0a | |
321 | #define STM32F746_PB15_FUNC_OTG_HS_DP 0x1f0d | |
322 | #define STM32F746_PB15_FUNC_EVENTOUT 0x1f10 | |
323 | #define STM32F746_PB15_FUNC_ANALOG 0x1f11 | |
324 | ||
325 | ||
326 | #define STM32F746_PC0_FUNC_GPIO 0x2000 | |
327 | #define STM32F746_PC0_FUNC_SAI2_FS_B 0x2009 | |
328 | #define STM32F746_PC0_FUNC_OTG_HS_ULPI_STP 0x200b | |
329 | #define STM32F746_PC0_FUNC_FMC_SDNWE 0x200d | |
330 | #define STM32F746_PC0_FUNC_LCD_R5 0x200f | |
331 | #define STM32F746_PC0_FUNC_EVENTOUT 0x2010 | |
332 | #define STM32F746_PC0_FUNC_ANALOG 0x2011 | |
333 | ||
334 | #define STM32F746_PC1_FUNC_GPIO 0x2100 | |
335 | #define STM32F746_PC1_FUNC_TRACED0 0x2101 | |
336 | #define STM32F746_PC1_FUNC_SPI2_MOSI_I2S2_SD 0x2106 | |
337 | #define STM32F746_PC1_FUNC_SAI1_SD_A 0x2107 | |
338 | #define STM32F746_PC1_FUNC_ETH_MDC 0x210c | |
339 | #define STM32F746_PC1_FUNC_EVENTOUT 0x2110 | |
340 | #define STM32F746_PC1_FUNC_ANALOG 0x2111 | |
341 | ||
342 | #define STM32F746_PC2_FUNC_GPIO 0x2200 | |
343 | #define STM32F746_PC2_FUNC_SPI2_MISO 0x2206 | |
344 | #define STM32F746_PC2_FUNC_OTG_HS_ULPI_DIR 0x220b | |
345 | #define STM32F746_PC2_FUNC_ETH_MII_TXD2 0x220c | |
346 | #define STM32F746_PC2_FUNC_FMC_SDNE0 0x220d | |
347 | #define STM32F746_PC2_FUNC_EVENTOUT 0x2210 | |
348 | #define STM32F746_PC2_FUNC_ANALOG 0x2211 | |
349 | ||
350 | #define STM32F746_PC3_FUNC_GPIO 0x2300 | |
351 | #define STM32F746_PC3_FUNC_SPI2_MOSI_I2S2_SD 0x2306 | |
352 | #define STM32F746_PC3_FUNC_OTG_HS_ULPI_NXT 0x230b | |
353 | #define STM32F746_PC3_FUNC_ETH_MII_TX_CLK 0x230c | |
354 | #define STM32F746_PC3_FUNC_FMC_SDCKE0 0x230d | |
355 | #define STM32F746_PC3_FUNC_EVENTOUT 0x2310 | |
356 | #define STM32F746_PC3_FUNC_ANALOG 0x2311 | |
357 | ||
358 | #define STM32F746_PC4_FUNC_GPIO 0x2400 | |
359 | #define STM32F746_PC4_FUNC_I2S1_MCK 0x2406 | |
360 | #define STM32F746_PC4_FUNC_SPDIFRX_IN2 0x2409 | |
361 | #define STM32F746_PC4_FUNC_ETH_MII_RXD0_ETH_RMII_RXD0 0x240c | |
362 | #define STM32F746_PC4_FUNC_FMC_SDNE0 0x240d | |
363 | #define STM32F746_PC4_FUNC_EVENTOUT 0x2410 | |
364 | #define STM32F746_PC4_FUNC_ANALOG 0x2411 | |
365 | ||
366 | #define STM32F746_PC5_FUNC_GPIO 0x2500 | |
367 | #define STM32F746_PC5_FUNC_SPDIFRX_IN3 0x2509 | |
368 | #define STM32F746_PC5_FUNC_ETH_MII_RXD1_ETH_RMII_RXD1 0x250c | |
369 | #define STM32F746_PC5_FUNC_FMC_SDCKE0 0x250d | |
370 | #define STM32F746_PC5_FUNC_EVENTOUT 0x2510 | |
371 | #define STM32F746_PC5_FUNC_ANALOG 0x2511 | |
372 | ||
373 | #define STM32F746_PC6_FUNC_GPIO 0x2600 | |
374 | #define STM32F746_PC6_FUNC_TIM3_CH1 0x2603 | |
375 | #define STM32F746_PC6_FUNC_TIM8_CH1 0x2604 | |
376 | #define STM32F746_PC6_FUNC_I2S2_MCK 0x2606 | |
377 | #define STM32F746_PC6_FUNC_USART6_TX 0x2609 | |
378 | #define STM32F746_PC6_FUNC_SDMMC1_D6 0x260d | |
379 | #define STM32F746_PC6_FUNC_DCMI_D0 0x260e | |
380 | #define STM32F746_PC6_FUNC_LCD_HSYNC 0x260f | |
381 | #define STM32F746_PC6_FUNC_EVENTOUT 0x2610 | |
382 | #define STM32F746_PC6_FUNC_ANALOG 0x2611 | |
383 | ||
384 | #define STM32F746_PC7_FUNC_GPIO 0x2700 | |
385 | #define STM32F746_PC7_FUNC_TIM3_CH2 0x2703 | |
386 | #define STM32F746_PC7_FUNC_TIM8_CH2 0x2704 | |
387 | #define STM32F746_PC7_FUNC_I2S3_MCK 0x2707 | |
388 | #define STM32F746_PC7_FUNC_USART6_RX 0x2709 | |
389 | #define STM32F746_PC7_FUNC_SDMMC1_D7 0x270d | |
390 | #define STM32F746_PC7_FUNC_DCMI_D1 0x270e | |
391 | #define STM32F746_PC7_FUNC_LCD_G6 0x270f | |
392 | #define STM32F746_PC7_FUNC_EVENTOUT 0x2710 | |
393 | #define STM32F746_PC7_FUNC_ANALOG 0x2711 | |
394 | ||
395 | #define STM32F746_PC8_FUNC_GPIO 0x2800 | |
396 | #define STM32F746_PC8_FUNC_TRACED1 0x2801 | |
397 | #define STM32F746_PC8_FUNC_TIM3_CH3 0x2803 | |
398 | #define STM32F746_PC8_FUNC_TIM8_CH3 0x2804 | |
399 | #define STM32F746_PC8_FUNC_UART5_RTS 0x2808 | |
400 | #define STM32F746_PC8_FUNC_USART6_CK 0x2809 | |
401 | #define STM32F746_PC8_FUNC_SDMMC1_D0 0x280d | |
402 | #define STM32F746_PC8_FUNC_DCMI_D2 0x280e | |
403 | #define STM32F746_PC8_FUNC_EVENTOUT 0x2810 | |
404 | #define STM32F746_PC8_FUNC_ANALOG 0x2811 | |
405 | ||
406 | #define STM32F746_PC9_FUNC_GPIO 0x2900 | |
407 | #define STM32F746_PC9_FUNC_MCO2 0x2901 | |
408 | #define STM32F746_PC9_FUNC_TIM3_CH4 0x2903 | |
409 | #define STM32F746_PC9_FUNC_TIM8_CH4 0x2904 | |
410 | #define STM32F746_PC9_FUNC_I2C3_SDA 0x2905 | |
411 | #define STM32F746_PC9_FUNC_I2S_CKIN 0x2906 | |
412 | #define STM32F746_PC9_FUNC_UART5_CTS 0x2908 | |
413 | #define STM32F746_PC9_FUNC_QUADSPI_BK1_IO0 0x290a | |
414 | #define STM32F746_PC9_FUNC_SDMMC1_D1 0x290d | |
415 | #define STM32F746_PC9_FUNC_DCMI_D3 0x290e | |
416 | #define STM32F746_PC9_FUNC_EVENTOUT 0x2910 | |
417 | #define STM32F746_PC9_FUNC_ANALOG 0x2911 | |
418 | ||
419 | #define STM32F746_PC10_FUNC_GPIO 0x2a00 | |
420 | #define STM32F746_PC10_FUNC_SPI3_SCK_I2S3_CK 0x2a07 | |
421 | #define STM32F746_PC10_FUNC_USART3_TX 0x2a08 | |
422 | #define STM32F746_PC10_FUNC_UART4_TX 0x2a09 | |
423 | #define STM32F746_PC10_FUNC_QUADSPI_BK1_IO1 0x2a0a | |
424 | #define STM32F746_PC10_FUNC_SDMMC1_D2 0x2a0d | |
425 | #define STM32F746_PC10_FUNC_DCMI_D8 0x2a0e | |
426 | #define STM32F746_PC10_FUNC_LCD_R2 0x2a0f | |
427 | #define STM32F746_PC10_FUNC_EVENTOUT 0x2a10 | |
428 | #define STM32F746_PC10_FUNC_ANALOG 0x2a11 | |
429 | ||
430 | #define STM32F746_PC11_FUNC_GPIO 0x2b00 | |
431 | #define STM32F746_PC11_FUNC_SPI3_MISO 0x2b07 | |
432 | #define STM32F746_PC11_FUNC_USART3_RX 0x2b08 | |
433 | #define STM32F746_PC11_FUNC_UART4_RX 0x2b09 | |
434 | #define STM32F746_PC11_FUNC_QUADSPI_BK2_NCS 0x2b0a | |
435 | #define STM32F746_PC11_FUNC_SDMMC1_D3 0x2b0d | |
436 | #define STM32F746_PC11_FUNC_DCMI_D4 0x2b0e | |
437 | #define STM32F746_PC11_FUNC_EVENTOUT 0x2b10 | |
438 | #define STM32F746_PC11_FUNC_ANALOG 0x2b11 | |
439 | ||
440 | #define STM32F746_PC12_FUNC_GPIO 0x2c00 | |
441 | #define STM32F746_PC12_FUNC_TRACED3 0x2c01 | |
442 | #define STM32F746_PC12_FUNC_SPI3_MOSI_I2S3_SD 0x2c07 | |
443 | #define STM32F746_PC12_FUNC_USART3_CK 0x2c08 | |
444 | #define STM32F746_PC12_FUNC_UART5_TX 0x2c09 | |
445 | #define STM32F746_PC12_FUNC_SDMMC1_CK 0x2c0d | |
446 | #define STM32F746_PC12_FUNC_DCMI_D9 0x2c0e | |
447 | #define STM32F746_PC12_FUNC_EVENTOUT 0x2c10 | |
448 | #define STM32F746_PC12_FUNC_ANALOG 0x2c11 | |
449 | ||
450 | #define STM32F746_PC13_FUNC_GPIO 0x2d00 | |
451 | #define STM32F746_PC13_FUNC_EVENTOUT 0x2d10 | |
452 | #define STM32F746_PC13_FUNC_ANALOG 0x2d11 | |
453 | ||
454 | #define STM32F746_PC14_FUNC_GPIO 0x2e00 | |
455 | #define STM32F746_PC14_FUNC_EVENTOUT 0x2e10 | |
456 | #define STM32F746_PC14_FUNC_ANALOG 0x2e11 | |
457 | ||
458 | #define STM32F746_PC15_FUNC_GPIO 0x2f00 | |
459 | #define STM32F746_PC15_FUNC_EVENTOUT 0x2f10 | |
460 | #define STM32F746_PC15_FUNC_ANALOG 0x2f11 | |
461 | ||
462 | ||
463 | #define STM32F746_PD0_FUNC_GPIO 0x3000 | |
464 | #define STM32F746_PD0_FUNC_CAN1_RX 0x300a | |
465 | #define STM32F746_PD0_FUNC_FMC_D2 0x300d | |
466 | #define STM32F746_PD0_FUNC_EVENTOUT 0x3010 | |
467 | #define STM32F746_PD0_FUNC_ANALOG 0x3011 | |
468 | ||
469 | #define STM32F746_PD1_FUNC_GPIO 0x3100 | |
470 | #define STM32F746_PD1_FUNC_CAN1_TX 0x310a | |
471 | #define STM32F746_PD1_FUNC_FMC_D3 0x310d | |
472 | #define STM32F746_PD1_FUNC_EVENTOUT 0x3110 | |
473 | #define STM32F746_PD1_FUNC_ANALOG 0x3111 | |
474 | ||
475 | #define STM32F746_PD2_FUNC_GPIO 0x3200 | |
476 | #define STM32F746_PD2_FUNC_TRACED2 0x3201 | |
477 | #define STM32F746_PD2_FUNC_TIM3_ETR 0x3203 | |
478 | #define STM32F746_PD2_FUNC_UART5_RX 0x3209 | |
479 | #define STM32F746_PD2_FUNC_SDMMC1_CMD 0x320d | |
480 | #define STM32F746_PD2_FUNC_DCMI_D11 0x320e | |
481 | #define STM32F746_PD2_FUNC_EVENTOUT 0x3210 | |
482 | #define STM32F746_PD2_FUNC_ANALOG 0x3211 | |
483 | ||
484 | #define STM32F746_PD3_FUNC_GPIO 0x3300 | |
485 | #define STM32F746_PD3_FUNC_SPI2_SCK_I2S2_CK 0x3306 | |
486 | #define STM32F746_PD3_FUNC_USART2_CTS 0x3308 | |
487 | #define STM32F746_PD3_FUNC_FMC_CLK 0x330d | |
488 | #define STM32F746_PD3_FUNC_DCMI_D5 0x330e | |
489 | #define STM32F746_PD3_FUNC_LCD_G7 0x330f | |
490 | #define STM32F746_PD3_FUNC_EVENTOUT 0x3310 | |
491 | #define STM32F746_PD3_FUNC_ANALOG 0x3311 | |
492 | ||
493 | #define STM32F746_PD4_FUNC_GPIO 0x3400 | |
494 | #define STM32F746_PD4_FUNC_USART2_RTS 0x3408 | |
495 | #define STM32F746_PD4_FUNC_FMC_NOE 0x340d | |
496 | #define STM32F746_PD4_FUNC_EVENTOUT 0x3410 | |
497 | #define STM32F746_PD4_FUNC_ANALOG 0x3411 | |
498 | ||
499 | #define STM32F746_PD5_FUNC_GPIO 0x3500 | |
500 | #define STM32F746_PD5_FUNC_USART2_TX 0x3508 | |
501 | #define STM32F746_PD5_FUNC_FMC_NWE 0x350d | |
502 | #define STM32F746_PD5_FUNC_EVENTOUT 0x3510 | |
503 | #define STM32F746_PD5_FUNC_ANALOG 0x3511 | |
504 | ||
505 | #define STM32F746_PD6_FUNC_GPIO 0x3600 | |
506 | #define STM32F746_PD6_FUNC_SPI3_MOSI_I2S3_SD 0x3606 | |
507 | #define STM32F746_PD6_FUNC_SAI1_SD_A 0x3607 | |
508 | #define STM32F746_PD6_FUNC_USART2_RX 0x3608 | |
509 | #define STM32F746_PD6_FUNC_FMC_NWAIT 0x360d | |
510 | #define STM32F746_PD6_FUNC_DCMI_D10 0x360e | |
511 | #define STM32F746_PD6_FUNC_LCD_B2 0x360f | |
512 | #define STM32F746_PD6_FUNC_EVENTOUT 0x3610 | |
513 | #define STM32F746_PD6_FUNC_ANALOG 0x3611 | |
514 | ||
515 | #define STM32F746_PD7_FUNC_GPIO 0x3700 | |
516 | #define STM32F746_PD7_FUNC_USART2_CK 0x3708 | |
517 | #define STM32F746_PD7_FUNC_SPDIFRX_IN0 0x3709 | |
518 | #define STM32F746_PD7_FUNC_FMC_NE1 0x370d | |
519 | #define STM32F746_PD7_FUNC_EVENTOUT 0x3710 | |
520 | #define STM32F746_PD7_FUNC_ANALOG 0x3711 | |
521 | ||
522 | #define STM32F746_PD8_FUNC_GPIO 0x3800 | |
523 | #define STM32F746_PD8_FUNC_USART3_TX 0x3808 | |
524 | #define STM32F746_PD8_FUNC_SPDIFRX_IN1 0x3809 | |
525 | #define STM32F746_PD8_FUNC_FMC_D13 0x380d | |
526 | #define STM32F746_PD8_FUNC_EVENTOUT 0x3810 | |
527 | #define STM32F746_PD8_FUNC_ANALOG 0x3811 | |
528 | ||
529 | #define STM32F746_PD9_FUNC_GPIO 0x3900 | |
530 | #define STM32F746_PD9_FUNC_USART3_RX 0x3908 | |
531 | #define STM32F746_PD9_FUNC_FMC_D14 0x390d | |
532 | #define STM32F746_PD9_FUNC_EVENTOUT 0x3910 | |
533 | #define STM32F746_PD9_FUNC_ANALOG 0x3911 | |
534 | ||
535 | #define STM32F746_PD10_FUNC_GPIO 0x3a00 | |
536 | #define STM32F746_PD10_FUNC_USART3_CK 0x3a08 | |
537 | #define STM32F746_PD10_FUNC_FMC_D15 0x3a0d | |
538 | #define STM32F746_PD10_FUNC_LCD_B3 0x3a0f | |
539 | #define STM32F746_PD10_FUNC_EVENTOUT 0x3a10 | |
540 | #define STM32F746_PD10_FUNC_ANALOG 0x3a11 | |
541 | ||
542 | #define STM32F746_PD11_FUNC_GPIO 0x3b00 | |
543 | #define STM32F746_PD11_FUNC_I2C4_SMBA 0x3b05 | |
544 | #define STM32F746_PD11_FUNC_USART3_CTS 0x3b08 | |
545 | #define STM32F746_PD11_FUNC_QUADSPI_BK1_IO0 0x3b0a | |
546 | #define STM32F746_PD11_FUNC_SAI2_SD_A 0x3b0b | |
547 | #define STM32F746_PD11_FUNC_FMC_A16_FMC_CLE 0x3b0d | |
548 | #define STM32F746_PD11_FUNC_EVENTOUT 0x3b10 | |
549 | #define STM32F746_PD11_FUNC_ANALOG 0x3b11 | |
550 | ||
551 | #define STM32F746_PD12_FUNC_GPIO 0x3c00 | |
552 | #define STM32F746_PD12_FUNC_TIM4_CH1 0x3c03 | |
553 | #define STM32F746_PD12_FUNC_LPTIM1_IN1 0x3c04 | |
554 | #define STM32F746_PD12_FUNC_I2C4_SCL 0x3c05 | |
555 | #define STM32F746_PD12_FUNC_USART3_RTS 0x3c08 | |
556 | #define STM32F746_PD12_FUNC_QUADSPI_BK1_IO1 0x3c0a | |
557 | #define STM32F746_PD12_FUNC_SAI2_FS_A 0x3c0b | |
558 | #define STM32F746_PD12_FUNC_FMC_A17_FMC_ALE 0x3c0d | |
559 | #define STM32F746_PD12_FUNC_EVENTOUT 0x3c10 | |
560 | #define STM32F746_PD12_FUNC_ANALOG 0x3c11 | |
561 | ||
562 | #define STM32F746_PD13_FUNC_GPIO 0x3d00 | |
563 | #define STM32F746_PD13_FUNC_TIM4_CH2 0x3d03 | |
564 | #define STM32F746_PD13_FUNC_LPTIM1_OUT 0x3d04 | |
565 | #define STM32F746_PD13_FUNC_I2C4_SDA 0x3d05 | |
566 | #define STM32F746_PD13_FUNC_QUADSPI_BK1_IO3 0x3d0a | |
567 | #define STM32F746_PD13_FUNC_SAI2_SCK_A 0x3d0b | |
568 | #define STM32F746_PD13_FUNC_FMC_A18 0x3d0d | |
569 | #define STM32F746_PD13_FUNC_EVENTOUT 0x3d10 | |
570 | #define STM32F746_PD13_FUNC_ANALOG 0x3d11 | |
571 | ||
572 | #define STM32F746_PD14_FUNC_GPIO 0x3e00 | |
573 | #define STM32F746_PD14_FUNC_TIM4_CH3 0x3e03 | |
574 | #define STM32F746_PD14_FUNC_UART8_CTS 0x3e09 | |
575 | #define STM32F746_PD14_FUNC_FMC_D0 0x3e0d | |
576 | #define STM32F746_PD14_FUNC_EVENTOUT 0x3e10 | |
577 | #define STM32F746_PD14_FUNC_ANALOG 0x3e11 | |
578 | ||
579 | #define STM32F746_PD15_FUNC_GPIO 0x3f00 | |
580 | #define STM32F746_PD15_FUNC_TIM4_CH4 0x3f03 | |
581 | #define STM32F746_PD15_FUNC_UART8_RTS 0x3f09 | |
582 | #define STM32F746_PD15_FUNC_FMC_D1 0x3f0d | |
583 | #define STM32F746_PD15_FUNC_EVENTOUT 0x3f10 | |
584 | #define STM32F746_PD15_FUNC_ANALOG 0x3f11 | |
585 | ||
586 | ||
587 | #define STM32F746_PE0_FUNC_GPIO 0x4000 | |
588 | #define STM32F746_PE0_FUNC_TIM4_ETR 0x4003 | |
589 | #define STM32F746_PE0_FUNC_LPTIM1_ETR 0x4004 | |
590 | #define STM32F746_PE0_FUNC_UART8_RX 0x4009 | |
591 | #define STM32F746_PE0_FUNC_SAI2_MCLK_A 0x400b | |
592 | #define STM32F746_PE0_FUNC_FMC_NBL0 0x400d | |
593 | #define STM32F746_PE0_FUNC_DCMI_D2 0x400e | |
594 | #define STM32F746_PE0_FUNC_EVENTOUT 0x4010 | |
595 | #define STM32F746_PE0_FUNC_ANALOG 0x4011 | |
596 | ||
597 | #define STM32F746_PE1_FUNC_GPIO 0x4100 | |
598 | #define STM32F746_PE1_FUNC_LPTIM1_IN2 0x4104 | |
599 | #define STM32F746_PE1_FUNC_UART8_TX 0x4109 | |
600 | #define STM32F746_PE1_FUNC_FMC_NBL1 0x410d | |
601 | #define STM32F746_PE1_FUNC_DCMI_D3 0x410e | |
602 | #define STM32F746_PE1_FUNC_EVENTOUT 0x4110 | |
603 | #define STM32F746_PE1_FUNC_ANALOG 0x4111 | |
604 | ||
605 | #define STM32F746_PE2_FUNC_GPIO 0x4200 | |
606 | #define STM32F746_PE2_FUNC_TRACECLK 0x4201 | |
607 | #define STM32F746_PE2_FUNC_SPI4_SCK 0x4206 | |
608 | #define STM32F746_PE2_FUNC_SAI1_MCLK_A 0x4207 | |
609 | #define STM32F746_PE2_FUNC_QUADSPI_BK1_IO2 0x420a | |
610 | #define STM32F746_PE2_FUNC_ETH_MII_TXD3 0x420c | |
611 | #define STM32F746_PE2_FUNC_FMC_A23 0x420d | |
612 | #define STM32F746_PE2_FUNC_EVENTOUT 0x4210 | |
613 | #define STM32F746_PE2_FUNC_ANALOG 0x4211 | |
614 | ||
615 | #define STM32F746_PE3_FUNC_GPIO 0x4300 | |
616 | #define STM32F746_PE3_FUNC_TRACED0 0x4301 | |
617 | #define STM32F746_PE3_FUNC_SAI1_SD_B 0x4307 | |
618 | #define STM32F746_PE3_FUNC_FMC_A19 0x430d | |
619 | #define STM32F746_PE3_FUNC_EVENTOUT 0x4310 | |
620 | #define STM32F746_PE3_FUNC_ANALOG 0x4311 | |
621 | ||
622 | #define STM32F746_PE4_FUNC_GPIO 0x4400 | |
623 | #define STM32F746_PE4_FUNC_TRACED1 0x4401 | |
624 | #define STM32F746_PE4_FUNC_SPI4_NSS 0x4406 | |
625 | #define STM32F746_PE4_FUNC_SAI1_FS_A 0x4407 | |
626 | #define STM32F746_PE4_FUNC_FMC_A20 0x440d | |
627 | #define STM32F746_PE4_FUNC_DCMI_D4 0x440e | |
628 | #define STM32F746_PE4_FUNC_LCD_B0 0x440f | |
629 | #define STM32F746_PE4_FUNC_EVENTOUT 0x4410 | |
630 | #define STM32F746_PE4_FUNC_ANALOG 0x4411 | |
631 | ||
632 | #define STM32F746_PE5_FUNC_GPIO 0x4500 | |
633 | #define STM32F746_PE5_FUNC_TRACED2 0x4501 | |
634 | #define STM32F746_PE5_FUNC_TIM9_CH1 0x4504 | |
635 | #define STM32F746_PE5_FUNC_SPI4_MISO 0x4506 | |
636 | #define STM32F746_PE5_FUNC_SAI1_SCK_A 0x4507 | |
637 | #define STM32F746_PE5_FUNC_FMC_A21 0x450d | |
638 | #define STM32F746_PE5_FUNC_DCMI_D6 0x450e | |
639 | #define STM32F746_PE5_FUNC_LCD_G0 0x450f | |
640 | #define STM32F746_PE5_FUNC_EVENTOUT 0x4510 | |
641 | #define STM32F746_PE5_FUNC_ANALOG 0x4511 | |
642 | ||
643 | #define STM32F746_PE6_FUNC_GPIO 0x4600 | |
644 | #define STM32F746_PE6_FUNC_TRACED3 0x4601 | |
645 | #define STM32F746_PE6_FUNC_TIM1_BKIN2 0x4602 | |
646 | #define STM32F746_PE6_FUNC_TIM9_CH2 0x4604 | |
647 | #define STM32F746_PE6_FUNC_SPI4_MOSI 0x4606 | |
648 | #define STM32F746_PE6_FUNC_SAI1_SD_A 0x4607 | |
649 | #define STM32F746_PE6_FUNC_SAI2_MCLK_B 0x460b | |
650 | #define STM32F746_PE6_FUNC_FMC_A22 0x460d | |
651 | #define STM32F746_PE6_FUNC_DCMI_D7 0x460e | |
652 | #define STM32F746_PE6_FUNC_LCD_G1 0x460f | |
653 | #define STM32F746_PE6_FUNC_EVENTOUT 0x4610 | |
654 | #define STM32F746_PE6_FUNC_ANALOG 0x4611 | |
655 | ||
656 | #define STM32F746_PE7_FUNC_GPIO 0x4700 | |
657 | #define STM32F746_PE7_FUNC_TIM1_ETR 0x4702 | |
658 | #define STM32F746_PE7_FUNC_UART7_RX 0x4709 | |
659 | #define STM32F746_PE7_FUNC_QUADSPI_BK2_IO0 0x470b | |
660 | #define STM32F746_PE7_FUNC_FMC_D4 0x470d | |
661 | #define STM32F746_PE7_FUNC_EVENTOUT 0x4710 | |
662 | #define STM32F746_PE7_FUNC_ANALOG 0x4711 | |
663 | ||
664 | #define STM32F746_PE8_FUNC_GPIO 0x4800 | |
665 | #define STM32F746_PE8_FUNC_TIM1_CH1N 0x4802 | |
666 | #define STM32F746_PE8_FUNC_UART7_TX 0x4809 | |
667 | #define STM32F746_PE8_FUNC_QUADSPI_BK2_IO1 0x480b | |
668 | #define STM32F746_PE8_FUNC_FMC_D5 0x480d | |
669 | #define STM32F746_PE8_FUNC_EVENTOUT 0x4810 | |
670 | #define STM32F746_PE8_FUNC_ANALOG 0x4811 | |
671 | ||
672 | #define STM32F746_PE9_FUNC_GPIO 0x4900 | |
673 | #define STM32F746_PE9_FUNC_TIM1_CH1 0x4902 | |
674 | #define STM32F746_PE9_FUNC_UART7_RTS 0x4909 | |
675 | #define STM32F746_PE9_FUNC_QUADSPI_BK2_IO2 0x490b | |
676 | #define STM32F746_PE9_FUNC_FMC_D6 0x490d | |
677 | #define STM32F746_PE9_FUNC_EVENTOUT 0x4910 | |
678 | #define STM32F746_PE9_FUNC_ANALOG 0x4911 | |
679 | ||
680 | #define STM32F746_PE10_FUNC_GPIO 0x4a00 | |
681 | #define STM32F746_PE10_FUNC_TIM1_CH2N 0x4a02 | |
682 | #define STM32F746_PE10_FUNC_UART7_CTS 0x4a09 | |
683 | #define STM32F746_PE10_FUNC_QUADSPI_BK2_IO3 0x4a0b | |
684 | #define STM32F746_PE10_FUNC_FMC_D7 0x4a0d | |
685 | #define STM32F746_PE10_FUNC_EVENTOUT 0x4a10 | |
686 | #define STM32F746_PE10_FUNC_ANALOG 0x4a11 | |
687 | ||
688 | #define STM32F746_PE11_FUNC_GPIO 0x4b00 | |
689 | #define STM32F746_PE11_FUNC_TIM1_CH2 0x4b02 | |
690 | #define STM32F746_PE11_FUNC_SPI4_NSS 0x4b06 | |
691 | #define STM32F746_PE11_FUNC_SAI2_SD_B 0x4b0b | |
692 | #define STM32F746_PE11_FUNC_FMC_D8 0x4b0d | |
693 | #define STM32F746_PE11_FUNC_LCD_G3 0x4b0f | |
694 | #define STM32F746_PE11_FUNC_EVENTOUT 0x4b10 | |
695 | #define STM32F746_PE11_FUNC_ANALOG 0x4b11 | |
696 | ||
697 | #define STM32F746_PE12_FUNC_GPIO 0x4c00 | |
698 | #define STM32F746_PE12_FUNC_TIM1_CH3N 0x4c02 | |
699 | #define STM32F746_PE12_FUNC_SPI4_SCK 0x4c06 | |
700 | #define STM32F746_PE12_FUNC_SAI2_SCK_B 0x4c0b | |
701 | #define STM32F746_PE12_FUNC_FMC_D9 0x4c0d | |
702 | #define STM32F746_PE12_FUNC_LCD_B4 0x4c0f | |
703 | #define STM32F746_PE12_FUNC_EVENTOUT 0x4c10 | |
704 | #define STM32F746_PE12_FUNC_ANALOG 0x4c11 | |
705 | ||
706 | #define STM32F746_PE13_FUNC_GPIO 0x4d00 | |
707 | #define STM32F746_PE13_FUNC_TIM1_CH3 0x4d02 | |
708 | #define STM32F746_PE13_FUNC_SPI4_MISO 0x4d06 | |
709 | #define STM32F746_PE13_FUNC_SAI2_FS_B 0x4d0b | |
710 | #define STM32F746_PE13_FUNC_FMC_D10 0x4d0d | |
711 | #define STM32F746_PE13_FUNC_LCD_DE 0x4d0f | |
712 | #define STM32F746_PE13_FUNC_EVENTOUT 0x4d10 | |
713 | #define STM32F746_PE13_FUNC_ANALOG 0x4d11 | |
714 | ||
715 | #define STM32F746_PE14_FUNC_GPIO 0x4e00 | |
716 | #define STM32F746_PE14_FUNC_TIM1_CH4 0x4e02 | |
717 | #define STM32F746_PE14_FUNC_SPI4_MOSI 0x4e06 | |
718 | #define STM32F746_PE14_FUNC_SAI2_MCLK_B 0x4e0b | |
719 | #define STM32F746_PE14_FUNC_FMC_D11 0x4e0d | |
720 | #define STM32F746_PE14_FUNC_LCD_CLK 0x4e0f | |
721 | #define STM32F746_PE14_FUNC_EVENTOUT 0x4e10 | |
722 | #define STM32F746_PE14_FUNC_ANALOG 0x4e11 | |
723 | ||
724 | #define STM32F746_PE15_FUNC_GPIO 0x4f00 | |
725 | #define STM32F746_PE15_FUNC_TIM1_BKIN 0x4f02 | |
726 | #define STM32F746_PE15_FUNC_FMC_D12 0x4f0d | |
727 | #define STM32F746_PE15_FUNC_LCD_R7 0x4f0f | |
728 | #define STM32F746_PE15_FUNC_EVENTOUT 0x4f10 | |
729 | #define STM32F746_PE15_FUNC_ANALOG 0x4f11 | |
730 | ||
731 | ||
732 | #define STM32F746_PF0_FUNC_GPIO 0x5000 | |
733 | #define STM32F746_PF0_FUNC_I2C2_SDA 0x5005 | |
734 | #define STM32F746_PF0_FUNC_FMC_A0 0x500d | |
735 | #define STM32F746_PF0_FUNC_EVENTOUT 0x5010 | |
736 | #define STM32F746_PF0_FUNC_ANALOG 0x5011 | |
737 | ||
738 | #define STM32F746_PF1_FUNC_GPIO 0x5100 | |
739 | #define STM32F746_PF1_FUNC_I2C2_SCL 0x5105 | |
740 | #define STM32F746_PF1_FUNC_FMC_A1 0x510d | |
741 | #define STM32F746_PF1_FUNC_EVENTOUT 0x5110 | |
742 | #define STM32F746_PF1_FUNC_ANALOG 0x5111 | |
743 | ||
744 | #define STM32F746_PF2_FUNC_GPIO 0x5200 | |
745 | #define STM32F746_PF2_FUNC_I2C2_SMBA 0x5205 | |
746 | #define STM32F746_PF2_FUNC_FMC_A2 0x520d | |
747 | #define STM32F746_PF2_FUNC_EVENTOUT 0x5210 | |
748 | #define STM32F746_PF2_FUNC_ANALOG 0x5211 | |
749 | ||
750 | #define STM32F746_PF3_FUNC_GPIO 0x5300 | |
751 | #define STM32F746_PF3_FUNC_FMC_A3 0x530d | |
752 | #define STM32F746_PF3_FUNC_EVENTOUT 0x5310 | |
753 | #define STM32F746_PF3_FUNC_ANALOG 0x5311 | |
754 | ||
755 | #define STM32F746_PF4_FUNC_GPIO 0x5400 | |
756 | #define STM32F746_PF4_FUNC_FMC_A4 0x540d | |
757 | #define STM32F746_PF4_FUNC_EVENTOUT 0x5410 | |
758 | #define STM32F746_PF4_FUNC_ANALOG 0x5411 | |
759 | ||
760 | #define STM32F746_PF5_FUNC_GPIO 0x5500 | |
761 | #define STM32F746_PF5_FUNC_FMC_A5 0x550d | |
762 | #define STM32F746_PF5_FUNC_EVENTOUT 0x5510 | |
763 | #define STM32F746_PF5_FUNC_ANALOG 0x5511 | |
764 | ||
765 | #define STM32F746_PF6_FUNC_GPIO 0x5600 | |
766 | #define STM32F746_PF6_FUNC_TIM10_CH1 0x5604 | |
767 | #define STM32F746_PF6_FUNC_SPI5_NSS 0x5606 | |
768 | #define STM32F746_PF6_FUNC_SAI1_SD_B 0x5607 | |
769 | #define STM32F746_PF6_FUNC_UART7_RX 0x5609 | |
770 | #define STM32F746_PF6_FUNC_QUADSPI_BK1_IO3 0x560a | |
771 | #define STM32F746_PF6_FUNC_EVENTOUT 0x5610 | |
772 | #define STM32F746_PF6_FUNC_ANALOG 0x5611 | |
773 | ||
774 | #define STM32F746_PF7_FUNC_GPIO 0x5700 | |
775 | #define STM32F746_PF7_FUNC_TIM11_CH1 0x5704 | |
776 | #define STM32F746_PF7_FUNC_SPI5_SCK 0x5706 | |
777 | #define STM32F746_PF7_FUNC_SAI1_MCLK_B 0x5707 | |
778 | #define STM32F746_PF7_FUNC_UART7_TX 0x5709 | |
779 | #define STM32F746_PF7_FUNC_QUADSPI_BK1_IO2 0x570a | |
780 | #define STM32F746_PF7_FUNC_EVENTOUT 0x5710 | |
781 | #define STM32F746_PF7_FUNC_ANALOG 0x5711 | |
782 | ||
783 | #define STM32F746_PF8_FUNC_GPIO 0x5800 | |
784 | #define STM32F746_PF8_FUNC_SPI5_MISO 0x5806 | |
785 | #define STM32F746_PF8_FUNC_SAI1_SCK_B 0x5807 | |
786 | #define STM32F746_PF8_FUNC_UART7_RTS 0x5809 | |
787 | #define STM32F746_PF8_FUNC_TIM13_CH1 0x580a | |
788 | #define STM32F746_PF8_FUNC_QUADSPI_BK1_IO0 0x580b | |
789 | #define STM32F746_PF8_FUNC_EVENTOUT 0x5810 | |
790 | #define STM32F746_PF8_FUNC_ANALOG 0x5811 | |
791 | ||
792 | #define STM32F746_PF9_FUNC_GPIO 0x5900 | |
793 | #define STM32F746_PF9_FUNC_SPI5_MOSI 0x5906 | |
794 | #define STM32F746_PF9_FUNC_SAI1_FS_B 0x5907 | |
795 | #define STM32F746_PF9_FUNC_UART7_CTS 0x5909 | |
796 | #define STM32F746_PF9_FUNC_TIM14_CH1 0x590a | |
797 | #define STM32F746_PF9_FUNC_QUADSPI_BK1_IO1 0x590b | |
798 | #define STM32F746_PF9_FUNC_EVENTOUT 0x5910 | |
799 | #define STM32F746_PF9_FUNC_ANALOG 0x5911 | |
800 | ||
801 | #define STM32F746_PF10_FUNC_GPIO 0x5a00 | |
802 | #define STM32F746_PF10_FUNC_DCMI_D11 0x5a0e | |
803 | #define STM32F746_PF10_FUNC_LCD_DE 0x5a0f | |
804 | #define STM32F746_PF10_FUNC_EVENTOUT 0x5a10 | |
805 | #define STM32F746_PF10_FUNC_ANALOG 0x5a11 | |
806 | ||
807 | #define STM32F746_PF11_FUNC_GPIO 0x5b00 | |
808 | #define STM32F746_PF11_FUNC_SPI5_MOSI 0x5b06 | |
809 | #define STM32F746_PF11_FUNC_SAI2_SD_B 0x5b0b | |
810 | #define STM32F746_PF11_FUNC_FMC_SDNRAS 0x5b0d | |
811 | #define STM32F746_PF11_FUNC_DCMI_D12 0x5b0e | |
812 | #define STM32F746_PF11_FUNC_EVENTOUT 0x5b10 | |
813 | #define STM32F746_PF11_FUNC_ANALOG 0x5b11 | |
814 | ||
815 | #define STM32F746_PF12_FUNC_GPIO 0x5c00 | |
816 | #define STM32F746_PF12_FUNC_FMC_A6 0x5c0d | |
817 | #define STM32F746_PF12_FUNC_EVENTOUT 0x5c10 | |
818 | #define STM32F746_PF12_FUNC_ANALOG 0x5c11 | |
819 | ||
820 | #define STM32F746_PF13_FUNC_GPIO 0x5d00 | |
821 | #define STM32F746_PF13_FUNC_I2C4_SMBA 0x5d05 | |
822 | #define STM32F746_PF13_FUNC_FMC_A7 0x5d0d | |
823 | #define STM32F746_PF13_FUNC_EVENTOUT 0x5d10 | |
824 | #define STM32F746_PF13_FUNC_ANALOG 0x5d11 | |
825 | ||
826 | #define STM32F746_PF14_FUNC_GPIO 0x5e00 | |
827 | #define STM32F746_PF14_FUNC_I2C4_SCL 0x5e05 | |
828 | #define STM32F746_PF14_FUNC_FMC_A8 0x5e0d | |
829 | #define STM32F746_PF14_FUNC_EVENTOUT 0x5e10 | |
830 | #define STM32F746_PF14_FUNC_ANALOG 0x5e11 | |
831 | ||
832 | #define STM32F746_PF15_FUNC_GPIO 0x5f00 | |
833 | #define STM32F746_PF15_FUNC_I2C4_SDA 0x5f05 | |
834 | #define STM32F746_PF15_FUNC_FMC_A9 0x5f0d | |
835 | #define STM32F746_PF15_FUNC_EVENTOUT 0x5f10 | |
836 | #define STM32F746_PF15_FUNC_ANALOG 0x5f11 | |
837 | ||
838 | ||
839 | #define STM32F746_PG0_FUNC_GPIO 0x6000 | |
840 | #define STM32F746_PG0_FUNC_FMC_A10 0x600d | |
841 | #define STM32F746_PG0_FUNC_EVENTOUT 0x6010 | |
842 | #define STM32F746_PG0_FUNC_ANALOG 0x6011 | |
843 | ||
844 | #define STM32F746_PG1_FUNC_GPIO 0x6100 | |
845 | #define STM32F746_PG1_FUNC_FMC_A11 0x610d | |
846 | #define STM32F746_PG1_FUNC_EVENTOUT 0x6110 | |
847 | #define STM32F746_PG1_FUNC_ANALOG 0x6111 | |
848 | ||
849 | #define STM32F746_PG2_FUNC_GPIO 0x6200 | |
850 | #define STM32F746_PG2_FUNC_FMC_A12 0x620d | |
851 | #define STM32F746_PG2_FUNC_EVENTOUT 0x6210 | |
852 | #define STM32F746_PG2_FUNC_ANALOG 0x6211 | |
853 | ||
854 | #define STM32F746_PG3_FUNC_GPIO 0x6300 | |
855 | #define STM32F746_PG3_FUNC_FMC_A13 0x630d | |
856 | #define STM32F746_PG3_FUNC_EVENTOUT 0x6310 | |
857 | #define STM32F746_PG3_FUNC_ANALOG 0x6311 | |
858 | ||
859 | #define STM32F746_PG4_FUNC_GPIO 0x6400 | |
860 | #define STM32F746_PG4_FUNC_FMC_A14_FMC_BA0 0x640d | |
861 | #define STM32F746_PG4_FUNC_EVENTOUT 0x6410 | |
862 | #define STM32F746_PG4_FUNC_ANALOG 0x6411 | |
863 | ||
864 | #define STM32F746_PG5_FUNC_GPIO 0x6500 | |
865 | #define STM32F746_PG5_FUNC_FMC_A15_FMC_BA1 0x650d | |
866 | #define STM32F746_PG5_FUNC_EVENTOUT 0x6510 | |
867 | #define STM32F746_PG5_FUNC_ANALOG 0x6511 | |
868 | ||
869 | #define STM32F746_PG6_FUNC_GPIO 0x6600 | |
870 | #define STM32F746_PG6_FUNC_DCMI_D12 0x660e | |
871 | #define STM32F746_PG6_FUNC_LCD_R7 0x660f | |
872 | #define STM32F746_PG6_FUNC_EVENTOUT 0x6610 | |
873 | #define STM32F746_PG6_FUNC_ANALOG 0x6611 | |
874 | ||
875 | #define STM32F746_PG7_FUNC_GPIO 0x6700 | |
876 | #define STM32F746_PG7_FUNC_USART6_CK 0x6709 | |
877 | #define STM32F746_PG7_FUNC_FMC_INT 0x670d | |
878 | #define STM32F746_PG7_FUNC_DCMI_D13 0x670e | |
879 | #define STM32F746_PG7_FUNC_LCD_CLK 0x670f | |
880 | #define STM32F746_PG7_FUNC_EVENTOUT 0x6710 | |
881 | #define STM32F746_PG7_FUNC_ANALOG 0x6711 | |
882 | ||
883 | #define STM32F746_PG8_FUNC_GPIO 0x6800 | |
884 | #define STM32F746_PG8_FUNC_SPI6_NSS 0x6806 | |
885 | #define STM32F746_PG8_FUNC_SPDIFRX_IN2 0x6808 | |
886 | #define STM32F746_PG8_FUNC_USART6_RTS 0x6809 | |
887 | #define STM32F746_PG8_FUNC_ETH_PPS_OUT 0x680c | |
888 | #define STM32F746_PG8_FUNC_FMC_SDCLK 0x680d | |
889 | #define STM32F746_PG8_FUNC_EVENTOUT 0x6810 | |
890 | #define STM32F746_PG8_FUNC_ANALOG 0x6811 | |
891 | ||
892 | #define STM32F746_PG9_FUNC_GPIO 0x6900 | |
893 | #define STM32F746_PG9_FUNC_SPDIFRX_IN3 0x6908 | |
894 | #define STM32F746_PG9_FUNC_USART6_RX 0x6909 | |
895 | #define STM32F746_PG9_FUNC_QUADSPI_BK2_IO2 0x690a | |
896 | #define STM32F746_PG9_FUNC_SAI2_FS_B 0x690b | |
897 | #define STM32F746_PG9_FUNC_FMC_NE2_FMC_NCE 0x690d | |
898 | #define STM32F746_PG9_FUNC_DCMI_VSYNC 0x690e | |
899 | #define STM32F746_PG9_FUNC_EVENTOUT 0x6910 | |
900 | #define STM32F746_PG9_FUNC_ANALOG 0x6911 | |
901 | ||
902 | #define STM32F746_PG10_FUNC_GPIO 0x6a00 | |
903 | #define STM32F746_PG10_FUNC_LCD_G3 0x6a0a | |
904 | #define STM32F746_PG10_FUNC_SAI2_SD_B 0x6a0b | |
905 | #define STM32F746_PG10_FUNC_FMC_NE3 0x6a0d | |
906 | #define STM32F746_PG10_FUNC_DCMI_D2 0x6a0e | |
907 | #define STM32F746_PG10_FUNC_LCD_B2 0x6a0f | |
908 | #define STM32F746_PG10_FUNC_EVENTOUT 0x6a10 | |
909 | #define STM32F746_PG10_FUNC_ANALOG 0x6a11 | |
910 | ||
911 | #define STM32F746_PG11_FUNC_GPIO 0x6b00 | |
912 | #define STM32F746_PG11_FUNC_SPDIFRX_IN0 0x6b08 | |
913 | #define STM32F746_PG11_FUNC_ETH_MII_TX_EN_ETH_RMII_TX_EN 0x6b0c | |
914 | #define STM32F746_PG11_FUNC_DCMI_D3 0x6b0e | |
915 | #define STM32F746_PG11_FUNC_LCD_B3 0x6b0f | |
916 | #define STM32F746_PG11_FUNC_EVENTOUT 0x6b10 | |
917 | #define STM32F746_PG11_FUNC_ANALOG 0x6b11 | |
918 | ||
919 | #define STM32F746_PG12_FUNC_GPIO 0x6c00 | |
920 | #define STM32F746_PG12_FUNC_LPTIM1_IN1 0x6c04 | |
921 | #define STM32F746_PG12_FUNC_SPI6_MISO 0x6c06 | |
922 | #define STM32F746_PG12_FUNC_SPDIFRX_IN1 0x6c08 | |
923 | #define STM32F746_PG12_FUNC_USART6_RTS 0x6c09 | |
924 | #define STM32F746_PG12_FUNC_LCD_B4 0x6c0a | |
925 | #define STM32F746_PG12_FUNC_FMC_NE4 0x6c0d | |
926 | #define STM32F746_PG12_FUNC_LCD_B1 0x6c0f | |
927 | #define STM32F746_PG12_FUNC_EVENTOUT 0x6c10 | |
928 | #define STM32F746_PG12_FUNC_ANALOG 0x6c11 | |
929 | ||
930 | #define STM32F746_PG13_FUNC_GPIO 0x6d00 | |
931 | #define STM32F746_PG13_FUNC_TRACED0 0x6d01 | |
932 | #define STM32F746_PG13_FUNC_LPTIM1_OUT 0x6d04 | |
933 | #define STM32F746_PG13_FUNC_SPI6_SCK 0x6d06 | |
934 | #define STM32F746_PG13_FUNC_USART6_CTS 0x6d09 | |
935 | #define STM32F746_PG13_FUNC_ETH_MII_TXD0_ETH_RMII_TXD0 0x6d0c | |
936 | #define STM32F746_PG13_FUNC_FMC_A24 0x6d0d | |
937 | #define STM32F746_PG13_FUNC_LCD_R0 0x6d0f | |
938 | #define STM32F746_PG13_FUNC_EVENTOUT 0x6d10 | |
939 | #define STM32F746_PG13_FUNC_ANALOG 0x6d11 | |
940 | ||
941 | #define STM32F746_PG14_FUNC_GPIO 0x6e00 | |
942 | #define STM32F746_PG14_FUNC_TRACED1 0x6e01 | |
943 | #define STM32F746_PG14_FUNC_LPTIM1_ETR 0x6e04 | |
944 | #define STM32F746_PG14_FUNC_SPI6_MOSI 0x6e06 | |
945 | #define STM32F746_PG14_FUNC_USART6_TX 0x6e09 | |
946 | #define STM32F746_PG14_FUNC_QUADSPI_BK2_IO3 0x6e0a | |
947 | #define STM32F746_PG14_FUNC_ETH_MII_TXD1_ETH_RMII_TXD1 0x6e0c | |
948 | #define STM32F746_PG14_FUNC_FMC_A25 0x6e0d | |
949 | #define STM32F746_PG14_FUNC_LCD_B0 0x6e0f | |
950 | #define STM32F746_PG14_FUNC_EVENTOUT 0x6e10 | |
951 | #define STM32F746_PG14_FUNC_ANALOG 0x6e11 | |
952 | ||
953 | #define STM32F746_PG15_FUNC_GPIO 0x6f00 | |
954 | #define STM32F746_PG15_FUNC_USART6_CTS 0x6f09 | |
955 | #define STM32F746_PG15_FUNC_FMC_SDNCAS 0x6f0d | |
956 | #define STM32F746_PG15_FUNC_DCMI_D13 0x6f0e | |
957 | #define STM32F746_PG15_FUNC_EVENTOUT 0x6f10 | |
958 | #define STM32F746_PG15_FUNC_ANALOG 0x6f11 | |
959 | ||
960 | ||
961 | #define STM32F746_PH0_FUNC_GPIO 0x7000 | |
962 | #define STM32F746_PH0_FUNC_EVENTOUT 0x7010 | |
963 | #define STM32F746_PH0_FUNC_ANALOG 0x7011 | |
964 | ||
965 | #define STM32F746_PH1_FUNC_GPIO 0x7100 | |
966 | #define STM32F746_PH1_FUNC_EVENTOUT 0x7110 | |
967 | #define STM32F746_PH1_FUNC_ANALOG 0x7111 | |
968 | ||
969 | #define STM32F746_PH2_FUNC_GPIO 0x7200 | |
970 | #define STM32F746_PH2_FUNC_LPTIM1_IN2 0x7204 | |
971 | #define STM32F746_PH2_FUNC_QUADSPI_BK2_IO0 0x720a | |
972 | #define STM32F746_PH2_FUNC_SAI2_SCK_B 0x720b | |
973 | #define STM32F746_PH2_FUNC_ETH_MII_CRS 0x720c | |
974 | #define STM32F746_PH2_FUNC_FMC_SDCKE0 0x720d | |
975 | #define STM32F746_PH2_FUNC_LCD_R0 0x720f | |
976 | #define STM32F746_PH2_FUNC_EVENTOUT 0x7210 | |
977 | #define STM32F746_PH2_FUNC_ANALOG 0x7211 | |
978 | ||
979 | #define STM32F746_PH3_FUNC_GPIO 0x7300 | |
980 | #define STM32F746_PH3_FUNC_QUADSPI_BK2_IO1 0x730a | |
981 | #define STM32F746_PH3_FUNC_SAI2_MCLK_B 0x730b | |
982 | #define STM32F746_PH3_FUNC_ETH_MII_COL 0x730c | |
983 | #define STM32F746_PH3_FUNC_FMC_SDNE0 0x730d | |
984 | #define STM32F746_PH3_FUNC_LCD_R1 0x730f | |
985 | #define STM32F746_PH3_FUNC_EVENTOUT 0x7310 | |
986 | #define STM32F746_PH3_FUNC_ANALOG 0x7311 | |
987 | ||
988 | #define STM32F746_PH4_FUNC_GPIO 0x7400 | |
989 | #define STM32F746_PH4_FUNC_I2C2_SCL 0x7405 | |
990 | #define STM32F746_PH4_FUNC_OTG_HS_ULPI_NXT 0x740b | |
991 | #define STM32F746_PH4_FUNC_EVENTOUT 0x7410 | |
992 | #define STM32F746_PH4_FUNC_ANALOG 0x7411 | |
993 | ||
994 | #define STM32F746_PH5_FUNC_GPIO 0x7500 | |
995 | #define STM32F746_PH5_FUNC_I2C2_SDA 0x7505 | |
996 | #define STM32F746_PH5_FUNC_SPI5_NSS 0x7506 | |
997 | #define STM32F746_PH5_FUNC_FMC_SDNWE 0x750d | |
998 | #define STM32F746_PH5_FUNC_EVENTOUT 0x7510 | |
999 | #define STM32F746_PH5_FUNC_ANALOG 0x7511 | |
1000 | ||
1001 | #define STM32F746_PH6_FUNC_GPIO 0x7600 | |
1002 | #define STM32F746_PH6_FUNC_I2C2_SMBA 0x7605 | |
1003 | #define STM32F746_PH6_FUNC_SPI5_SCK 0x7606 | |
1004 | #define STM32F746_PH6_FUNC_TIM12_CH1 0x760a | |
1005 | #define STM32F746_PH6_FUNC_ETH_MII_RXD2 0x760c | |
1006 | #define STM32F746_PH6_FUNC_FMC_SDNE1 0x760d | |
1007 | #define STM32F746_PH6_FUNC_DCMI_D8 0x760e | |
1008 | #define STM32F746_PH6_FUNC_EVENTOUT 0x7610 | |
1009 | #define STM32F746_PH6_FUNC_ANALOG 0x7611 | |
1010 | ||
1011 | #define STM32F746_PH7_FUNC_GPIO 0x7700 | |
1012 | #define STM32F746_PH7_FUNC_I2C3_SCL 0x7705 | |
1013 | #define STM32F746_PH7_FUNC_SPI5_MISO 0x7706 | |
1014 | #define STM32F746_PH7_FUNC_ETH_MII_RXD3 0x770c | |
1015 | #define STM32F746_PH7_FUNC_FMC_SDCKE1 0x770d | |
1016 | #define STM32F746_PH7_FUNC_DCMI_D9 0x770e | |
1017 | #define STM32F746_PH7_FUNC_EVENTOUT 0x7710 | |
1018 | #define STM32F746_PH7_FUNC_ANALOG 0x7711 | |
1019 | ||
1020 | #define STM32F746_PH8_FUNC_GPIO 0x7800 | |
1021 | #define STM32F746_PH8_FUNC_I2C3_SDA 0x7805 | |
1022 | #define STM32F746_PH8_FUNC_FMC_D16 0x780d | |
1023 | #define STM32F746_PH8_FUNC_DCMI_HSYNC 0x780e | |
1024 | #define STM32F746_PH8_FUNC_LCD_R2 0x780f | |
1025 | #define STM32F746_PH8_FUNC_EVENTOUT 0x7810 | |
1026 | #define STM32F746_PH8_FUNC_ANALOG 0x7811 | |
1027 | ||
1028 | #define STM32F746_PH9_FUNC_GPIO 0x7900 | |
1029 | #define STM32F746_PH9_FUNC_I2C3_SMBA 0x7905 | |
1030 | #define STM32F746_PH9_FUNC_TIM12_CH2 0x790a | |
1031 | #define STM32F746_PH9_FUNC_FMC_D17 0x790d | |
1032 | #define STM32F746_PH9_FUNC_DCMI_D0 0x790e | |
1033 | #define STM32F746_PH9_FUNC_LCD_R3 0x790f | |
1034 | #define STM32F746_PH9_FUNC_EVENTOUT 0x7910 | |
1035 | #define STM32F746_PH9_FUNC_ANALOG 0x7911 | |
1036 | ||
1037 | #define STM32F746_PH10_FUNC_GPIO 0x7a00 | |
1038 | #define STM32F746_PH10_FUNC_TIM5_CH1 0x7a03 | |
1039 | #define STM32F746_PH10_FUNC_I2C4_SMBA 0x7a05 | |
1040 | #define STM32F746_PH10_FUNC_FMC_D18 0x7a0d | |
1041 | #define STM32F746_PH10_FUNC_DCMI_D1 0x7a0e | |
1042 | #define STM32F746_PH10_FUNC_LCD_R4 0x7a0f | |
1043 | #define STM32F746_PH10_FUNC_EVENTOUT 0x7a10 | |
1044 | #define STM32F746_PH10_FUNC_ANALOG 0x7a11 | |
1045 | ||
1046 | #define STM32F746_PH11_FUNC_GPIO 0x7b00 | |
1047 | #define STM32F746_PH11_FUNC_TIM5_CH2 0x7b03 | |
1048 | #define STM32F746_PH11_FUNC_I2C4_SCL 0x7b05 | |
1049 | #define STM32F746_PH11_FUNC_FMC_D19 0x7b0d | |
1050 | #define STM32F746_PH11_FUNC_DCMI_D2 0x7b0e | |
1051 | #define STM32F746_PH11_FUNC_LCD_R5 0x7b0f | |
1052 | #define STM32F746_PH11_FUNC_EVENTOUT 0x7b10 | |
1053 | #define STM32F746_PH11_FUNC_ANALOG 0x7b11 | |
1054 | ||
1055 | #define STM32F746_PH12_FUNC_GPIO 0x7c00 | |
1056 | #define STM32F746_PH12_FUNC_TIM5_CH3 0x7c03 | |
1057 | #define STM32F746_PH12_FUNC_I2C4_SDA 0x7c05 | |
1058 | #define STM32F746_PH12_FUNC_FMC_D20 0x7c0d | |
1059 | #define STM32F746_PH12_FUNC_DCMI_D3 0x7c0e | |
1060 | #define STM32F746_PH12_FUNC_LCD_R6 0x7c0f | |
1061 | #define STM32F746_PH12_FUNC_EVENTOUT 0x7c10 | |
1062 | #define STM32F746_PH12_FUNC_ANALOG 0x7c11 | |
1063 | ||
1064 | #define STM32F746_PH13_FUNC_GPIO 0x7d00 | |
1065 | #define STM32F746_PH13_FUNC_TIM8_CH1N 0x7d04 | |
1066 | #define STM32F746_PH13_FUNC_CAN1_TX 0x7d0a | |
1067 | #define STM32F746_PH13_FUNC_FMC_D21 0x7d0d | |
1068 | #define STM32F746_PH13_FUNC_LCD_G2 0x7d0f | |
1069 | #define STM32F746_PH13_FUNC_EVENTOUT 0x7d10 | |
1070 | #define STM32F746_PH13_FUNC_ANALOG 0x7d11 | |
1071 | ||
1072 | #define STM32F746_PH14_FUNC_GPIO 0x7e00 | |
1073 | #define STM32F746_PH14_FUNC_TIM8_CH2N 0x7e04 | |
1074 | #define STM32F746_PH14_FUNC_FMC_D22 0x7e0d | |
1075 | #define STM32F746_PH14_FUNC_DCMI_D4 0x7e0e | |
1076 | #define STM32F746_PH14_FUNC_LCD_G3 0x7e0f | |
1077 | #define STM32F746_PH14_FUNC_EVENTOUT 0x7e10 | |
1078 | #define STM32F746_PH14_FUNC_ANALOG 0x7e11 | |
1079 | ||
1080 | #define STM32F746_PH15_FUNC_GPIO 0x7f00 | |
1081 | #define STM32F746_PH15_FUNC_TIM8_CH3N 0x7f04 | |
1082 | #define STM32F746_PH15_FUNC_FMC_D23 0x7f0d | |
1083 | #define STM32F746_PH15_FUNC_DCMI_D11 0x7f0e | |
1084 | #define STM32F746_PH15_FUNC_LCD_G4 0x7f0f | |
1085 | #define STM32F746_PH15_FUNC_EVENTOUT 0x7f10 | |
1086 | #define STM32F746_PH15_FUNC_ANALOG 0x7f11 | |
1087 | ||
1088 | ||
1089 | #define STM32F746_PI0_FUNC_GPIO 0x8000 | |
1090 | #define STM32F746_PI0_FUNC_TIM5_CH4 0x8003 | |
1091 | #define STM32F746_PI0_FUNC_SPI2_NSS_I2S2_WS 0x8006 | |
1092 | #define STM32F746_PI0_FUNC_FMC_D24 0x800d | |
1093 | #define STM32F746_PI0_FUNC_DCMI_D13 0x800e | |
1094 | #define STM32F746_PI0_FUNC_LCD_G5 0x800f | |
1095 | #define STM32F746_PI0_FUNC_EVENTOUT 0x8010 | |
1096 | #define STM32F746_PI0_FUNC_ANALOG 0x8011 | |
1097 | ||
1098 | #define STM32F746_PI1_FUNC_GPIO 0x8100 | |
1099 | #define STM32F746_PI1_FUNC_TIM8_BKIN2 0x8104 | |
1100 | #define STM32F746_PI1_FUNC_SPI2_SCK_I2S2_CK 0x8106 | |
1101 | #define STM32F746_PI1_FUNC_FMC_D25 0x810d | |
1102 | #define STM32F746_PI1_FUNC_DCMI_D8 0x810e | |
1103 | #define STM32F746_PI1_FUNC_LCD_G6 0x810f | |
1104 | #define STM32F746_PI1_FUNC_EVENTOUT 0x8110 | |
1105 | #define STM32F746_PI1_FUNC_ANALOG 0x8111 | |
1106 | ||
1107 | #define STM32F746_PI2_FUNC_GPIO 0x8200 | |
1108 | #define STM32F746_PI2_FUNC_TIM8_CH4 0x8204 | |
1109 | #define STM32F746_PI2_FUNC_SPI2_MISO 0x8206 | |
1110 | #define STM32F746_PI2_FUNC_FMC_D26 0x820d | |
1111 | #define STM32F746_PI2_FUNC_DCMI_D9 0x820e | |
1112 | #define STM32F746_PI2_FUNC_LCD_G7 0x820f | |
1113 | #define STM32F746_PI2_FUNC_EVENTOUT 0x8210 | |
1114 | #define STM32F746_PI2_FUNC_ANALOG 0x8211 | |
1115 | ||
1116 | #define STM32F746_PI3_FUNC_GPIO 0x8300 | |
1117 | #define STM32F746_PI3_FUNC_TIM8_ETR 0x8304 | |
1118 | #define STM32F746_PI3_FUNC_SPI2_MOSI_I2S2_SD 0x8306 | |
1119 | #define STM32F746_PI3_FUNC_FMC_D27 0x830d | |
1120 | #define STM32F746_PI3_FUNC_DCMI_D10 0x830e | |
1121 | #define STM32F746_PI3_FUNC_EVENTOUT 0x8310 | |
1122 | #define STM32F746_PI3_FUNC_ANALOG 0x8311 | |
1123 | ||
1124 | #define STM32F746_PI4_FUNC_GPIO 0x8400 | |
1125 | #define STM32F746_PI4_FUNC_TIM8_BKIN 0x8404 | |
1126 | #define STM32F746_PI4_FUNC_SAI2_MCLK_A 0x840b | |
1127 | #define STM32F746_PI4_FUNC_FMC_NBL2 0x840d | |
1128 | #define STM32F746_PI4_FUNC_DCMI_D5 0x840e | |
1129 | #define STM32F746_PI4_FUNC_LCD_B4 0x840f | |
1130 | #define STM32F746_PI4_FUNC_EVENTOUT 0x8410 | |
1131 | #define STM32F746_PI4_FUNC_ANALOG 0x8411 | |
1132 | ||
1133 | #define STM32F746_PI5_FUNC_GPIO 0x8500 | |
1134 | #define STM32F746_PI5_FUNC_TIM8_CH1 0x8504 | |
1135 | #define STM32F746_PI5_FUNC_SAI2_SCK_A 0x850b | |
1136 | #define STM32F746_PI5_FUNC_FMC_NBL3 0x850d | |
1137 | #define STM32F746_PI5_FUNC_DCMI_VSYNC 0x850e | |
1138 | #define STM32F746_PI5_FUNC_LCD_B5 0x850f | |
1139 | #define STM32F746_PI5_FUNC_EVENTOUT 0x8510 | |
1140 | #define STM32F746_PI5_FUNC_ANALOG 0x8511 | |
1141 | ||
1142 | #define STM32F746_PI6_FUNC_GPIO 0x8600 | |
1143 | #define STM32F746_PI6_FUNC_TIM8_CH2 0x8604 | |
1144 | #define STM32F746_PI6_FUNC_SAI2_SD_A 0x860b | |
1145 | #define STM32F746_PI6_FUNC_FMC_D28 0x860d | |
1146 | #define STM32F746_PI6_FUNC_DCMI_D6 0x860e | |
1147 | #define STM32F746_PI6_FUNC_LCD_B6 0x860f | |
1148 | #define STM32F746_PI6_FUNC_EVENTOUT 0x8610 | |
1149 | #define STM32F746_PI6_FUNC_ANALOG 0x8611 | |
1150 | ||
1151 | #define STM32F746_PI7_FUNC_GPIO 0x8700 | |
1152 | #define STM32F746_PI7_FUNC_TIM8_CH3 0x8704 | |
1153 | #define STM32F746_PI7_FUNC_SAI2_FS_A 0x870b | |
1154 | #define STM32F746_PI7_FUNC_FMC_D29 0x870d | |
1155 | #define STM32F746_PI7_FUNC_DCMI_D7 0x870e | |
1156 | #define STM32F746_PI7_FUNC_LCD_B7 0x870f | |
1157 | #define STM32F746_PI7_FUNC_EVENTOUT 0x8710 | |
1158 | #define STM32F746_PI7_FUNC_ANALOG 0x8711 | |
1159 | ||
1160 | #define STM32F746_PI8_FUNC_GPIO 0x8800 | |
1161 | #define STM32F746_PI8_FUNC_EVENTOUT 0x8810 | |
1162 | #define STM32F746_PI8_FUNC_ANALOG 0x8811 | |
1163 | ||
1164 | #define STM32F746_PI9_FUNC_GPIO 0x8900 | |
1165 | #define STM32F746_PI9_FUNC_CAN1_RX 0x890a | |
1166 | #define STM32F746_PI9_FUNC_FMC_D30 0x890d | |
1167 | #define STM32F746_PI9_FUNC_LCD_VSYNC 0x890f | |
1168 | #define STM32F746_PI9_FUNC_EVENTOUT 0x8910 | |
1169 | #define STM32F746_PI9_FUNC_ANALOG 0x8911 | |
1170 | ||
1171 | #define STM32F746_PI10_FUNC_GPIO 0x8a00 | |
1172 | #define STM32F746_PI10_FUNC_ETH_MII_RX_ER 0x8a0c | |
1173 | #define STM32F746_PI10_FUNC_FMC_D31 0x8a0d | |
1174 | #define STM32F746_PI10_FUNC_LCD_HSYNC 0x8a0f | |
1175 | #define STM32F746_PI10_FUNC_EVENTOUT 0x8a10 | |
1176 | #define STM32F746_PI10_FUNC_ANALOG 0x8a11 | |
1177 | ||
1178 | #define STM32F746_PI11_FUNC_GPIO 0x8b00 | |
1179 | #define STM32F746_PI11_FUNC_OTG_HS_ULPI_DIR 0x8b0b | |
1180 | #define STM32F746_PI11_FUNC_EVENTOUT 0x8b10 | |
1181 | #define STM32F746_PI11_FUNC_ANALOG 0x8b11 | |
1182 | ||
1183 | #define STM32F746_PI12_FUNC_GPIO 0x8c00 | |
1184 | #define STM32F746_PI12_FUNC_LCD_HSYNC 0x8c0f | |
1185 | #define STM32F746_PI12_FUNC_EVENTOUT 0x8c10 | |
1186 | #define STM32F746_PI12_FUNC_ANALOG 0x8c11 | |
1187 | ||
1188 | #define STM32F746_PI13_FUNC_GPIO 0x8d00 | |
1189 | #define STM32F746_PI13_FUNC_LCD_VSYNC 0x8d0f | |
1190 | #define STM32F746_PI13_FUNC_EVENTOUT 0x8d10 | |
1191 | #define STM32F746_PI13_FUNC_ANALOG 0x8d11 | |
1192 | ||
1193 | #define STM32F746_PI14_FUNC_GPIO 0x8e00 | |
1194 | #define STM32F746_PI14_FUNC_LCD_CLK 0x8e0f | |
1195 | #define STM32F746_PI14_FUNC_EVENTOUT 0x8e10 | |
1196 | #define STM32F746_PI14_FUNC_ANALOG 0x8e11 | |
1197 | ||
1198 | #define STM32F746_PI15_FUNC_GPIO 0x8f00 | |
1199 | #define STM32F746_PI15_FUNC_LCD_R0 0x8f0f | |
1200 | #define STM32F746_PI15_FUNC_EVENTOUT 0x8f10 | |
1201 | #define STM32F746_PI15_FUNC_ANALOG 0x8f11 | |
1202 | ||
1203 | ||
1204 | #define STM32F746_PJ0_FUNC_GPIO 0x9000 | |
1205 | #define STM32F746_PJ0_FUNC_LCD_R1 0x900f | |
1206 | #define STM32F746_PJ0_FUNC_EVENTOUT 0x9010 | |
1207 | #define STM32F746_PJ0_FUNC_ANALOG 0x9011 | |
1208 | ||
1209 | #define STM32F746_PJ1_FUNC_GPIO 0x9100 | |
1210 | #define STM32F746_PJ1_FUNC_LCD_R2 0x910f | |
1211 | #define STM32F746_PJ1_FUNC_EVENTOUT 0x9110 | |
1212 | #define STM32F746_PJ1_FUNC_ANALOG 0x9111 | |
1213 | ||
1214 | #define STM32F746_PJ2_FUNC_GPIO 0x9200 | |
1215 | #define STM32F746_PJ2_FUNC_LCD_R3 0x920f | |
1216 | #define STM32F746_PJ2_FUNC_EVENTOUT 0x9210 | |
1217 | #define STM32F746_PJ2_FUNC_ANALOG 0x9211 | |
1218 | ||
1219 | #define STM32F746_PJ3_FUNC_GPIO 0x9300 | |
1220 | #define STM32F746_PJ3_FUNC_LCD_R4 0x930f | |
1221 | #define STM32F746_PJ3_FUNC_EVENTOUT 0x9310 | |
1222 | #define STM32F746_PJ3_FUNC_ANALOG 0x9311 | |
1223 | ||
1224 | #define STM32F746_PJ4_FUNC_GPIO 0x9400 | |
1225 | #define STM32F746_PJ4_FUNC_LCD_R5 0x940f | |
1226 | #define STM32F746_PJ4_FUNC_EVENTOUT 0x9410 | |
1227 | #define STM32F746_PJ4_FUNC_ANALOG 0x9411 | |
1228 | ||
1229 | #define STM32F746_PJ5_FUNC_GPIO 0x9500 | |
1230 | #define STM32F746_PJ5_FUNC_LCD_R6 0x950f | |
1231 | #define STM32F746_PJ5_FUNC_EVENTOUT 0x9510 | |
1232 | #define STM32F746_PJ5_FUNC_ANALOG 0x9511 | |
1233 | ||
1234 | #define STM32F746_PJ6_FUNC_GPIO 0x9600 | |
1235 | #define STM32F746_PJ6_FUNC_LCD_R7 0x960f | |
1236 | #define STM32F746_PJ6_FUNC_EVENTOUT 0x9610 | |
1237 | #define STM32F746_PJ6_FUNC_ANALOG 0x9611 | |
1238 | ||
1239 | #define STM32F746_PJ7_FUNC_GPIO 0x9700 | |
1240 | #define STM32F746_PJ7_FUNC_LCD_G0 0x970f | |
1241 | #define STM32F746_PJ7_FUNC_EVENTOUT 0x9710 | |
1242 | #define STM32F746_PJ7_FUNC_ANALOG 0x9711 | |
1243 | ||
1244 | #define STM32F746_PJ8_FUNC_GPIO 0x9800 | |
1245 | #define STM32F746_PJ8_FUNC_LCD_G1 0x980f | |
1246 | #define STM32F746_PJ8_FUNC_EVENTOUT 0x9810 | |
1247 | #define STM32F746_PJ8_FUNC_ANALOG 0x9811 | |
1248 | ||
1249 | #define STM32F746_PJ9_FUNC_GPIO 0x9900 | |
1250 | #define STM32F746_PJ9_FUNC_LCD_G2 0x990f | |
1251 | #define STM32F746_PJ9_FUNC_EVENTOUT 0x9910 | |
1252 | #define STM32F746_PJ9_FUNC_ANALOG 0x9911 | |
1253 | ||
1254 | #define STM32F746_PJ10_FUNC_GPIO 0x9a00 | |
1255 | #define STM32F746_PJ10_FUNC_LCD_G3 0x9a0f | |
1256 | #define STM32F746_PJ10_FUNC_EVENTOUT 0x9a10 | |
1257 | #define STM32F746_PJ10_FUNC_ANALOG 0x9a11 | |
1258 | ||
1259 | #define STM32F746_PJ11_FUNC_GPIO 0x9b00 | |
1260 | #define STM32F746_PJ11_FUNC_LCD_G4 0x9b0f | |
1261 | #define STM32F746_PJ11_FUNC_EVENTOUT 0x9b10 | |
1262 | #define STM32F746_PJ11_FUNC_ANALOG 0x9b11 | |
1263 | ||
1264 | #define STM32F746_PJ12_FUNC_GPIO 0x9c00 | |
1265 | #define STM32F746_PJ12_FUNC_LCD_B0 0x9c0f | |
1266 | #define STM32F746_PJ12_FUNC_EVENTOUT 0x9c10 | |
1267 | #define STM32F746_PJ12_FUNC_ANALOG 0x9c11 | |
1268 | ||
1269 | #define STM32F746_PJ13_FUNC_GPIO 0x9d00 | |
1270 | #define STM32F746_PJ13_FUNC_LCD_B1 0x9d0f | |
1271 | #define STM32F746_PJ13_FUNC_EVENTOUT 0x9d10 | |
1272 | #define STM32F746_PJ13_FUNC_ANALOG 0x9d11 | |
1273 | ||
1274 | #define STM32F746_PJ14_FUNC_GPIO 0x9e00 | |
1275 | #define STM32F746_PJ14_FUNC_LCD_B2 0x9e0f | |
1276 | #define STM32F746_PJ14_FUNC_EVENTOUT 0x9e10 | |
1277 | #define STM32F746_PJ14_FUNC_ANALOG 0x9e11 | |
1278 | ||
1279 | #define STM32F746_PJ15_FUNC_GPIO 0x9f00 | |
1280 | #define STM32F746_PJ15_FUNC_LCD_B3 0x9f0f | |
1281 | #define STM32F746_PJ15_FUNC_EVENTOUT 0x9f10 | |
1282 | #define STM32F746_PJ15_FUNC_ANALOG 0x9f11 | |
1283 | ||
1284 | ||
1285 | #define STM32F746_PK0_FUNC_GPIO 0xa000 | |
1286 | #define STM32F746_PK0_FUNC_LCD_G5 0xa00f | |
1287 | #define STM32F746_PK0_FUNC_EVENTOUT 0xa010 | |
1288 | #define STM32F746_PK0_FUNC_ANALOG 0xa011 | |
1289 | ||
1290 | #define STM32F746_PK1_FUNC_GPIO 0xa100 | |
1291 | #define STM32F746_PK1_FUNC_LCD_G6 0xa10f | |
1292 | #define STM32F746_PK1_FUNC_EVENTOUT 0xa110 | |
1293 | #define STM32F746_PK1_FUNC_ANALOG 0xa111 | |
1294 | ||
1295 | #define STM32F746_PK2_FUNC_GPIO 0xa200 | |
1296 | #define STM32F746_PK2_FUNC_LCD_G7 0xa20f | |
1297 | #define STM32F746_PK2_FUNC_EVENTOUT 0xa210 | |
1298 | #define STM32F746_PK2_FUNC_ANALOG 0xa211 | |
1299 | ||
1300 | #define STM32F746_PK3_FUNC_GPIO 0xa300 | |
1301 | #define STM32F746_PK3_FUNC_LCD_B4 0xa30f | |
1302 | #define STM32F746_PK3_FUNC_EVENTOUT 0xa310 | |
1303 | #define STM32F746_PK3_FUNC_ANALOG 0xa311 | |
1304 | ||
1305 | #define STM32F746_PK4_FUNC_GPIO 0xa400 | |
1306 | #define STM32F746_PK4_FUNC_LCD_B5 0xa40f | |
1307 | #define STM32F746_PK4_FUNC_EVENTOUT 0xa410 | |
1308 | #define STM32F746_PK4_FUNC_ANALOG 0xa411 | |
1309 | ||
1310 | #define STM32F746_PK5_FUNC_GPIO 0xa500 | |
1311 | #define STM32F746_PK5_FUNC_LCD_B6 0xa50f | |
1312 | #define STM32F746_PK5_FUNC_EVENTOUT 0xa510 | |
1313 | #define STM32F746_PK5_FUNC_ANALOG 0xa511 | |
1314 | ||
1315 | #define STM32F746_PK6_FUNC_GPIO 0xa600 | |
1316 | #define STM32F746_PK6_FUNC_LCD_B7 0xa60f | |
1317 | #define STM32F746_PK6_FUNC_EVENTOUT 0xa610 | |
1318 | #define STM32F746_PK6_FUNC_ANALOG 0xa611 | |
1319 | ||
1320 | #define STM32F746_PK7_FUNC_GPIO 0xa700 | |
1321 | #define STM32F746_PK7_FUNC_LCD_DE 0xa70f | |
1322 | #define STM32F746_PK7_FUNC_EVENTOUT 0xa710 | |
1323 | #define STM32F746_PK7_FUNC_ANALOG 0xa711 | |
1324 | ||
1325 | #endif /* _DT_BINDINGS_STM32F746_PINFUNC_H */ |