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cb9c377f PB |
1 | #ifndef GEN_ICOUNT_H |
2 | #define GEN_ICOUNT_H 1 | |
3 | ||
29e922b6 BS |
4 | #include "qemu-timer.h" |
5 | ||
bf20dc07 | 6 | /* Helpers for instruction counting code generation. */ |
dd5d6fe9 PB |
7 | |
8 | static TCGArg *icount_arg; | |
9 | static int icount_label; | |
10 | ||
11 | static inline void gen_icount_start(void) | |
12 | { | |
a7812ae4 | 13 | TCGv_i32 count; |
dd5d6fe9 PB |
14 | |
15 | if (!use_icount) | |
16 | return; | |
17 | ||
18 | icount_label = gen_new_label(); | |
a7812ae4 | 19 | count = tcg_temp_local_new_i32(); |
9349b4f9 | 20 | tcg_gen_ld_i32(count, cpu_env, offsetof(CPUArchState, icount_decr.u32)); |
dd5d6fe9 | 21 | /* This is a horrid hack to allow fixing up the value later. */ |
c4afe5c4 | 22 | icount_arg = tcg_ctx.gen_opparam_ptr + 1; |
dd5d6fe9 PB |
23 | tcg_gen_subi_i32(count, count, 0xdeadbeef); |
24 | ||
25 | tcg_gen_brcondi_i32(TCG_COND_LT, count, 0, icount_label); | |
9349b4f9 | 26 | tcg_gen_st16_i32(count, cpu_env, offsetof(CPUArchState, icount_decr.u16.low)); |
a7812ae4 | 27 | tcg_temp_free_i32(count); |
dd5d6fe9 PB |
28 | } |
29 | ||
30 | static void gen_icount_end(TranslationBlock *tb, int num_insns) | |
31 | { | |
32 | if (use_icount) { | |
33 | *icount_arg = num_insns; | |
34 | gen_set_label(icount_label); | |
4b4a72e5 | 35 | tcg_gen_exit_tb((tcg_target_long)tb + 2); |
dd5d6fe9 PB |
36 | } |
37 | } | |
38 | ||
86178a57 | 39 | static inline void gen_io_start(void) |
dd5d6fe9 | 40 | { |
a7812ae4 | 41 | TCGv_i32 tmp = tcg_const_i32(1); |
9349b4f9 | 42 | tcg_gen_st_i32(tmp, cpu_env, offsetof(CPUArchState, can_do_io)); |
a7812ae4 | 43 | tcg_temp_free_i32(tmp); |
dd5d6fe9 PB |
44 | } |
45 | ||
46 | static inline void gen_io_end(void) | |
47 | { | |
a7812ae4 | 48 | TCGv_i32 tmp = tcg_const_i32(0); |
9349b4f9 | 49 | tcg_gen_st_i32(tmp, cpu_env, offsetof(CPUArchState, can_do_io)); |
a7812ae4 | 50 | tcg_temp_free_i32(tmp); |
dd5d6fe9 | 51 | } |
cb9c377f PB |
52 | |
53 | #endif |