[mirror_qemu.git] / include / hw / i386 / pc.h

#ifndef HW_PC_H
#define HW_PC_H

#include "qemu-common.h"
#include "exec/memory.h"
#include "hw/isa/isa.h"
#include "hw/block/fdc.h"
#include "net/net.h"
#include "hw/i386/ioapic.h"

#include "qemu/range.h"
#include "qemu/bitmap.h"
#include "sysemu/sysemu.h"
#include "hw/pci/pci.h"
#include "hw/boards.h"

#define HPET_INTCAP "hpet-intcap"

/**
 * PCMachineState:
 * @hotplug_memory_base: address in guest RAM address space where hotplug memory
 * address space begins.
 * @hotplug_memory: hotplug memory addess space container
 * @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling
 */
struct PCMachineState {
    /*< private >*/
    MachineState parent_obj;

    /* <public> */
    ram_addr_t hotplug_memory_base;
    MemoryRegion hotplug_memory;

    HotplugHandler *acpi_dev;
};

#define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device"
#define PC_MACHINE_MEMHP_REGION_SIZE "hotplug-memory-region-size"

/**
 * PCMachineClass:
 * @get_hotplug_handler: pointer to parent class callback @get_hotplug_handler
 */
struct PCMachineClass {
    /*< private >*/
    MachineClass parent_class;

    /*< public >*/
    HotplugHandler *(*get_hotplug_handler)(MachineState *machine,
                                           DeviceState *dev);
};

typedef struct PCMachineState PCMachineState;
typedef struct PCMachineClass PCMachineClass;

#define TYPE_PC_MACHINE "generic-pc-machine"
#define PC_MACHINE(obj) \
    OBJECT_CHECK(PCMachineState, (obj), TYPE_PC_MACHINE)
#define PC_MACHINE_GET_CLASS(obj) \
    OBJECT_GET_CLASS(PCMachineClass, (obj), TYPE_PC_MACHINE)
#define PC_MACHINE_CLASS(klass) \
    OBJECT_CLASS_CHECK(PCMachineClass, (klass), TYPE_PC_MACHINE)

void qemu_register_pc_machine(QEMUMachine *m);

/* PC-style peripherals (also used by other machines).  */

typedef struct PcPciInfo {
    Range w32;
    Range w64;
} PcPciInfo;

#define ACPI_PM_PROP_S3_DISABLED "disable_s3"
#define ACPI_PM_PROP_S4_DISABLED "disable_s4"
#define ACPI_PM_PROP_S4_VAL "s4_val"
#define ACPI_PM_PROP_SCI_INT "sci_int"
#define ACPI_PM_PROP_ACPI_ENABLE_CMD "acpi_enable_cmd"
#define ACPI_PM_PROP_ACPI_DISABLE_CMD "acpi_disable_cmd"
#define ACPI_PM_PROP_PM_IO_BASE "pm_io_base"
#define ACPI_PM_PROP_GPE0_BLK "gpe0_blk"
#define ACPI_PM_PROP_GPE0_BLK_LEN "gpe0_blk_len"

struct PcGuestInfo {
    bool has_pci_info;
    bool isapc_ram_fw;
    hwaddr ram_size, ram_size_below_4g;
    unsigned apic_id_limit;
    bool apic_xrupt_override;
    uint64_t numa_nodes;
    uint64_t *node_mem;
    uint64_t *node_cpu;
    FWCfgState *fw_cfg;
    bool has_acpi_build;
    bool has_reserved_memory;
};

/* parallel.c */
static inline bool parallel_init(ISABus *bus, int index, CharDriverState *chr)
{
    DeviceState *dev;
    ISADevice *isadev;

    isadev = isa_try_create(bus, "isa-parallel");
    if (!isadev) {
        return false;
    }
    dev = DEVICE(isadev);
    qdev_prop_set_uint32(dev, "index", index);
    qdev_prop_set_chr(dev, "chardev", chr);
    if (qdev_init(dev) < 0) {
        return false;
    }
    return true;
}

bool parallel_mm_init(MemoryRegion *address_space,
                      hwaddr base, int it_shift, qemu_irq irq,
                      CharDriverState *chr);

/* i8259.c */

extern DeviceState *isa_pic;
qemu_irq *i8259_init(ISABus *bus, qemu_irq parent_irq);
qemu_irq *kvm_i8259_init(ISABus *bus);
int pic_read_irq(DeviceState *d);
int pic_get_output(DeviceState *d);
void pic_info(Monitor *mon, const QDict *qdict);
void irq_info(Monitor *mon, const QDict *qdict);

/* Global System Interrupts */

#define GSI_NUM_PINS IOAPIC_NUM_PINS

typedef struct GSIState {
    qemu_irq i8259_irq[ISA_NUM_IRQS];
    qemu_irq ioapic_irq[IOAPIC_NUM_PINS];
} GSIState;

void gsi_handler(void *opaque, int n, int level);

/* vmport.c */
typedef uint32_t (VMPortReadFunc)(void *opaque, uint32_t address);

static inline void vmport_init(ISABus *bus)
{
    isa_create_simple(bus, "vmport");
}

void vmport_register(unsigned char command, VMPortReadFunc *func, void *opaque);
void vmmouse_get_data(uint32_t *data);
void vmmouse_set_data(const uint32_t *data);

/* pckbd.c */

void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base);
void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
                   MemoryRegion *region, ram_addr_t size,
                   hwaddr mask);
void i8042_isa_mouse_fake_event(void *opaque);
void i8042_setup_a20_line(ISADevice *dev, qemu_irq *a20_out);

/* pc.c */
extern int fd_bootchk;

void pc_register_ferr_irq(qemu_irq irq);
void pc_acpi_smi_interrupt(void *opaque, int irq, int level);

void pc_cpus_init(const char *cpu_model, DeviceState *icc_bridge);
void pc_hot_add_cpu(const int64_t id, Error **errp);
void pc_acpi_init(const char *default_dsdt);

PcGuestInfo *pc_guest_info_init(ram_addr_t below_4g_mem_size,
                                ram_addr_t above_4g_mem_size);

#define PCI_HOST_PROP_PCI_HOLE_START   "pci-hole-start"
#define PCI_HOST_PROP_PCI_HOLE_END     "pci-hole-end"
#define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start"
#define PCI_HOST_PROP_PCI_HOLE64_END   "pci-hole64-end"
#define PCI_HOST_PROP_PCI_HOLE64_SIZE  "pci-hole64-size"
#define DEFAULT_PCI_HOLE64_SIZE (~0x0ULL)


void pc_pci_as_mapping_init(Object *owner, MemoryRegion *system_memory,
                            MemoryRegion *pci_address_space);

FWCfgState *pc_memory_init(MemoryRegion *system_memory,
                           const char *kernel_filename,
                           const char *kernel_cmdline,
                           const char *initrd_filename,
                           ram_addr_t below_4g_mem_size,
                           ram_addr_t above_4g_mem_size,
                           MemoryRegion *rom_memory,
                           MemoryRegion **ram_memory,
                           PcGuestInfo *guest_info);
qemu_irq *pc_allocate_cpu_irq(void);
DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus);
void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi,
                          ISADevice **rtc_state,
                          ISADevice **floppy,
                          bool no_vmport,
                          uint32 hpet_irqs);
void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd);
void pc_cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
                  const char *boot_device,
                  ISADevice *floppy, BusState *ide0, BusState *ide1,
                  ISADevice *s);
void pc_nic_init(ISABus *isa_bus, PCIBus *pci_bus);
void pc_pci_device_init(PCIBus *pci_bus);

typedef void (*cpu_set_smm_t)(int smm, void *arg);
void cpu_smm_register(cpu_set_smm_t callback, void *arg);

void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name);

/* acpi_piix.c */

I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
                      qemu_irq sci_irq, qemu_irq smi_irq,
                      int kvm_enabled, FWCfgState *fw_cfg,
                      DeviceState **piix4_pm);
void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr);

/* hpet.c */
extern int no_hpet;

/* piix_pci.c */
struct PCII440FXState;
typedef struct PCII440FXState PCII440FXState;

PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix_devfn,
                    ISABus **isa_bus, qemu_irq *pic,
                    MemoryRegion *address_space_mem,
                    MemoryRegion *address_space_io,
                    ram_addr_t ram_size,
                    ram_addr_t below_4g_mem_size,
                    ram_addr_t above_4g_mem_size,
                    MemoryRegion *pci_memory,
                    MemoryRegion *ram_memory);

PCIBus *find_i440fx(void);
/* piix4.c */
extern PCIDevice *piix4_dev;
int piix4_init(PCIBus *bus, ISABus **isa_bus, int devfn);

/* vga.c */
enum vga_retrace_method {
    VGA_RETRACE_DUMB,
    VGA_RETRACE_PRECISE
};

extern enum vga_retrace_method vga_retrace_method;

int isa_vga_mm_init(hwaddr vram_base,
                    hwaddr ctrl_base, int it_shift,
                    MemoryRegion *address_space);

/* ne2000.c */
static inline bool isa_ne2000_init(ISABus *bus, int base, int irq, NICInfo *nd)
{
    DeviceState *dev;
    ISADevice *isadev;

    qemu_check_nic_model(nd, "ne2k_isa");

    isadev = isa_try_create(bus, "ne2k_isa");
    if (!isadev) {
        return false;
    }
    dev = DEVICE(isadev);
    qdev_prop_set_uint32(dev, "iobase", base);
    qdev_prop_set_uint32(dev, "irq",    irq);
    qdev_set_nic_properties(dev, nd);
    qdev_init_nofail(dev);
    return true;
}

/* pc_sysfw.c */
void pc_system_firmware_init(MemoryRegion *rom_memory,
                             bool isapc_ram_fw);

/* pvpanic.c */
uint16_t pvpanic_port(void);

/* e820 types */
#define E820_RAM        1
#define E820_RESERVED   2
#define E820_ACPI       3
#define E820_NVS        4
#define E820_UNUSABLE   5

int e820_add_entry(uint64_t, uint64_t, uint32_t);
int e820_get_num_entries(void);
bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *);

#define PC_Q35_COMPAT_2_0 \
        PC_COMPAT_2_0, \
        {\
            .driver   = "ICH9-LPC",\
            .property = "memory-hotplug-support",\
            .value    = "off",\
        }

#define PC_Q35_COMPAT_1_7 \
        PC_COMPAT_1_7, \
        PC_Q35_COMPAT_2_0, \
        {\
            .driver   = "hpet",\
            .property = HPET_INTCAP,\
            .value    = stringify(4),\
        }

#define PC_Q35_COMPAT_1_6 \
        PC_COMPAT_1_6, \
        PC_Q35_COMPAT_1_7

#define PC_Q35_COMPAT_1_5 \
        PC_COMPAT_1_5, \
        PC_Q35_COMPAT_1_6

#define PC_Q35_COMPAT_1_4 \
        PC_COMPAT_1_4, \
        PC_Q35_COMPAT_1_5

#define PC_COMPAT_2_0 \
        {\
            .driver   = "PIIX4_PM",\
            .property = "memory-hotplug-support",\
            .value    = "off",\
        },\
        {\
            .driver   = "apic",\
            .property = "version",\
            .value    = stringify(0x11),\
        },\
        {\
            .driver   = "nec-usb-xhci",\
            .property = "superspeed-ports-first",\
            .value    = "off",\
        },\
        {\
            .driver   = "pci-serial",\
            .property = "prog_if",\
            .value    = stringify(0),\
        },\
        {\
            .driver   = "pci-serial-2x",\
            .property = "prof_if",\
            .value    = stringify(0),\
        },\
        {\
            .driver   = "pci-serial-4x",\
            .property = "prog_if",\
            .value    = stringify(0),\
        }

#define PC_COMPAT_1_7 \
        PC_COMPAT_2_0, \
        {\
            .driver   = TYPE_USB_DEVICE,\
            .property = "msos-desc",\
            .value    = "no",\
        },\
        {\
            .driver   = "PIIX4_PM",\
            .property = "acpi-pci-hotplug-with-bridge-support",\
            .value    = "off",\
        }

#define PC_COMPAT_1_6 \
        PC_COMPAT_1_7, \
        {\
            .driver   = "e1000",\
            .property = "mitigation",\
            .value    = "off",\
        },{\
            .driver   = "qemu64-" TYPE_X86_CPU,\
            .property = "model",\
            .value    = stringify(2),\
        },{\
            .driver   = "qemu32-" TYPE_X86_CPU,\
            .property = "model",\
            .value    = stringify(3),\
        },{\
            .driver   = "i440FX-pcihost",\
            .property = "short_root_bus",\
            .value    = stringify(1),\
        },{\
            .driver   = "q35-pcihost",\
            .property = "short_root_bus",\
            .value    = stringify(1),\
        }

#define PC_COMPAT_1_5 \
        PC_COMPAT_1_6, \
        {\
            .driver   = "Conroe-" TYPE_X86_CPU,\
            .property = "model",\
            .value    = stringify(2),\
        },{\
            .driver   = "Conroe-" TYPE_X86_CPU,\
            .property = "level",\
            .value    = stringify(2),\
        },{\
            .driver   = "Penryn-" TYPE_X86_CPU,\
            .property = "model",\
            .value    = stringify(2),\
        },{\
            .driver   = "Penryn-" TYPE_X86_CPU,\
            .property = "level",\
            .value    = stringify(2),\
        },{\
            .driver   = "Nehalem-" TYPE_X86_CPU,\
            .property = "model",\
            .value    = stringify(2),\
        },{\
            .driver   = "Nehalem-" TYPE_X86_CPU,\
            .property = "level",\
            .value    = stringify(2),\
        },{\
            .driver   = "virtio-net-pci",\
            .property = "any_layout",\
            .value    = "off",\
        },{\
            .driver = TYPE_X86_CPU,\
            .property = "pmu",\
            .value = "on",\
        },{\
            .driver   = "i440FX-pcihost",\
            .property = "short_root_bus",\
            .value    = stringify(0),\
        },{\
            .driver   = "q35-pcihost",\
            .property = "short_root_bus",\
            .value    = stringify(0),\
        }

#define PC_COMPAT_1_4 \
        PC_COMPAT_1_5, \
        {\
            .driver   = "scsi-hd",\
            .property = "discard_granularity",\
            .value    = stringify(0),\
	},{\
            .driver   = "scsi-cd",\
            .property = "discard_granularity",\
            .value    = stringify(0),\
	},{\
            .driver   = "scsi-disk",\
            .property = "discard_granularity",\
            .value    = stringify(0),\
	},{\
            .driver   = "ide-hd",\
            .property = "discard_granularity",\
            .value    = stringify(0),\
	},{\
            .driver   = "ide-cd",\
            .property = "discard_granularity",\
            .value    = stringify(0),\
	},{\
            .driver   = "ide-drive",\
            .property = "discard_granularity",\
            .value    = stringify(0),\
        },{\
            .driver   = "virtio-blk-pci",\
            .property = "discard_granularity",\
            .value    = stringify(0),\
	},{\
            .driver   = "virtio-serial-pci",\
            .property = "vectors",\
            /* DEV_NVECTORS_UNSPECIFIED as a uint32_t string */\
            .value    = stringify(0xFFFFFFFF),\
        },{ \
            .driver   = "virtio-net-pci", \
            .property = "ctrl_guest_offloads", \
            .value    = "off", \
        },{\
            .driver   = "e1000",\
            .property = "romfile",\
            .value    = "pxe-e1000.rom",\
        },{\
            .driver   = "ne2k_pci",\
            .property = "romfile",\
            .value    = "pxe-ne2k_pci.rom",\
        },{\
            .driver   = "pcnet",\
            .property = "romfile",\
            .value    = "pxe-pcnet.rom",\
        },{\
            .driver   = "rtl8139",\
            .property = "romfile",\
            .value    = "pxe-rtl8139.rom",\
        },{\
            .driver   = "virtio-net-pci",\
            .property = "romfile",\
            .value    = "pxe-virtio.rom",\
        },{\
            .driver   = "486-" TYPE_X86_CPU,\
            .property = "model",\
            .value    = stringify(0),\
        }

#define PC_COMMON_MACHINE_OPTIONS \
    .default_boot_order = "cad"

#define PC_DEFAULT_MACHINE_OPTIONS \
    PC_COMMON_MACHINE_OPTIONS, \
    .hot_add_cpu = pc_hot_add_cpu, \
    .max_cpus = 255

#endif
Commit	Line	Data
87ecb68b PB	1	#ifndef HW_PC_H
87ecb68b PB	2	#define HW_PC_H
376253ec AL	3
376253ec AL	4	#include "qemu-common.h"
022c62cb	5	#include "exec/memory.h"
0d09e41a PB	6	#include "hw/isa/isa.h"
0d09e41a PB	7	#include "hw/block/fdc.h"
1422e32d	8	#include "net/net.h"
0d09e41a	9	#include "hw/i386/ioapic.h"
376253ec	10
3459a625	11	#include "qemu/range.h"
b20c9bd5 MT	12	#include "qemu/bitmap.h"
	13	#include "sysemu/sysemu.h"
	14	#include "hw/pci/pci.h"
d5747cac	15	#include "hw/boards.h"
3459a625	16
7a10ef51 LPF	17	#define HPET_INTCAP "hpet-intcap"
7a10ef51 LPF	18
619d11e4 IM	19	/**
	20	* PCMachineState:
	21	* @hotplug_memory_base: address in guest RAM address space where hotplug memory
	22	* address space begins.
	23	* @hotplug_memory: hotplug memory addess space container
781bbd6b	24	* @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling
619d11e4	25	*/
d5747cac IM	26	struct PCMachineState {
	27	/< private >/
	28	MachineState parent_obj;
619d11e4 IM	29
	30	/* <public> */
	31	ram_addr_t hotplug_memory_base;
	32	MemoryRegion hotplug_memory;
781bbd6b IM	33
781bbd6b IM	34	HotplugHandler *acpi_dev;
d5747cac IM	35	};
d5747cac IM	36
781bbd6b	37	#define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device"
bf1e8939	38	#define PC_MACHINE_MEMHP_REGION_SIZE "hotplug-memory-region-size"
781bbd6b	39
95bee274 IM	40	/**
	41	* PCMachineClass:
	42	* @get_hotplug_handler: pointer to parent class callback @get_hotplug_handler
	43	*/
d5747cac IM	44	struct PCMachineClass {
	45	/< private >/
	46	MachineClass parent_class;
95bee274 IM	47
	48	/< public >/
	49	HotplugHandler (get_hotplug_handler)(MachineState *machine,
	50	DeviceState *dev);
d5747cac IM	51	};
	52
	53	typedef struct PCMachineState PCMachineState;
	54	typedef struct PCMachineClass PCMachineClass;
	55
	56	#define TYPE_PC_MACHINE "generic-pc-machine"
	57	#define PC_MACHINE(obj) \
	58	OBJECT_CHECK(PCMachineState, (obj), TYPE_PC_MACHINE)
	59	#define PC_MACHINE_GET_CLASS(obj) \
	60	OBJECT_GET_CLASS(PCMachineClass, (obj), TYPE_PC_MACHINE)
	61	#define PC_MACHINE_CLASS(klass) \
	62	OBJECT_CLASS_CHECK(PCMachineClass, (klass), TYPE_PC_MACHINE)
	63
	64	void qemu_register_pc_machine(QEMUMachine *m);
	65
87ecb68b PB	66	/* PC-style peripherals (also used by other machines). */
87ecb68b PB	67
3459a625 MT	68	typedef struct PcPciInfo {
	69	Range w32;
	70	Range w64;
	71	} PcPciInfo;
	72
f854ecc7 MT	73	#define ACPI_PM_PROP_S3_DISABLED "disable_s3"
	74	#define ACPI_PM_PROP_S4_DISABLED "disable_s4"
	75	#define ACPI_PM_PROP_S4_VAL "s4_val"
	76	#define ACPI_PM_PROP_SCI_INT "sci_int"
	77	#define ACPI_PM_PROP_ACPI_ENABLE_CMD "acpi_enable_cmd"
	78	#define ACPI_PM_PROP_ACPI_DISABLE_CMD "acpi_disable_cmd"
	79	#define ACPI_PM_PROP_PM_IO_BASE "pm_io_base"
	80	#define ACPI_PM_PROP_GPE0_BLK "gpe0_blk"
	81	#define ACPI_PM_PROP_GPE0_BLK_LEN "gpe0_blk_len"
	82
3459a625	83	struct PcGuestInfo {
f8c457b8	84	bool has_pci_info;
6dd2a5c9	85	bool isapc_ram_fw;
f30ee8a9	86	hwaddr ram_size, ram_size_below_4g;
b20c9bd5 MT	87	unsigned apic_id_limit;
	88	bool apic_xrupt_override;
	89	uint64_t numa_nodes;
	90	uint64_t *node_mem;
	91	uint64_t *node_cpu;
3459a625	92	FWCfgState *fw_cfg;
72c194f7	93	bool has_acpi_build;
de268e13	94	bool has_reserved_memory;
3459a625 MT	95	};
3459a625 MT	96
87ecb68b	97	/* parallel.c */
48a18b3c	98	static inline bool parallel_init(ISABus bus, int index, CharDriverState chr)
defdb20e	99	{
4a17cc4f AF	100	DeviceState *dev;
4a17cc4f AF	101	ISADevice *isadev;
defdb20e	102
4a17cc4f AF	103	isadev = isa_try_create(bus, "isa-parallel");
4a17cc4f AF	104	if (!isadev) {
73531538 BS	105	return false;
73531538 BS	106	}
4a17cc4f AF	107	dev = DEVICE(isadev);
	108	qdev_prop_set_uint32(dev, "index", index);
	109	qdev_prop_set_chr(dev, "chardev", chr);
	110	if (qdev_init(dev) < 0) {
defdb20e BS	111	return false;
	112	}
	113	return true;
	114	}
	115
63858cd9	116	bool parallel_mm_init(MemoryRegion *address_space,
a8170e5e	117	hwaddr base, int it_shift, qemu_irq irq,
defdb20e	118	CharDriverState *chr);
87ecb68b PB	119
	120	/* i8259.c */
	121
9aa78c42	122	extern DeviceState *isa_pic;
48a18b3c	123	qemu_irq i8259_init(ISABus bus, qemu_irq parent_irq);
10b61882	124	qemu_irq kvm_i8259_init(ISABus bus);
9aa78c42 JK	125	int pic_read_irq(DeviceState *d);
9aa78c42 JK	126	int pic_get_output(DeviceState *d);
84f2d0ea WX	127	void pic_info(Monitor mon, const QDict qdict);
84f2d0ea WX	128	void irq_info(Monitor mon, const QDict qdict);
87ecb68b	129
b881fbe9	130	/* Global System Interrupts */
96051119	131
b881fbe9	132	#define GSI_NUM_PINS IOAPIC_NUM_PINS
845773ab	133
b881fbe9	134	typedef struct GSIState {
43a0db35	135	qemu_irq i8259_irq[ISA_NUM_IRQS];
b881fbe9 JK	136	qemu_irq ioapic_irq[IOAPIC_NUM_PINS];
	137	} GSIState;
	138
	139	void gsi_handler(void *opaque, int n, int level);
845773ab	140
87ecb68b	141	/* vmport.c */
d67f679d JK	142	typedef uint32_t (VMPortReadFunc)(void *opaque, uint32_t address);
d67f679d JK	143
48a18b3c	144	static inline void vmport_init(ISABus *bus)
6872ef61	145	{
48a18b3c	146	isa_create_simple(bus, "vmport");
6872ef61	147	}
d67f679d JK	148
d67f679d JK	149	void vmport_register(unsigned char command, VMPortReadFunc func, void opaque);
86d86414 BS	150	void vmmouse_get_data(uint32_t *data);
86d86414 BS	151	void vmmouse_set_data(const uint32_t *data);
87ecb68b	152
87ecb68b PB	153	/* pckbd.c */
	154
	155	void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base);
	156	void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
dbff76ac	157	MemoryRegion *region, ram_addr_t size,
a8170e5e	158	hwaddr mask);
956a3e6b BS	159	void i8042_isa_mouse_fake_event(void *opaque);
956a3e6b BS	160	void i8042_setup_a20_line(ISADevice dev, qemu_irq a20_out);
87ecb68b	161
87ecb68b PB	162	/* pc.c */
	163	extern int fd_bootchk;
	164
8e78eb28	165	void pc_register_ferr_irq(qemu_irq irq);
845773ab IY	166	void pc_acpi_smi_interrupt(void *opaque, int irq, int level);
845773ab IY	167
62fc403f	168	void pc_cpus_init(const char cpu_model, DeviceState icc_bridge);
c649983b	169	void pc_hot_add_cpu(const int64_t id, Error **errp);
f7e4dd6c	170	void pc_acpi_init(const char *default_dsdt);
3459a625 MT	171
	172	PcGuestInfo *pc_guest_info_init(ram_addr_t below_4g_mem_size,
	173	ram_addr_t above_4g_mem_size);
	174
39848901 IM	175	#define PCI_HOST_PROP_PCI_HOLE_START "pci-hole-start"
	176	#define PCI_HOST_PROP_PCI_HOLE_END "pci-hole-end"
	177	#define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start"
	178	#define PCI_HOST_PROP_PCI_HOLE64_END "pci-hole64-end"
	179	#define PCI_HOST_PROP_PCI_HOLE64_SIZE "pci-hole64-size"
1466cef3 MT	180	#define DEFAULT_PCI_HOLE64_SIZE (~0x0ULL)
1466cef3 MT	181
39848901	182
83d08f26 MT	183	void pc_pci_as_mapping_init(Object owner, MemoryRegion system_memory,
83d08f26 MT	184	MemoryRegion *pci_address_space);
39848901	185
a88b362c LE	186	FWCfgState pc_memory_init(MemoryRegion system_memory,
	187	const char *kernel_filename,
	188	const char *kernel_cmdline,
	189	const char *initrd_filename,
	190	ram_addr_t below_4g_mem_size,
	191	ram_addr_t above_4g_mem_size,
	192	MemoryRegion *rom_memory,
3459a625 MT	193	MemoryRegion **ram_memory,
3459a625 MT	194	PcGuestInfo *guest_info);
845773ab	195	qemu_irq *pc_allocate_cpu_irq(void);
48a18b3c HP	196	DeviceState pc_vga_init(ISABus isa_bus, PCIBus *pci_bus);
48a18b3c HP	197	void pc_basic_device_init(ISABus isa_bus, qemu_irq gsi,
1611977c	198	ISADevice **rtc_state,
34d4260e	199	ISADevice **floppy,
7a10ef51 LPF	200	bool no_vmport,
7a10ef51 LPF	201	uint32 hpet_irqs);
48a18b3c	202	void pc_init_ne2k_isa(ISABus bus, NICInfo nd);
845773ab	203	void pc_cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
c0897e0c	204	const char *boot_device,
34d4260e	205	ISADevice floppy, BusState ide0, BusState *ide1,
63ffb564	206	ISADevice *s);
9011a1a7	207	void pc_nic_init(ISABus isa_bus, PCIBus pci_bus);
845773ab	208	void pc_pci_device_init(PCIBus *pci_bus);
8e78eb28	209
f885f1ea IY	210	typedef void (cpu_set_smm_t)(int smm, void arg);
	211	void cpu_smm_register(cpu_set_smm_t callback, void *arg);
	212
a39e3564 JB	213	void ioapic_init_gsi(GSIState gsi_state, const char parent_name);
a39e3564 JB	214
9d5e77a2	215	/* acpi_piix.c */
53b67b30	216
a5c82852 AF	217	I2CBus piix4_pm_init(PCIBus bus, int devfn, uint32_t smb_io_base,
a5c82852 AF	218	qemu_irq sci_irq, qemu_irq smi_irq,
781bbd6b IM	219	int kvm_enabled, FWCfgState *fw_cfg,
781bbd6b IM	220	DeviceState **piix4_pm);
87ecb68b	221	void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr);
87ecb68b	222
16b29ae1 AL	223	/* hpet.c */
	224	extern int no_hpet;
	225
87ecb68b	226	/* piix_pci.c */
0a3bacf3 JQ	227	struct PCII440FXState;
	228	typedef struct PCII440FXState PCII440FXState;
	229
1e39101c	230	PCIBus i440fx_init(PCII440FXState pi440fx_state, int piix_devfn,
60573079	231	ISABus *isa_bus, qemu_irq pic,
aee97b84 AK	232	MemoryRegion *address_space_mem,
aee97b84 AK	233	MemoryRegion *address_space_io,
ae0a5466	234	ram_addr_t ram_size,
ddaaefb4	235	ram_addr_t below_4g_mem_size,
39848901	236	ram_addr_t above_4g_mem_size,
ae0a5466 AK	237	MemoryRegion *pci_memory,
ae0a5466 AK	238	MemoryRegion *ram_memory);
87ecb68b	239
277e9340	240	PCIBus *find_i440fx(void);
823e675a	241	/* piix4.c */
b1d8e52e	242	extern PCIDevice *piix4_dev;
142e9787	243	int piix4_init(PCIBus bus, ISABus *isa_bus, int devfn);
87ecb68b PB	244
87ecb68b PB	245	/* vga.c */
cb5a7aa8	246	enum vga_retrace_method {
	247	VGA_RETRACE_DUMB,
	248	VGA_RETRACE_PRECISE
	249	};
	250
	251	extern enum vga_retrace_method vga_retrace_method;
87ecb68b	252
a8170e5e AK	253	int isa_vga_mm_init(hwaddr vram_base,
a8170e5e AK	254	hwaddr ctrl_base, int it_shift,
be20f9e9	255	MemoryRegion *address_space);
87ecb68b	256
87ecb68b	257	/* ne2000.c */
48a18b3c	258	static inline bool isa_ne2000_init(ISABus bus, int base, int irq, NICInfo nd)
60a14ad3	259	{
4a17cc4f AF	260	DeviceState *dev;
4a17cc4f AF	261	ISADevice *isadev;
87ecb68b	262
60a14ad3 BS	263	qemu_check_nic_model(nd, "ne2k_isa");
60a14ad3 BS	264
4a17cc4f AF	265	isadev = isa_try_create(bus, "ne2k_isa");
4a17cc4f AF	266	if (!isadev) {
cd1b8a8b BS	267	return false;
cd1b8a8b BS	268	}
4a17cc4f AF	269	dev = DEVICE(isadev);
	270	qdev_prop_set_uint32(dev, "iobase", base);
	271	qdev_prop_set_uint32(dev, "irq", irq);
	272	qdev_set_nic_properties(dev, nd);
	273	qdev_init_nofail(dev);
cd1b8a8b	274	return true;
60a14ad3	275	}
87ecb68b	276
cbc5b5f3	277	/* pc_sysfw.c */
6dd2a5c9 PB	278	void pc_system_firmware_init(MemoryRegion *rom_memory,
6dd2a5c9 PB	279	bool isapc_ram_fw);
cbc5b5f3	280
3ab135f3	281	/* pvpanic.c */
309cd62d	282	uint16_t pvpanic_port(void);
3ab135f3	283
4c5b10b7 JS	284	/* e820 types */
	285	#define E820_RAM 1
	286	#define E820_RESERVED 2
	287	#define E820_ACPI 3
	288	#define E820_NVS 4
	289	#define E820_UNUSABLE 5
	290
	291	int e820_add_entry(uint64_t, uint64_t, uint32_t);
7bf8ef19 GS	292	int e820_get_num_entries(void);
7bf8ef19 GS	293	bool e820_get_entry(int, uint32_t, uint64_t , uint64_t );
4c5b10b7	294
9df11c9f	295	#define PC_Q35_COMPAT_2_0 \
1f862184 IM	296	PC_COMPAT_2_0, \
1f862184 IM	297	{\
292b1634	298	.driver = "ICH9-LPC",\
1f862184 IM	299	.property = "memory-hotplug-support",\
	300	.value = "off",\
	301	}
9df11c9f	302
7a10ef51	303	#define PC_Q35_COMPAT_1_7 \
5319dc7b	304	PC_COMPAT_1_7, \
9df11c9f	305	PC_Q35_COMPAT_2_0, \
7a10ef51 LPF	306	{\
	307	.driver = "hpet",\
	308	.property = HPET_INTCAP,\
	309	.value = stringify(4),\
	310	}
	311
	312	#define PC_Q35_COMPAT_1_6 \
	313	PC_COMPAT_1_6, \
	314	PC_Q35_COMPAT_1_7
	315
	316	#define PC_Q35_COMPAT_1_5 \
	317	PC_COMPAT_1_5, \
	318	PC_Q35_COMPAT_1_6
	319
	320	#define PC_Q35_COMPAT_1_4 \
	321	PC_COMPAT_1_4, \
	322	PC_Q35_COMPAT_1_5
	323
9df11c9f	324	#define PC_COMPAT_2_0 \
34774320 IM	325	{\
	326	.driver = "PIIX4_PM",\
	327	.property = "memory-hotplug-support",\
	328	.value = "off",\
	329	},\
9df11c9f	330	{\
aa93200b GS	331	.driver = "apic",\
	332	.property = "version",\
	333	.value = stringify(0x11),\
34774320 IM	334	},\
34774320 IM	335	{\
7bafd888 GH	336	.driver = "nec-usb-xhci",\
	337	.property = "superspeed-ports-first",\
	338	.value = "off",\
13cc2c3e BZ	339	},\
	340	{\
	341	.driver = "pci-serial",\
	342	.property = "prog_if",\
	343	.value = stringify(0),\
	344	},\
	345	{\
	346	.driver = "pci-serial-2x",\
	347	.property = "prof_if",\
	348	.value = stringify(0),\
	349	},\
	350	{\
	351	.driver = "pci-serial-4x",\
	352	.property = "prog_if",\
	353	.value = stringify(0),\
9df11c9f GS	354	}
9df11c9f GS	355
5319dc7b	356	#define PC_COMPAT_1_7 \
9df11c9f	357	PC_COMPAT_2_0, \
5319dc7b GH	358	{\
	359	.driver = TYPE_USB_DEVICE,\
	360	.property = "msos-desc",\
	361	.value = "no",\
9e047b98 MT	362	},\
	363	{\
	364	.driver = "PIIX4_PM",\
	365	.property = "acpi-pci-hotplug-with-bridge-support",\
	366	.value = "off",\
5319dc7b GH	367	}
5319dc7b GH	368
e9845f09	369	#define PC_COMPAT_1_6 \
5319dc7b	370	PC_COMPAT_1_7, \
e9845f09 VM	371	{\
	372	.driver = "e1000",\
	373	.property = "mitigation",\
	374	.value = "off",\
f8e6a11a EH	375	},{\
	376	.driver = "qemu64-" TYPE_X86_CPU,\
	377	.property = "model",\
	378	.value = stringify(2),\
	379	},{\
	380	.driver = "qemu32-" TYPE_X86_CPU,\
	381	.property = "model",\
	382	.value = stringify(3),\
04c7d8b8 CR	383	},{\
	384	.driver = "i440FX-pcihost",\
	385	.property = "short_root_bus",\
	386	.value = stringify(1),\
	387	},{\
	388	.driver = "q35-pcihost",\
	389	.property = "short_root_bus",\
	390	.value = stringify(1),\
e9845f09 VM	391	}
e9845f09 VM	392
ffce9ebb	393	#define PC_COMPAT_1_5 \
e9845f09	394	PC_COMPAT_1_6, \
ffce9ebb EH	395	{\
	396	.driver = "Conroe-" TYPE_X86_CPU,\
	397	.property = "model",\
	398	.value = stringify(2),\
6b11322e EH	399	},{\
	400	.driver = "Conroe-" TYPE_X86_CPU,\
	401	.property = "level",\
	402	.value = stringify(2),\
ffce9ebb EH	403	},{\
	404	.driver = "Penryn-" TYPE_X86_CPU,\
	405	.property = "model",\
	406	.value = stringify(2),\
6b11322e EH	407	},{\
	408	.driver = "Penryn-" TYPE_X86_CPU,\
	409	.property = "level",\
	410	.value = stringify(2),\
ffce9ebb EH	411	},{\
	412	.driver = "Nehalem-" TYPE_X86_CPU,\
	413	.property = "model",\
	414	.value = stringify(2),\
6b11322e EH	415	},{\
	416	.driver = "Nehalem-" TYPE_X86_CPU,\
	417	.property = "level",\
	418	.value = stringify(2),\
488f069b MT	419	},{\
	420	.driver = "virtio-net-pci",\
	421	.property = "any_layout",\
	422	.value = "off",\
9337e3b6 EH	423	},{\
	424	.driver = TYPE_X86_CPU,\
	425	.property = "pmu",\
	426	.value = "on",\
04c7d8b8 CR	427	},{\
	428	.driver = "i440FX-pcihost",\
	429	.property = "short_root_bus",\
	430	.value = stringify(0),\
	431	},{\
	432	.driver = "q35-pcihost",\
	433	.property = "short_root_bus",\
	434	.value = stringify(0),\
ffce9ebb EH	435	}
ffce9ebb EH	436
bf3caa3d	437	#define PC_COMPAT_1_4 \
ffce9ebb	438	PC_COMPAT_1_5, \
bf3caa3d PB	439	{\
	440	.driver = "scsi-hd",\
	441	.property = "discard_granularity",\
	442	.value = stringify(0),\
	443	},{\
	444	.driver = "scsi-cd",\
	445	.property = "discard_granularity",\
	446	.value = stringify(0),\
	447	},{\
	448	.driver = "scsi-disk",\
	449	.property = "discard_granularity",\
	450	.value = stringify(0),\
	451	},{\
	452	.driver = "ide-hd",\
	453	.property = "discard_granularity",\
	454	.value = stringify(0),\
	455	},{\
	456	.driver = "ide-cd",\
	457	.property = "discard_granularity",\
	458	.value = stringify(0),\
	459	},{\
	460	.driver = "ide-drive",\
	461	.property = "discard_granularity",\
	462	.value = stringify(0),\
c45e5b5b	463	},{\
bf3caa3d PB	464	.driver = "virtio-blk-pci",\
	465	.property = "discard_granularity",\
	466	.value = stringify(0),\
554f1997 GH	467	},{\
	468	.driver = "virtio-serial-pci",\
	469	.property = "vectors",\
	470	/* DEV_NVECTORS_UNSPECIFIED as a uint32_t string */\
	471	.value = stringify(0xFFFFFFFF),\
644c9858 DF	472	},{ \
	473	.driver = "virtio-net-pci", \
	474	.property = "ctrl_guest_offloads", \
	475	.value = "off", \
c45e5b5b GH	476	},{\
	477	.driver = "e1000",\
	478	.property = "romfile",\
	479	.value = "pxe-e1000.rom",\
	480	},{\
	481	.driver = "ne2k_pci",\
	482	.property = "romfile",\
	483	.value = "pxe-ne2k_pci.rom",\
	484	},{\
	485	.driver = "pcnet",\
	486	.property = "romfile",\
	487	.value = "pxe-pcnet.rom",\
	488	},{\
	489	.driver = "rtl8139",\
	490	.property = "romfile",\
	491	.value = "pxe-rtl8139.rom",\
	492	},{\
	493	.driver = "virtio-net-pci",\
	494	.property = "romfile",\
	495	.value = "pxe-virtio.rom",\
b2a856d9 AF	496	},{\
	497	.driver = "486-" TYPE_X86_CPU,\
	498	.property = "model",\
	499	.value = stringify(0),\
c45e5b5b	500	}
bf3caa3d	501
a0dba644 MT	502	#define PC_COMMON_MACHINE_OPTIONS \
	503	.default_boot_order = "cad"
	504
	505	#define PC_DEFAULT_MACHINE_OPTIONS \
	506	PC_COMMON_MACHINE_OPTIONS, \
	507	.hot_add_cpu = pc_hot_add_cpu, \
	508	.max_cpus = 255
	509
87ecb68b	510	#endif