[mirror_qemu.git] / include / hw / i386 / pc.h

#ifndef HW_PC_H
#define HW_PC_H

#include "qemu-common.h"
#include "exec/memory.h"
#include "hw/isa/isa.h"
#include "hw/block/fdc.h"
#include "net/net.h"
#include "hw/i386/ioapic.h"

#include "qemu/range.h"
#include "qemu/bitmap.h"
#include "sysemu/sysemu.h"
#include "hw/pci/pci.h"
#include "hw/boards.h"

#define HPET_INTCAP "hpet-intcap"

struct PCMachineState {
    /*< private >*/
    MachineState parent_obj;
};

struct PCMachineClass {
    /*< private >*/
    MachineClass parent_class;
};

typedef struct PCMachineState PCMachineState;
typedef struct PCMachineClass PCMachineClass;

#define TYPE_PC_MACHINE "generic-pc-machine"
#define PC_MACHINE(obj) \
    OBJECT_CHECK(PCMachineState, (obj), TYPE_PC_MACHINE)
#define PC_MACHINE_GET_CLASS(obj) \
    OBJECT_GET_CLASS(PCMachineClass, (obj), TYPE_PC_MACHINE)
#define PC_MACHINE_CLASS(klass) \
    OBJECT_CLASS_CHECK(PCMachineClass, (klass), TYPE_PC_MACHINE)

void qemu_register_pc_machine(QEMUMachine *m);

/* PC-style peripherals (also used by other machines).  */

typedef struct PcPciInfo {
    Range w32;
    Range w64;
} PcPciInfo;

#define ACPI_PM_PROP_S3_DISABLED "disable_s3"
#define ACPI_PM_PROP_S4_DISABLED "disable_s4"
#define ACPI_PM_PROP_S4_VAL "s4_val"
#define ACPI_PM_PROP_SCI_INT "sci_int"
#define ACPI_PM_PROP_ACPI_ENABLE_CMD "acpi_enable_cmd"
#define ACPI_PM_PROP_ACPI_DISABLE_CMD "acpi_disable_cmd"
#define ACPI_PM_PROP_PM_IO_BASE "pm_io_base"
#define ACPI_PM_PROP_GPE0_BLK "gpe0_blk"
#define ACPI_PM_PROP_GPE0_BLK_LEN "gpe0_blk_len"

struct PcGuestInfo {
    bool has_pci_info;
    bool isapc_ram_fw;
    hwaddr ram_size, ram_size_below_4g;
    unsigned apic_id_limit;
    bool apic_xrupt_override;
    uint64_t numa_nodes;
    uint64_t *node_mem;
    uint64_t *node_cpu;
    FWCfgState *fw_cfg;
    bool has_acpi_build;
};

/* parallel.c */
static inline bool parallel_init(ISABus *bus, int index, CharDriverState *chr)
{
    DeviceState *dev;
    ISADevice *isadev;

    isadev = isa_try_create(bus, "isa-parallel");
    if (!isadev) {
        return false;
    }
    dev = DEVICE(isadev);
    qdev_prop_set_uint32(dev, "index", index);
    qdev_prop_set_chr(dev, "chardev", chr);
    if (qdev_init(dev) < 0) {
        return false;
    }
    return true;
}

bool parallel_mm_init(MemoryRegion *address_space,
                      hwaddr base, int it_shift, qemu_irq irq,
                      CharDriverState *chr);

/* i8259.c */

extern DeviceState *isa_pic;
qemu_irq *i8259_init(ISABus *bus, qemu_irq parent_irq);
qemu_irq *kvm_i8259_init(ISABus *bus);
int pic_read_irq(DeviceState *d);
int pic_get_output(DeviceState *d);
void pic_info(Monitor *mon, const QDict *qdict);
void irq_info(Monitor *mon, const QDict *qdict);

/* Global System Interrupts */

#define GSI_NUM_PINS IOAPIC_NUM_PINS

typedef struct GSIState {
    qemu_irq i8259_irq[ISA_NUM_IRQS];
    qemu_irq ioapic_irq[IOAPIC_NUM_PINS];
} GSIState;

void gsi_handler(void *opaque, int n, int level);

/* vmport.c */
typedef uint32_t (VMPortReadFunc)(void *opaque, uint32_t address);

static inline void vmport_init(ISABus *bus)
{
    isa_create_simple(bus, "vmport");
}

void vmport_register(unsigned char command, VMPortReadFunc *func, void *opaque);
void vmmouse_get_data(uint32_t *data);
void vmmouse_set_data(const uint32_t *data);

/* pckbd.c */

void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base);
void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
                   MemoryRegion *region, ram_addr_t size,
                   hwaddr mask);
void i8042_isa_mouse_fake_event(void *opaque);
void i8042_setup_a20_line(ISADevice *dev, qemu_irq *a20_out);

/* pc.c */
extern int fd_bootchk;

void pc_register_ferr_irq(qemu_irq irq);
void pc_acpi_smi_interrupt(void *opaque, int irq, int level);

void pc_cpus_init(const char *cpu_model, DeviceState *icc_bridge);
void pc_hot_add_cpu(const int64_t id, Error **errp);
void pc_acpi_init(const char *default_dsdt);

PcGuestInfo *pc_guest_info_init(ram_addr_t below_4g_mem_size,
                                ram_addr_t above_4g_mem_size);

#define PCI_HOST_PROP_PCI_HOLE_START   "pci-hole-start"
#define PCI_HOST_PROP_PCI_HOLE_END     "pci-hole-end"
#define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start"
#define PCI_HOST_PROP_PCI_HOLE64_END   "pci-hole64-end"
#define PCI_HOST_PROP_PCI_HOLE64_SIZE  "pci-hole64-size"
#define DEFAULT_PCI_HOLE64_SIZE (~0x0ULL)


void pc_pci_as_mapping_init(Object *owner, MemoryRegion *system_memory,
                            MemoryRegion *pci_address_space);

FWCfgState *pc_memory_init(MemoryRegion *system_memory,
                           const char *kernel_filename,
                           const char *kernel_cmdline,
                           const char *initrd_filename,
                           ram_addr_t below_4g_mem_size,
                           ram_addr_t above_4g_mem_size,
                           MemoryRegion *rom_memory,
                           MemoryRegion **ram_memory,
                           PcGuestInfo *guest_info);
qemu_irq *pc_allocate_cpu_irq(void);
DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus);
void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi,
                          ISADevice **rtc_state,
                          ISADevice **floppy,
                          bool no_vmport,
                          uint32 hpet_irqs);
void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd);
void pc_cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
                  const char *boot_device,
                  ISADevice *floppy, BusState *ide0, BusState *ide1,
                  ISADevice *s);
void pc_nic_init(ISABus *isa_bus, PCIBus *pci_bus);
void pc_pci_device_init(PCIBus *pci_bus);

typedef void (*cpu_set_smm_t)(int smm, void *arg);
void cpu_smm_register(cpu_set_smm_t callback, void *arg);

void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name);

/* acpi_piix.c */

I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
                      qemu_irq sci_irq, qemu_irq smi_irq,
                      int kvm_enabled, FWCfgState *fw_cfg);
void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr);

/* hpet.c */
extern int no_hpet;

/* piix_pci.c */
struct PCII440FXState;
typedef struct PCII440FXState PCII440FXState;

PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix_devfn,
                    ISABus **isa_bus, qemu_irq *pic,
                    MemoryRegion *address_space_mem,
                    MemoryRegion *address_space_io,
                    ram_addr_t ram_size,
                    ram_addr_t below_4g_mem_size,
                    ram_addr_t above_4g_mem_size,
                    MemoryRegion *pci_memory,
                    MemoryRegion *ram_memory);

PCIBus *find_i440fx(void);
/* piix4.c */
extern PCIDevice *piix4_dev;
int piix4_init(PCIBus *bus, ISABus **isa_bus, int devfn);

/* vga.c */
enum vga_retrace_method {
    VGA_RETRACE_DUMB,
    VGA_RETRACE_PRECISE
};

extern enum vga_retrace_method vga_retrace_method;

int isa_vga_mm_init(hwaddr vram_base,
                    hwaddr ctrl_base, int it_shift,
                    MemoryRegion *address_space);

/* ne2000.c */
static inline bool isa_ne2000_init(ISABus *bus, int base, int irq, NICInfo *nd)
{
    DeviceState *dev;
    ISADevice *isadev;

    qemu_check_nic_model(nd, "ne2k_isa");

    isadev = isa_try_create(bus, "ne2k_isa");
    if (!isadev) {
        return false;
    }
    dev = DEVICE(isadev);
    qdev_prop_set_uint32(dev, "iobase", base);
    qdev_prop_set_uint32(dev, "irq",    irq);
    qdev_set_nic_properties(dev, nd);
    qdev_init_nofail(dev);
    return true;
}

/* pc_sysfw.c */
void pc_system_firmware_init(MemoryRegion *rom_memory,
                             bool isapc_ram_fw);

/* pvpanic.c */
uint16_t pvpanic_port(void);

/* e820 types */
#define E820_RAM        1
#define E820_RESERVED   2
#define E820_ACPI       3
#define E820_NVS        4
#define E820_UNUSABLE   5

int e820_add_entry(uint64_t, uint64_t, uint32_t);
int e820_get_num_entries(void);
bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *);

#define PC_Q35_COMPAT_2_0 \
        PC_COMPAT_2_0

#define PC_Q35_COMPAT_1_7 \
        PC_COMPAT_1_7, \
        PC_Q35_COMPAT_2_0, \
        {\
            .driver   = "hpet",\
            .property = HPET_INTCAP,\
            .value    = stringify(4),\
        }

#define PC_Q35_COMPAT_1_6 \
        PC_COMPAT_1_6, \
        PC_Q35_COMPAT_1_7

#define PC_Q35_COMPAT_1_5 \
        PC_COMPAT_1_5, \
        PC_Q35_COMPAT_1_6

#define PC_Q35_COMPAT_1_4 \
        PC_COMPAT_1_4, \
        PC_Q35_COMPAT_1_5

#define PC_COMPAT_2_0 \
        {\
            .driver   = "apic",\
            .property = "version",\
            .value    = stringify(0x11),\
        },{\
            .driver   = "nec-usb-xhci",\
            .property = "superspeed-ports-first",\
            .value    = "off",\
        },\
        {\
            .driver   = "pci-serial",\
            .property = "prog_if",\
            .value    = stringify(0),\
        },\
        {\
            .driver   = "pci-serial-2x",\
            .property = "prof_if",\
            .value    = stringify(0),\
        },\
        {\
            .driver   = "pci-serial-4x",\
            .property = "prog_if",\
            .value    = stringify(0),\
        }

#define PC_COMPAT_1_7 \
        PC_COMPAT_2_0, \
        {\
            .driver   = TYPE_USB_DEVICE,\
            .property = "msos-desc",\
            .value    = "no",\
        },\
        {\
            .driver   = "PIIX4_PM",\
            .property = "acpi-pci-hotplug-with-bridge-support",\
            .value    = "off",\
        }

#define PC_COMPAT_1_6 \
        PC_COMPAT_1_7, \
        {\
            .driver   = "e1000",\
            .property = "mitigation",\
            .value    = "off",\
        },{\
            .driver   = "qemu64-" TYPE_X86_CPU,\
            .property = "model",\
            .value    = stringify(2),\
        },{\
            .driver   = "qemu32-" TYPE_X86_CPU,\
            .property = "model",\
            .value    = stringify(3),\
        },{\
            .driver   = "i440FX-pcihost",\
            .property = "short_root_bus",\
            .value    = stringify(1),\
        },{\
            .driver   = "q35-pcihost",\
            .property = "short_root_bus",\
            .value    = stringify(1),\
        }

#define PC_COMPAT_1_5 \
        PC_COMPAT_1_6, \
        {\
            .driver   = "Conroe-" TYPE_X86_CPU,\
            .property = "model",\
            .value    = stringify(2),\
        },{\
            .driver   = "Conroe-" TYPE_X86_CPU,\
            .property = "level",\
            .value    = stringify(2),\
        },{\
            .driver   = "Penryn-" TYPE_X86_CPU,\
            .property = "model",\
            .value    = stringify(2),\
        },{\
            .driver   = "Penryn-" TYPE_X86_CPU,\
            .property = "level",\
            .value    = stringify(2),\
        },{\
            .driver   = "Nehalem-" TYPE_X86_CPU,\
            .property = "model",\
            .value    = stringify(2),\
        },{\
            .driver   = "Nehalem-" TYPE_X86_CPU,\
            .property = "level",\
            .value    = stringify(2),\
        },{\
            .driver   = "virtio-net-pci",\
            .property = "any_layout",\
            .value    = "off",\
        },{\
            .driver = TYPE_X86_CPU,\
            .property = "pmu",\
            .value = "on",\
        },{\
            .driver   = "i440FX-pcihost",\
            .property = "short_root_bus",\
            .value    = stringify(0),\
        },{\
            .driver   = "q35-pcihost",\
            .property = "short_root_bus",\
            .value    = stringify(0),\
        }

#define PC_COMPAT_1_4 \
        PC_COMPAT_1_5, \
        {\
            .driver   = "scsi-hd",\
            .property = "discard_granularity",\
            .value    = stringify(0),\
	},{\
            .driver   = "scsi-cd",\
            .property = "discard_granularity",\
            .value    = stringify(0),\
	},{\
            .driver   = "scsi-disk",\
            .property = "discard_granularity",\
            .value    = stringify(0),\
	},{\
            .driver   = "ide-hd",\
            .property = "discard_granularity",\
            .value    = stringify(0),\
	},{\
            .driver   = "ide-cd",\
            .property = "discard_granularity",\
            .value    = stringify(0),\
	},{\
            .driver   = "ide-drive",\
            .property = "discard_granularity",\
            .value    = stringify(0),\
        },{\
            .driver   = "virtio-blk-pci",\
            .property = "discard_granularity",\
            .value    = stringify(0),\
	},{\
            .driver   = "virtio-serial-pci",\
            .property = "vectors",\
            /* DEV_NVECTORS_UNSPECIFIED as a uint32_t string */\
            .value    = stringify(0xFFFFFFFF),\
        },{ \
            .driver   = "virtio-net-pci", \
            .property = "ctrl_guest_offloads", \
            .value    = "off", \
        },{\
            .driver   = "e1000",\
            .property = "romfile",\
            .value    = "pxe-e1000.rom",\
        },{\
            .driver   = "ne2k_pci",\
            .property = "romfile",\
            .value    = "pxe-ne2k_pci.rom",\
        },{\
            .driver   = "pcnet",\
            .property = "romfile",\
            .value    = "pxe-pcnet.rom",\
        },{\
            .driver   = "rtl8139",\
            .property = "romfile",\
            .value    = "pxe-rtl8139.rom",\
        },{\
            .driver   = "virtio-net-pci",\
            .property = "romfile",\
            .value    = "pxe-virtio.rom",\
        },{\
            .driver   = "486-" TYPE_X86_CPU,\
            .property = "model",\
            .value    = stringify(0),\
        }

#define PC_COMMON_MACHINE_OPTIONS \
    .default_boot_order = "cad"

#define PC_DEFAULT_MACHINE_OPTIONS \
    PC_COMMON_MACHINE_OPTIONS, \
    .hot_add_cpu = pc_hot_add_cpu, \
    .max_cpus = 255

#endif
Commit	Line	Data
87ecb68b PB	1	#ifndef HW_PC_H
87ecb68b PB	2	#define HW_PC_H
376253ec AL	3
376253ec AL	4	#include "qemu-common.h"
022c62cb	5	#include "exec/memory.h"
0d09e41a PB	6	#include "hw/isa/isa.h"
0d09e41a PB	7	#include "hw/block/fdc.h"
1422e32d	8	#include "net/net.h"
0d09e41a	9	#include "hw/i386/ioapic.h"
376253ec	10
3459a625	11	#include "qemu/range.h"
b20c9bd5 MT	12	#include "qemu/bitmap.h"
	13	#include "sysemu/sysemu.h"
	14	#include "hw/pci/pci.h"
d5747cac	15	#include "hw/boards.h"
3459a625	16
7a10ef51 LPF	17	#define HPET_INTCAP "hpet-intcap"
7a10ef51 LPF	18
d5747cac IM	19	struct PCMachineState {
	20	/< private >/
	21	MachineState parent_obj;
	22	};
	23
	24	struct PCMachineClass {
	25	/< private >/
	26	MachineClass parent_class;
	27	};
	28
	29	typedef struct PCMachineState PCMachineState;
	30	typedef struct PCMachineClass PCMachineClass;
	31
	32	#define TYPE_PC_MACHINE "generic-pc-machine"
	33	#define PC_MACHINE(obj) \
	34	OBJECT_CHECK(PCMachineState, (obj), TYPE_PC_MACHINE)
	35	#define PC_MACHINE_GET_CLASS(obj) \
	36	OBJECT_GET_CLASS(PCMachineClass, (obj), TYPE_PC_MACHINE)
	37	#define PC_MACHINE_CLASS(klass) \
	38	OBJECT_CLASS_CHECK(PCMachineClass, (klass), TYPE_PC_MACHINE)
	39
	40	void qemu_register_pc_machine(QEMUMachine *m);
	41
87ecb68b PB	42	/* PC-style peripherals (also used by other machines). */
87ecb68b PB	43
3459a625 MT	44	typedef struct PcPciInfo {
	45	Range w32;
	46	Range w64;
	47	} PcPciInfo;
	48
f854ecc7 MT	49	#define ACPI_PM_PROP_S3_DISABLED "disable_s3"
	50	#define ACPI_PM_PROP_S4_DISABLED "disable_s4"
	51	#define ACPI_PM_PROP_S4_VAL "s4_val"
	52	#define ACPI_PM_PROP_SCI_INT "sci_int"
	53	#define ACPI_PM_PROP_ACPI_ENABLE_CMD "acpi_enable_cmd"
	54	#define ACPI_PM_PROP_ACPI_DISABLE_CMD "acpi_disable_cmd"
	55	#define ACPI_PM_PROP_PM_IO_BASE "pm_io_base"
	56	#define ACPI_PM_PROP_GPE0_BLK "gpe0_blk"
	57	#define ACPI_PM_PROP_GPE0_BLK_LEN "gpe0_blk_len"
	58
3459a625	59	struct PcGuestInfo {
f8c457b8	60	bool has_pci_info;
6dd2a5c9	61	bool isapc_ram_fw;
f30ee8a9	62	hwaddr ram_size, ram_size_below_4g;
b20c9bd5 MT	63	unsigned apic_id_limit;
	64	bool apic_xrupt_override;
	65	uint64_t numa_nodes;
	66	uint64_t *node_mem;
	67	uint64_t *node_cpu;
3459a625	68	FWCfgState *fw_cfg;
72c194f7	69	bool has_acpi_build;
3459a625 MT	70	};
3459a625 MT	71
87ecb68b	72	/* parallel.c */
48a18b3c	73	static inline bool parallel_init(ISABus bus, int index, CharDriverState chr)
defdb20e	74	{
4a17cc4f AF	75	DeviceState *dev;
4a17cc4f AF	76	ISADevice *isadev;
defdb20e	77
4a17cc4f AF	78	isadev = isa_try_create(bus, "isa-parallel");
4a17cc4f AF	79	if (!isadev) {
73531538 BS	80	return false;
73531538 BS	81	}
4a17cc4f AF	82	dev = DEVICE(isadev);
	83	qdev_prop_set_uint32(dev, "index", index);
	84	qdev_prop_set_chr(dev, "chardev", chr);
	85	if (qdev_init(dev) < 0) {
defdb20e BS	86	return false;
	87	}
	88	return true;
	89	}
	90
63858cd9	91	bool parallel_mm_init(MemoryRegion *address_space,
a8170e5e	92	hwaddr base, int it_shift, qemu_irq irq,
defdb20e	93	CharDriverState *chr);
87ecb68b PB	94
	95	/* i8259.c */
	96
9aa78c42	97	extern DeviceState *isa_pic;
48a18b3c	98	qemu_irq i8259_init(ISABus bus, qemu_irq parent_irq);
10b61882	99	qemu_irq kvm_i8259_init(ISABus bus);
9aa78c42 JK	100	int pic_read_irq(DeviceState *d);
9aa78c42 JK	101	int pic_get_output(DeviceState *d);
84f2d0ea WX	102	void pic_info(Monitor mon, const QDict qdict);
84f2d0ea WX	103	void irq_info(Monitor mon, const QDict qdict);
87ecb68b	104
b881fbe9	105	/* Global System Interrupts */
96051119	106
b881fbe9	107	#define GSI_NUM_PINS IOAPIC_NUM_PINS
845773ab	108
b881fbe9	109	typedef struct GSIState {
43a0db35	110	qemu_irq i8259_irq[ISA_NUM_IRQS];
b881fbe9 JK	111	qemu_irq ioapic_irq[IOAPIC_NUM_PINS];
	112	} GSIState;
	113
	114	void gsi_handler(void *opaque, int n, int level);
845773ab	115
87ecb68b	116	/* vmport.c */
d67f679d JK	117	typedef uint32_t (VMPortReadFunc)(void *opaque, uint32_t address);
d67f679d JK	118
48a18b3c	119	static inline void vmport_init(ISABus *bus)
6872ef61	120	{
48a18b3c	121	isa_create_simple(bus, "vmport");
6872ef61	122	}
d67f679d JK	123
d67f679d JK	124	void vmport_register(unsigned char command, VMPortReadFunc func, void opaque);
86d86414 BS	125	void vmmouse_get_data(uint32_t *data);
86d86414 BS	126	void vmmouse_set_data(const uint32_t *data);
87ecb68b	127
87ecb68b PB	128	/* pckbd.c */
	129
	130	void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base);
	131	void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
dbff76ac	132	MemoryRegion *region, ram_addr_t size,
a8170e5e	133	hwaddr mask);
956a3e6b BS	134	void i8042_isa_mouse_fake_event(void *opaque);
956a3e6b BS	135	void i8042_setup_a20_line(ISADevice dev, qemu_irq a20_out);
87ecb68b	136
87ecb68b PB	137	/* pc.c */
	138	extern int fd_bootchk;
	139
8e78eb28	140	void pc_register_ferr_irq(qemu_irq irq);
845773ab IY	141	void pc_acpi_smi_interrupt(void *opaque, int irq, int level);
845773ab IY	142
62fc403f	143	void pc_cpus_init(const char cpu_model, DeviceState icc_bridge);
c649983b	144	void pc_hot_add_cpu(const int64_t id, Error **errp);
f7e4dd6c	145	void pc_acpi_init(const char *default_dsdt);
3459a625 MT	146
	147	PcGuestInfo *pc_guest_info_init(ram_addr_t below_4g_mem_size,
	148	ram_addr_t above_4g_mem_size);
	149
39848901 IM	150	#define PCI_HOST_PROP_PCI_HOLE_START "pci-hole-start"
	151	#define PCI_HOST_PROP_PCI_HOLE_END "pci-hole-end"
	152	#define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start"
	153	#define PCI_HOST_PROP_PCI_HOLE64_END "pci-hole64-end"
	154	#define PCI_HOST_PROP_PCI_HOLE64_SIZE "pci-hole64-size"
1466cef3 MT	155	#define DEFAULT_PCI_HOLE64_SIZE (~0x0ULL)
1466cef3 MT	156
39848901	157
83d08f26 MT	158	void pc_pci_as_mapping_init(Object owner, MemoryRegion system_memory,
83d08f26 MT	159	MemoryRegion *pci_address_space);
39848901	160
a88b362c LE	161	FWCfgState pc_memory_init(MemoryRegion system_memory,
	162	const char *kernel_filename,
	163	const char *kernel_cmdline,
	164	const char *initrd_filename,
	165	ram_addr_t below_4g_mem_size,
	166	ram_addr_t above_4g_mem_size,
	167	MemoryRegion *rom_memory,
3459a625 MT	168	MemoryRegion **ram_memory,
3459a625 MT	169	PcGuestInfo *guest_info);
845773ab	170	qemu_irq *pc_allocate_cpu_irq(void);
48a18b3c HP	171	DeviceState pc_vga_init(ISABus isa_bus, PCIBus *pci_bus);
48a18b3c HP	172	void pc_basic_device_init(ISABus isa_bus, qemu_irq gsi,
1611977c	173	ISADevice **rtc_state,
34d4260e	174	ISADevice **floppy,
7a10ef51 LPF	175	bool no_vmport,
7a10ef51 LPF	176	uint32 hpet_irqs);
48a18b3c	177	void pc_init_ne2k_isa(ISABus bus, NICInfo nd);
845773ab	178	void pc_cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
c0897e0c	179	const char *boot_device,
34d4260e	180	ISADevice floppy, BusState ide0, BusState *ide1,
63ffb564	181	ISADevice *s);
9011a1a7	182	void pc_nic_init(ISABus isa_bus, PCIBus pci_bus);
845773ab	183	void pc_pci_device_init(PCIBus *pci_bus);
8e78eb28	184
f885f1ea IY	185	typedef void (cpu_set_smm_t)(int smm, void arg);
	186	void cpu_smm_register(cpu_set_smm_t callback, void *arg);
	187
a39e3564 JB	188	void ioapic_init_gsi(GSIState gsi_state, const char parent_name);
a39e3564 JB	189
9d5e77a2	190	/* acpi_piix.c */
53b67b30	191
a5c82852 AF	192	I2CBus piix4_pm_init(PCIBus bus, int devfn, uint32_t smb_io_base,
	193	qemu_irq sci_irq, qemu_irq smi_irq,
	194	int kvm_enabled, FWCfgState *fw_cfg);
87ecb68b	195	void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr);
87ecb68b	196
16b29ae1 AL	197	/* hpet.c */
	198	extern int no_hpet;
	199
87ecb68b	200	/* piix_pci.c */
0a3bacf3 JQ	201	struct PCII440FXState;
	202	typedef struct PCII440FXState PCII440FXState;
	203
1e39101c	204	PCIBus i440fx_init(PCII440FXState pi440fx_state, int piix_devfn,
60573079	205	ISABus *isa_bus, qemu_irq pic,
aee97b84 AK	206	MemoryRegion *address_space_mem,
aee97b84 AK	207	MemoryRegion *address_space_io,
ae0a5466	208	ram_addr_t ram_size,
ddaaefb4	209	ram_addr_t below_4g_mem_size,
39848901	210	ram_addr_t above_4g_mem_size,
ae0a5466 AK	211	MemoryRegion *pci_memory,
ae0a5466 AK	212	MemoryRegion *ram_memory);
87ecb68b	213
277e9340	214	PCIBus *find_i440fx(void);
823e675a	215	/* piix4.c */
b1d8e52e	216	extern PCIDevice *piix4_dev;
142e9787	217	int piix4_init(PCIBus bus, ISABus *isa_bus, int devfn);
87ecb68b PB	218
87ecb68b PB	219	/* vga.c */
cb5a7aa8	220	enum vga_retrace_method {
	221	VGA_RETRACE_DUMB,
	222	VGA_RETRACE_PRECISE
	223	};
	224
	225	extern enum vga_retrace_method vga_retrace_method;
87ecb68b	226
a8170e5e AK	227	int isa_vga_mm_init(hwaddr vram_base,
a8170e5e AK	228	hwaddr ctrl_base, int it_shift,
be20f9e9	229	MemoryRegion *address_space);
87ecb68b	230
87ecb68b	231	/* ne2000.c */
48a18b3c	232	static inline bool isa_ne2000_init(ISABus bus, int base, int irq, NICInfo nd)
60a14ad3	233	{
4a17cc4f AF	234	DeviceState *dev;
4a17cc4f AF	235	ISADevice *isadev;
87ecb68b	236
60a14ad3 BS	237	qemu_check_nic_model(nd, "ne2k_isa");
60a14ad3 BS	238
4a17cc4f AF	239	isadev = isa_try_create(bus, "ne2k_isa");
4a17cc4f AF	240	if (!isadev) {
cd1b8a8b BS	241	return false;
cd1b8a8b BS	242	}
4a17cc4f AF	243	dev = DEVICE(isadev);
	244	qdev_prop_set_uint32(dev, "iobase", base);
	245	qdev_prop_set_uint32(dev, "irq", irq);
	246	qdev_set_nic_properties(dev, nd);
	247	qdev_init_nofail(dev);
cd1b8a8b	248	return true;
60a14ad3	249	}
87ecb68b	250
cbc5b5f3	251	/* pc_sysfw.c */
6dd2a5c9 PB	252	void pc_system_firmware_init(MemoryRegion *rom_memory,
6dd2a5c9 PB	253	bool isapc_ram_fw);
cbc5b5f3	254
3ab135f3	255	/* pvpanic.c */
309cd62d	256	uint16_t pvpanic_port(void);
3ab135f3	257
4c5b10b7 JS	258	/* e820 types */
	259	#define E820_RAM 1
	260	#define E820_RESERVED 2
	261	#define E820_ACPI 3
	262	#define E820_NVS 4
	263	#define E820_UNUSABLE 5
	264
	265	int e820_add_entry(uint64_t, uint64_t, uint32_t);
7bf8ef19 GS	266	int e820_get_num_entries(void);
7bf8ef19 GS	267	bool e820_get_entry(int, uint32_t, uint64_t , uint64_t );
4c5b10b7	268
9df11c9f GS	269	#define PC_Q35_COMPAT_2_0 \
	270	PC_COMPAT_2_0
	271
7a10ef51	272	#define PC_Q35_COMPAT_1_7 \
5319dc7b	273	PC_COMPAT_1_7, \
9df11c9f	274	PC_Q35_COMPAT_2_0, \
7a10ef51 LPF	275	{\
	276	.driver = "hpet",\
	277	.property = HPET_INTCAP,\
	278	.value = stringify(4),\
	279	}
	280
	281	#define PC_Q35_COMPAT_1_6 \
	282	PC_COMPAT_1_6, \
	283	PC_Q35_COMPAT_1_7
	284
	285	#define PC_Q35_COMPAT_1_5 \
	286	PC_COMPAT_1_5, \
	287	PC_Q35_COMPAT_1_6
	288
	289	#define PC_Q35_COMPAT_1_4 \
	290	PC_COMPAT_1_4, \
	291	PC_Q35_COMPAT_1_5
	292
9df11c9f GS	293	#define PC_COMPAT_2_0 \
9df11c9f GS	294	{\
aa93200b GS	295	.driver = "apic",\
	296	.property = "version",\
	297	.value = stringify(0x11),\
7bafd888 GH	298	},{\
	299	.driver = "nec-usb-xhci",\
	300	.property = "superspeed-ports-first",\
	301	.value = "off",\
13cc2c3e BZ	302	},\
	303	{\
	304	.driver = "pci-serial",\
	305	.property = "prog_if",\
	306	.value = stringify(0),\
	307	},\
	308	{\
	309	.driver = "pci-serial-2x",\
	310	.property = "prof_if",\
	311	.value = stringify(0),\
	312	},\
	313	{\
	314	.driver = "pci-serial-4x",\
	315	.property = "prog_if",\
	316	.value = stringify(0),\
9df11c9f GS	317	}
9df11c9f GS	318
5319dc7b	319	#define PC_COMPAT_1_7 \
9df11c9f	320	PC_COMPAT_2_0, \
5319dc7b GH	321	{\
	322	.driver = TYPE_USB_DEVICE,\
	323	.property = "msos-desc",\
	324	.value = "no",\
9e047b98 MT	325	},\
	326	{\
	327	.driver = "PIIX4_PM",\
	328	.property = "acpi-pci-hotplug-with-bridge-support",\
	329	.value = "off",\
5319dc7b GH	330	}
5319dc7b GH	331
e9845f09	332	#define PC_COMPAT_1_6 \
5319dc7b	333	PC_COMPAT_1_7, \
e9845f09 VM	334	{\
	335	.driver = "e1000",\
	336	.property = "mitigation",\
	337	.value = "off",\
f8e6a11a EH	338	},{\
	339	.driver = "qemu64-" TYPE_X86_CPU,\
	340	.property = "model",\
	341	.value = stringify(2),\
	342	},{\
	343	.driver = "qemu32-" TYPE_X86_CPU,\
	344	.property = "model",\
	345	.value = stringify(3),\
04c7d8b8 CR	346	},{\
	347	.driver = "i440FX-pcihost",\
	348	.property = "short_root_bus",\
	349	.value = stringify(1),\
	350	},{\
	351	.driver = "q35-pcihost",\
	352	.property = "short_root_bus",\
	353	.value = stringify(1),\
e9845f09 VM	354	}
e9845f09 VM	355
ffce9ebb	356	#define PC_COMPAT_1_5 \
e9845f09	357	PC_COMPAT_1_6, \
ffce9ebb EH	358	{\
	359	.driver = "Conroe-" TYPE_X86_CPU,\
	360	.property = "model",\
	361	.value = stringify(2),\
6b11322e EH	362	},{\
	363	.driver = "Conroe-" TYPE_X86_CPU,\
	364	.property = "level",\
	365	.value = stringify(2),\
ffce9ebb EH	366	},{\
	367	.driver = "Penryn-" TYPE_X86_CPU,\
	368	.property = "model",\
	369	.value = stringify(2),\
6b11322e EH	370	},{\
	371	.driver = "Penryn-" TYPE_X86_CPU,\
	372	.property = "level",\
	373	.value = stringify(2),\
ffce9ebb EH	374	},{\
	375	.driver = "Nehalem-" TYPE_X86_CPU,\
	376	.property = "model",\
	377	.value = stringify(2),\
6b11322e EH	378	},{\
	379	.driver = "Nehalem-" TYPE_X86_CPU,\
	380	.property = "level",\
	381	.value = stringify(2),\
488f069b MT	382	},{\
	383	.driver = "virtio-net-pci",\
	384	.property = "any_layout",\
	385	.value = "off",\
9337e3b6 EH	386	},{\
	387	.driver = TYPE_X86_CPU,\
	388	.property = "pmu",\
	389	.value = "on",\
04c7d8b8 CR	390	},{\
	391	.driver = "i440FX-pcihost",\
	392	.property = "short_root_bus",\
	393	.value = stringify(0),\
	394	},{\
	395	.driver = "q35-pcihost",\
	396	.property = "short_root_bus",\
	397	.value = stringify(0),\
ffce9ebb EH	398	}
ffce9ebb EH	399
bf3caa3d	400	#define PC_COMPAT_1_4 \
ffce9ebb	401	PC_COMPAT_1_5, \
bf3caa3d PB	402	{\
	403	.driver = "scsi-hd",\
	404	.property = "discard_granularity",\
	405	.value = stringify(0),\
	406	},{\
	407	.driver = "scsi-cd",\
	408	.property = "discard_granularity",\
	409	.value = stringify(0),\
	410	},{\
	411	.driver = "scsi-disk",\
	412	.property = "discard_granularity",\
	413	.value = stringify(0),\
	414	},{\
	415	.driver = "ide-hd",\
	416	.property = "discard_granularity",\
	417	.value = stringify(0),\
	418	},{\
	419	.driver = "ide-cd",\
	420	.property = "discard_granularity",\
	421	.value = stringify(0),\
	422	},{\
	423	.driver = "ide-drive",\
	424	.property = "discard_granularity",\
	425	.value = stringify(0),\
c45e5b5b	426	},{\
bf3caa3d PB	427	.driver = "virtio-blk-pci",\
	428	.property = "discard_granularity",\
	429	.value = stringify(0),\
554f1997 GH	430	},{\
	431	.driver = "virtio-serial-pci",\
	432	.property = "vectors",\
	433	/* DEV_NVECTORS_UNSPECIFIED as a uint32_t string */\
	434	.value = stringify(0xFFFFFFFF),\
644c9858 DF	435	},{ \
	436	.driver = "virtio-net-pci", \
	437	.property = "ctrl_guest_offloads", \
	438	.value = "off", \
c45e5b5b GH	439	},{\
	440	.driver = "e1000",\
	441	.property = "romfile",\
	442	.value = "pxe-e1000.rom",\
	443	},{\
	444	.driver = "ne2k_pci",\
	445	.property = "romfile",\
	446	.value = "pxe-ne2k_pci.rom",\
	447	},{\
	448	.driver = "pcnet",\
	449	.property = "romfile",\
	450	.value = "pxe-pcnet.rom",\
	451	},{\
	452	.driver = "rtl8139",\
	453	.property = "romfile",\
	454	.value = "pxe-rtl8139.rom",\
	455	},{\
	456	.driver = "virtio-net-pci",\
	457	.property = "romfile",\
	458	.value = "pxe-virtio.rom",\
b2a856d9 AF	459	},{\
	460	.driver = "486-" TYPE_X86_CPU,\
	461	.property = "model",\
	462	.value = stringify(0),\
c45e5b5b	463	}
bf3caa3d	464
a0dba644 MT	465	#define PC_COMMON_MACHINE_OPTIONS \
	466	.default_boot_order = "cad"
	467
	468	#define PC_DEFAULT_MACHINE_OPTIONS \
	469	PC_COMMON_MACHINE_OPTIONS, \
	470	.hot_add_cpu = pc_hot_add_cpu, \
	471	.max_cpus = 255
	472
87ecb68b	473	#endif